From 36d935ea8cea8aa04588ada0a518c4c1eb1cfdc4 Mon Sep 17 00:00:00 2001 From: Luo Wei Date: Sat, 12 Aug 2023 12:47:18 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3588-vehicle-evb: add v22 dts files and use serdes-mfd-display default Signed-off-by: Luo Wei Change-Id: I361617bdd84c8652a21289a68afbb6c3a5d40c2a --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../dts/rockchip/rk3588-vehicle-evb-v21.dts | 100 +- .../dts/rockchip/rk3588-vehicle-evb-v22.dts | 594 ++++ ...3588-vehicle-serdes-mfd-display-maxim.dtsi | 1092 +++++++ ...k3588-vehicle-serdes-mfd-display-rohm.dtsi | 2680 +++++++++++++++++ 5 files changed, 4466 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v22.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-vehicle-serdes-mfd-display-maxim.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-vehicle-serdes-mfd-display-rohm.dtsi diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 1c574168ec1c..7d565641641b 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -234,6 +234,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-toybrick-x0-linux.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-vehicle-evb-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-vehicle-evb-v20.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-vehicle-evb-v21.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-vehicle-evb-v22.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-vehicle-s66-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-evb1-lp4x-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-evb1-lp4x-v10-linux.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v21.dts b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v21.dts index 073831038d43..be6ede05dc5f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v21.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v21.dts @@ -8,7 +8,7 @@ #include "rk3588-vehicle-evb-v21.dtsi" #include "rk3588-vehicle-evb-maxim-max96712-dphy3.dtsi" -#include "rk3588-vehicle-serdes-display-v21.dtsi" +#include "rk3588-vehicle-serdes-mfd-display-rohm.dtsi" #include "rk3588-android.dtsi" / { @@ -55,6 +55,32 @@ }; }; +&i2c2 { + himax@48 { + himax,irq-gpio = <&gpio1 RK_PB0 IRQ_TYPE_EDGE_FALLING>; + }; +}; + +&i2c4 { + himax@48 { + himax,irq-gpio = <&gpio3 RK_PC5 IRQ_TYPE_EDGE_FALLING>; + }; +}; + +&i2c5 { + ilitek@41 { + interrupt-parent = <&gpio0>; + interrupts = ; + reset-gpio = <&gpio0 RK_PD1 GPIO_ACTIVE_LOW>; + }; +}; + +&i2c6 { + himax@48 { + himax,irq-gpio = <&gpio1 RK_PB7 IRQ_TYPE_EDGE_FALLING>; //use rst as int + }; +}; + &i2s2_2ch { pinctrl-0 = <&i2s2m1_lrck &i2s2m1_sclk @@ -63,6 +89,78 @@ status = "okay"; }; + +&pinctrl { + + bl { + bl0_enable_pin: bl0-enable-pin { + rockchip,pins = + <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, + <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, + <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + + }; + + bl1_enable_pin: bl1-enable-pin { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bl2_enable_pin: bl2-enable-pin { + rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bl3_enable_pin: bl3-enable-pin { + rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bl4_enable_pin: bl4-enable-pin { + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bl5_enable_pin: bl5-enable-pin { + rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + serdes { + //dsi0 + ser0_rst_pin: ser0-rst-pin { + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + //dsi1 + ser1_rst_pin: ser1-rst-pin { + rockchip,pins = <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + touch { + //dsi0-i2c2 + touch_gpio_dsi0: touch-gpio-dsi0 { + rockchip,pins = + <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; //rst + }; + //dsi1-i2c6 + touch_gpio_dsi1: touch-gpio-dsi1 { + rockchip,pins = + <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>, //rst + <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; //int + }; + //dp0-i2c4 + touch_gpio_dp0: touch-gpio-dp0 { + rockchip,pins = + <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>, //rst + <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; //int + }; + //edp0-i2c5 + touch_gpio_edp0: touch-gpio-edp0 { + rockchip,pins = + <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>, //rst + <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>; //int + }; + }; +}; + &rockchip_suspend { rockchip,sleep-mode-config = < (0 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v22.dts b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v22.dts new file mode 100644 index 000000000000..c2986168a6c3 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v22.dts @@ -0,0 +1,594 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Rockchip Electronics Co., Ltd. + * + */ + +/dts-v1/; + +#include "rk3588-vehicle-evb-v21.dtsi" +#include "rk3588-vehicle-evb-maxim-max96712-dphy3.dtsi" +#include "rk3588-vehicle-serdes-mfd-display-rohm.dtsi" +#include "rk3588-android.dtsi" + +/ { + model = "Rockchip RK3588 VEHICLE EVB V22 Board"; + compatible = "rockchip,rk3588-vehicle-evb-v22", "rockchip,rk3588"; + + vcc5v0_buck: vcc5v0-buck { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_buck"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc12v_dcin>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_buck_en>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <5000000>; + }; + }; + + vcc4v0_sys_mode: vcc4v0-sys-mode { + compatible = "regulator-fixed"; + regulator-name = "vcc4v0_sys_mode"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <4000000>; + enable-active-high; + gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; + vin-supply = <&vcc12v_dcin>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc4v0_sys_mode_en>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <4000000>; + }; + }; + + lcd1_vcc12v_buck: lcd1_vcc12v-buck { + compatible = "regulator-fixed"; + regulator-name = "lcd1_vcc12v_buck"; + regulator-boot-on; + //regulator-always-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + enable-active-high; + gpio = <&i2c5_nca9539_gpio 0 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc12v_dcin>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <12000000>; + }; + }; + + lcd2_vcc12v_buck: lcd2_vcc12v-buck { + compatible = "regulator-fixed"; + regulator-name = "lcd2_vcc12v_buck"; + regulator-boot-on; + //regulator-always-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + enable-active-high; + gpio = <&i2c5_nca9539_gpio 1 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc12v_dcin>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <12000000>; + }; + }; + + lcd3_vcc12v_buck: lcd3_vcc12v-buck { + compatible = "regulator-fixed"; + regulator-name = "lcd3_vcc12v_buck"; + regulator-boot-on; + //regulator-always-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + enable-active-high; + gpio = <&i2c5_nca9539_gpio 2 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc12v_dcin>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <12000000>; + }; + }; + + lcd4_vcc12v_buck: lcd4_vcc12v-buck { + compatible = "regulator-fixed"; + regulator-name = "lcd4_vcc12v_buck"; + regulator-boot-on; + //regulator-always-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + enable-active-high; + gpio = <&i2c5_nca9539_gpio 3 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc12v_dcin>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <12000000>; + }; + }; + + lcd5_vcc12v_buck: lcd5_vcc12v-buck { + compatible = "regulator-fixed"; + regulator-name = "lcd5_vcc12v_buck"; + regulator-boot-on; + //regulator-always-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + enable-active-high; + gpio = <&i2c5_nca9539_gpio 4 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc12v_dcin>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <12000000>; + }; + }; + + lcd6_vcc12v_buck: lcd6_vcc12v-buck { + compatible = "regulator-fixed"; + regulator-name = "lcd6_vcc12v_buck"; + regulator-boot-on; + //regulator-always-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + enable-active-high; + gpio = <&i2c5_nca9539_gpio 5 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc12v_dcin>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <12000000>; + }; + }; + + camera1_vcc12v_buck: camera1_vcc12v-buck { + compatible = "regulator-fixed"; + regulator-name = "camera1_vcc12v_buck"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + enable-active-high; + gpio = <&i2c5_nca9539_gpio 6 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc12v_dcin>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <12000000>; + }; + }; + + camera2_vcc12v_buck: camera2_vcc12v-buck { + compatible = "regulator-fixed"; + regulator-name = "camera2_vcc12v_buck"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + enable-active-high; + gpio = <&i2c5_nca9539_gpio 7 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc12v_dcin>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <12000000>; + }; + }; + + camera3_vcc12v_buck: camera3_vcc12v-buck { + compatible = "regulator-fixed"; + regulator-name = "camera3_vcc12v_buck"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + enable-active-high; + gpio = <&i2c5_nca9539_gpio 8 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc12v_dcin>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <12000000>; + }; + }; + + camera4_vcc12v_buck: camera4_vcc12v-buck { + compatible = "regulator-fixed"; + regulator-name = "camera4_vcc12v_buck"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + enable-active-high; + gpio = <&i2c5_nca9539_gpio 9 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc12v_dcin>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <12000000>; + }; + }; + + vcc5v0_host_usb20: vcc5v0-host-usb20 { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host_usb20"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&i2c5_nca9539_gpio 10 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc5v0_usb>; + }; + + vcc5v0_host_usb30: vcc5v0-host-usb30 { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host_usb30"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&i2c5_nca9539_gpio 11 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc5v0_usb>; + }; + + adsp_vcc12v_buck: adsp_vcc12v-buck { + compatible = "regulator-fixed"; + regulator-name = "adsp_vcc12v_buck"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + enable-active-high; + gpio = <&i2c5_nca9539_gpio 12 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc12v_dcin>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <12000000>; + }; + }; + + minipcie_power_buck: minipcie_power-buck { + compatible = "regulator-fixed"; + regulator-name = "minipcie_power_buck"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + enable-active-high; + gpio = <&i2c5_nca9539_gpio 13 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc5v0_usb>; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <12000000>; + }; + }; + + bt-sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "dsp_a"; + simple-audio-card,bitclock-inversion = <1>; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,name = "rockchip,bt"; + simple-audio-card,cpu { + sound-dai = <&i2s2_2ch>; + }; + + simple-audio-card,codec { + sound-dai = <&bt_sco 1>; + }; + }; + + bt_sco: bt-sco { + compatible = "delta,dfbmcs320"; + #sound-dai-cells = <1>; + status = "okay"; + }; + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + + reverse { + label = "GPIO Key Reverse"; + linux,code = ; + gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + debounce-interval = <100>; + }; + + park { + label = "GPIO Key Park"; + linux,code = ; + gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; + debounce-interval = <100>; + }; + }; + + vcc3v3_pcie_wifi: vcc3v3-pcie-wifi { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie_wifi"; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; + startup-delay-us = <5000>; + vin-supply = <&vcc_3v3_s3>; + }; + + wireless_bluetooth: wireless-bluetooth { + BT,reset_gpio = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + wireless_wlan: wireless-wlan { + WIFI,poweren_gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; +}; + +&avdd1v8_ddr_pll_s0 { + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; +}; + +&i2s2_2ch { + pinctrl-0 = <&i2s2m1_lrck + &i2s2m1_sclk + &i2s2m1_sdi + &i2s2m1_sdo>; + status = "okay"; +}; + +&i2c2 { + himax@48 { + himax,irq-gpio = <&gpio1 RK_PB0 IRQ_TYPE_EDGE_FALLING>; + }; +}; + +&i2c2_bu18tl82 { + //route-enable; + use-delay-work; +}; + +&i2c2_bu18rl82 { + use-delay-work; + vpower-supply = <&lcd1_vcc12v_buck>; +}; + +&i2c4 { + himax@48 { + himax,irq-gpio = <&gpio3 RK_PC5 IRQ_TYPE_EDGE_FALLING>; + }; +}; + +&i2c4_bu18tl82 { + use-delay-work; +}; + +&i2c4_bu18rl82 { + use-delay-work; + vpower-supply = <&lcd5_vcc12v_buck>; +}; + +&i2c5 { + ilitek@41 { + interrupt-parent = <&gpio1>; + interrupts = ; + }; + + i2c5_nca9539: i2c5-nca9539@74 { + compatible = "novo,nca9539"; + reg = <0x74>; + status = "okay"; + + /* P00-P07 P10-P17 output HIGH level default*/ + serdes-init-sequence = [ + 0002 00ff + 0003 00ff + 0004 0000 + 0005 0000 + 0006 0000 + 0007 0000 + ]; + + i2c5_nca9539_pinctrl: i2c5-nca9539-pinctrl { + compatible = "novo,nca9539-pinctrl"; + status = "okay"; + + i2c5_nca9539_gpio: i2c5-nca9539-gpio { + compatible = "novo,nca9539-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c5_nca9539_pinctrl 0 256 16>; + }; + }; + }; +}; + +&i2c5_bu18tl82 { + use-delay-work; +}; + +&i2c5_bu18rl82 { + use-delay-work; + vpower-supply = <&lcd3_vcc12v_buck>; +}; + +&i2c6 { + himax@48 { + himax,irq-gpio = <&gpio1 RK_PB7 IRQ_TYPE_EDGE_FALLING>; + }; +}; + +&i2c6_bu18tl82 { + //route-enable; + use-delay-work; +}; + +&i2c6_bu18rl82 { + use-delay-work; + vpower-supply = <&lcd2_vcc12v_buck>; +}; + +&pinctrl { + + bl { + bl0_enable_pin: bl0-enable-pin { + rockchip,pins = + <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, + <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, + <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + + }; + + bl1_enable_pin: bl1-enable-pin { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bl2_enable_pin: bl2-enable-pin { + rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bl3_enable_pin: bl3-enable-pin { + rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bl4_enable_pin: bl4-enable-pin { + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bl5_enable_pin: bl5-enable-pin { + rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + max96712-dphy3 { + max96712_dphy3_pwdn: max96712-dphy3-pwdn { + rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + max96712_dphy3_errb: max96712-dphy3-errb { + rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + max96712_dphy3_lock: max96712-dphy3-lock { + rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + touch { + //dsi0-i2c2 + touch_gpio_dsi0: touch-gpio-dsi0 { + rockchip,pins = + <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; //RST->V22 INT + }; + //dsi1-i2c6 + touch_gpio_dsi1: touch-gpio-dsi1 { + rockchip,pins = + <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; //RST->V22 INT + }; + //dp0-i2c4 + touch_gpio_dp0: touch-gpio-dp0 { + rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + //edp0-i2c5 + touch_gpio_edp0: touch-gpio-edp0 { + rockchip,pins = + <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; //RST->V22 INT + }; + }; + + vcc5v0-buck { + vcc5v0_buck_en: vcc5v0-buck-en { + rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + vcc4v0-mode { + vcc4v0_sys_mode_en: vcc4v0-sys-mode-en { + rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wireless-bluetooth { + bt_reset_gpio: bt-reset-gpio { + rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&rockchip_suspend { + rockchip,sleep-mode-config = < + (0 + | RKPM_SLP_ARMOFF_DDRPD + | RKPM_SLP_PMU_PMUALIVE_32K + | RKPM_SLP_PMU_DIS_OSC + | RKPM_SLP_32K_EXT + ) + >; + rockchip,wakeup-config = < + (0 + | RKPM_CPU0_WKUP_EN + | RKPM_GPIO_WKUP_EN + ) + >; + status = "okay"; +}; + +&route_dsi0 { + status = "disabled"; +}; + +&route_dsi1 { + status = "disabled"; +}; + +&u2phy1_otg { + phy-supply = <&vcc5v0_host_usb20>; +}; + +&u2phy2_host { + phy-supply = <&vcc5v0_host_usb20>; +}; + +&u2phy3_host { + phy-supply = <&vcc5v0_host_usb30>; +}; + +&vdd_log_s0 { + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <800000>; + }; +}; + +&vcc_3v3_s0 { + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; +}; + +&vcc_1v8_s0 { + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; +}; + +&vdd_1v8_pll_s0 { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; +}; + +&vcc5v0_host { + status = "disabled"; +}; + diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-serdes-mfd-display-maxim.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-serdes-mfd-display-maxim.dtsi new file mode 100644 index 000000000000..cc8129a406a8 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-serdes-mfd-display-maxim.dtsi @@ -0,0 +1,1092 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2022 Rockchip Electronics Co., Ltd. + */ + +#include + +/ { + aliases { + pinctrl0 = &pinctrl; + }; + + backlight { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + i2c2_max96755f_backlight: backlight@0 { + compatible = "pwm-backlight"; + reg = <0>; + pwms = <&pwm0 0 1000000 0>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + }; + + i2c4_max96745_backlight: backlight@1 { + compatible = "pwm-backlight"; + reg = <1>; + pwms = <&pwm10 0 1000000 0>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + }; + + i2c5_max96745_backlight: backlight@2 { + compatible = "pwm-backlight"; + reg = <2>; + pwms = <&pwm7 0 1000000 0>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + }; + + i2c6_max96755f_backlight: backlight@3 { + compatible = "pwm-backlight"; + reg = <3>; + pwms = <&pwm13 0 1000000 0>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + }; + + i2c7_max96745_backlight: backlight@4 { + compatible = "pwm-backlight"; + reg = <4>; + pwms = <&pwm11 0 1000000 0>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + }; + + i2c8_max96745_backlight: backlight@5 { + compatible = "pwm-backlight"; + reg = <5>; + pwms = <&pwm14 0 1000000 0>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + }; + }; +}; + +&dp0 { + //split-mode; + force-hpd; + status = "okay"; +}; + +&dp0_in_vp0 { + status = "okay"; +}; + +&dp0_out { + link-frequencies = /bits/ 64 <2700000000>; + remote-endpoint = <&i2c4_max96745_in>; +}; + +&usbdp_phy0 { + rockchip,dp-lane-mux = <0 1 2 3>; + status = "okay"; +}; + +&usbdp_phy0_dp { + status = "okay"; +}; + +&route_dp0 { + connect = <&vp0_out_dp0>; + status = "okay"; +}; + +&dp1 { + force-hpd; + status = "disabled"; +}; + +&dp1_out { + link-frequencies = /bits/ 64 <2700000000>; + remote-endpoint = <&i2c8_max96745_in>; +}; + +&usbdp_phy1 { + rockchip,dp-lane-mux = <0 1 2 3>; + status = "okay"; +}; + +&usbdp_phy1_dp { + status = "okay"; +}; + +&dsi0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + dsi0_out: endpoint { + remote-endpoint = <&i2c2_max96755f_in>; + }; + }; + }; +}; + +&mipi_dcphy0 { + status = "okay"; +}; + +&dsi0_in_vp2 { + status = "okay"; +}; + +&route_dsi0 { + connect = <&vp2_out_dsi0>; + status = "disabled"; +}; + +&dsi1 { + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + dsi1_out: endpoint { + remote-endpoint = <&i2c6_max96755f_in>; + }; + }; + }; +}; + +&mipi_dcphy1 { + status = "okay"; +}; + +&dsi1_in_vp3 { + status = "okay"; +}; + +&route_dsi1 { + connect = <&vp3_out_dsi1>; + status = "disabled"; +}; + +&edp0 { + //split-mode; + force-hpd; + status = "okay"; +}; + +&edp0_out { + link-frequencies = /bits/ 64 <2700000000>; + remote-endpoint = <&i2c5_max96745_in>; +}; + +&hdptxphy0 { + status = "okay"; +}; + +&edp0_in_vp1 { + status = "okay"; +}; + +&route_edp0 { + connect = <&vp1_out_edp0>; + status = "okay"; +}; + +&edp1 { + force-hpd; + status = "disabled"; +}; + +&edp1_out { + link-frequencies = /bits/ 64 <2700000000>; + remote-endpoint = <&i2c7_max96745_in>; +}; + +&hdptxphy1 { + status = "okay"; +}; + +&hdmi0 { + status = "disabled"; +}; + +&hdmi1 { + status = "disabled"; +}; + +&hdptxphy_hdmi0 { + status = "disabled"; +}; + +&hdptxphy_hdmi1 { + status = "disabled"; +}; + +&i2c2 { + pinctrl-0 = <&i2c2m4_xfer>; + clock-frequency = <400000>; + status = "okay"; + + max96755@40 { + compatible = "maxim,max96755"; + reg = <0x40>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_serdes_pins>; + lock-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + sel-mipi; + status = "okay"; + + serdes-init-sequence = [ + 0001 0008 + 0002 0053 + 0003 0040 + 0010 0031 + 0013 00ca + 0010 0000 + 02be 001c + 02bf 0040 + 02c0 0020 + 0311 0057 + 0331 0033 + 0332 004e + 03a4 0000 + 0385 0000 + 0386 0000 + 0387 0000 + 005b 0012 + 0053 0010 + ]; + + i2c2_max96755f_pinctrl: i2c2-max96755f-pinctrl { + compatible = "maxim,max96755-pinctrl"; + status = "okay"; + + i2c2_max96755f_pinctrl_hog: hog { + i2c { + groups = "MAX96755_I2C"; + function = "MAX96755_I2C"; + }; + }; + + i2c2_max96755f_panel_pins: panel-pins { + bl-pwm { + pins = "MAX96755_MFP0"; + function = "DES_GPIO0_OUTPUT"; + }; + }; + + i2c2_max96755f_gpio: i2c2-max96755f-gpio { + compatible = "maxim,max96755-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c2_max96755f_pinctrl 0 160 24>; + }; + }; + + i2c2_max96755f_bridge: i2c2-max96755f-bridge { + compatible = "maxim,max96755-bridge"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_max96755f_pinctrl_hog>; + status = "okay"; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c2_max96755f_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + + i2c2_max96755f_out: endpoint { + remote-endpoint = <&i2c2_max96755f_panel_in>; + }; + }; + }; + }; + + + max96772@48 { + compatible = "maxim,max96772"; + reg = <0x48>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + serdes-init-sequence = [ + 0001 0002 + 0010 0011 + 0050 0000 + 07f0 0001 + e791 0000 + e793 0000 + e794 0000 + e795 000a + e796 007a + e797 0000 + e798 003c + e799 0000 + e79a 003c + e79b 0000 + e79c 00a0 + e79d 0005 + e79e 0054 + e79f 0001 + e7a0 0002 + e7a1 0000 + e7a2 0014 + e7a3 0000 + e7a4 00fc + e7a5 000e + e7a6 0055 + e7a7 0055 + e7a8 0000 + e7a9 0080 + e7aa 0040 + e7ab 0000 + e7ac 0003 + e7ad 0000 + e7b0 0000 + e7b1 0000 + e7b2 0050 + e7b3 0000 + e7b4 0000 + e7b5 0040 + e7b6 006c + e7b7 0020 + e7b8 0007 + e7b9 0000 + e7ba 0001 + e7bb 0000 + e7bc 0000 + e7bd 0000 + e7be 0052 + e7bf 0000 + ]; + + i2c2_max96772_pinctrl: i2c2-max96772-pinctrl { + compatible = "maxim,max96772-pinctrl"; + status = "okay"; + + i2c2_max96772_gpio: i2c2-max96772-gpio { + compatible = "maxim,max96772-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c2_max96772_pinctrl 0 185 24>; + }; + }; + + i2c2_max96772_panel: i2c2-max96772-panel { + compatible = "maxim,max96772-panel"; + backlight = <&i2c2_max96755f_backlight>; + + panel-timing { + clock-frequency = <180000000>; + hactive = <2560>; + vactive = <1440>; + hfront-porch = <122>; + hsync-len = <60>; + hback-porch = <60>; + vfront-porch = <340>; + vsync-len = <2>; + vback-porch = <20>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + + port { + i2c2_max96755f_panel_in: endpoint { + remote-endpoint = <&i2c2_max96755f_out>; + }; + }; + + }; + + }; + + ts@30 { + compatible = "gac,gac_ts"; + reg = <0x30>; + gac,max_x = <2560>; + gac,max_y = <1440>; + }; +}; + +&i2c4 { + pinctrl-0 = <&i2c4m2_xfer>; + clock-frequency = <400000>; + status = "okay"; + + max96745@42 { + compatible = "maxim,max96745"; + reg = <0x42>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_serdes_pins>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + serdes-init-sequence = [ + 0070 0016 + 0005 00c0 + 0107 0042 + 0027 0022 + 0026 0022 + 002a 0007 + 641a 00f0 + ]; + + + i2c4_max96745_pinctrl: i2c4-max96745-pinctrl { + compatible = "maxim,max96745-pinctrl"; + status = "okay"; + + i2c4_max96745_gpio: i2c4-max96745-gpio { + compatible = "maxim,max96745-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c4_max96745_pinctrl 0 210 25>; + }; + }; + + i2c4_max96745_bridge: i2c4-max96745-bridge { + compatible = "maxim,max96745-bridge"; + lock-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c4_max96745_in: endpoint { + remote-endpoint = <&dp0_out>; + }; + }; + + port@1 { + reg = <1>; + + i2c4_max96745_out: endpoint { + remote-endpoint = <&i2c4_max96745_panel_in>; + }; + }; + }; + + }; + + + max96752@48 { + compatible = "maxim,max96752"; + reg = <0x48>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + serdes-init-sequence = [ + 0001 0002 + 0002 0043 + 0140 0020 + 01ce 005e + 0200 0084 + 020e 0040 + 020c 0084 + 0207 00a1 + 0206 0083 + 0215 0090 + 0227 0090 + 020f 0090 + 0221 0090 + 0212 0090 + 0209 0090 + ]; + + i2c4_max96752_pinctrl: i2c4-max96752-pinctrl { + compatible = "maxim,max96752-pinctrl"; + status = "okay"; + + i2c4_max96752_gpio: i2c4-max96752-gpio { + compatible = "maxim,max96752-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c4_max96752_pinctrl 0 236 25>; + }; + }; + + i2c4_max96752_panel: i2c4-max96752-panel { + compatible = "maxim,max96752-panel"; + reg = <0x48>; + backlight = <&i2c4_max96745_backlight>; + + panel-timing { + clock-frequency = <148500000>; + hactive = <1920>; + vactive = <1080>; + hfront-porch = <20>; + hsync-len = <20>; + hback-porch = <20>; + vfront-porch = <250>; + vsync-len = <2>; + vback-porch = <8>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + + port { + i2c4_max96745_panel_in: endpoint { + remote-endpoint = <&i2c4_max96745_out>; + }; + }; + }; + + }; +}; + +&i2c5 { + clock-frequency = <400000>; + status = "okay"; + + max96745@42 { + compatible = "maxim,max96745"; + reg = <0x42>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c5_serdes_pins>; + lock-gpios = <&gpio0 RK_PD2 GPIO_ACTIVE_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + serdes-init-sequence = [ + 0070 0016 + 0005 00c0 + 0107 0042 + 0027 0022 + 0026 0022 + 002a 0007 + 641a 00f0 + ]; + + + i2c5_max96745_pinctrl: i2c5-max96745-pinctrl { + compatible = "maxim,max96745-pinctrl"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c5_max96745_pinctrl_hog>, <&i2c5_max96745_panel_pins>; + status = "okay"; + + i2c5_max96745_pinctrl_hog: hog { + i2c { + groups = "MAX96745_I2C"; + function = "MAX96745_I2C"; + }; + }; + + i2c5_max96745_panel_pins: panel-pins { + bl-pwm { + pins = "MAX96745_MFP0"; + function = "DES_GPIO0_OUTPUT_A"; + }; + }; + + i2c5_max96745_gpio: i2c5-max96745-gpio { + compatible = "maxim,max96745-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c5_max96745_pinctrl 0 262 25>; + }; + }; + + i2c5_max96745_bridge: i2c5-max96745-bridge { + compatible = "maxim,max96745-bridge"; + status = "okay"; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c5_max96745_in: endpoint { + remote-endpoint = <&edp0_out>; + }; + }; + + port@1 { + reg = <1>; + + i2c5_max96745_out: endpoint { + remote-endpoint = <&i2c5_max96745_panel_in>; + }; + }; + }; + + }; + + + max96752@48 { + compatible = "maxim,max96752"; + reg = <0x48>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + serdes-init-sequence = [ + 0001 0002 + 0002 0043 + 0140 0020 + 01ce 005e + 0200 0084 + 020e 0040 + 020c 0084 + 0207 00a1 + 0206 0083 + 0215 0090 + 0227 0090 + 020f 0090 + 0221 0090 + 0212 0090 + 0209 0090 + ]; + + i2c5_max96752_pinctrl: i2c5-max96752-pinctrl { + compatible = "maxim,max96752-pinctrl"; + status = "okay"; + + i2c5_max96752_gpio: i2c5-max96752-gpio { + compatible = "maxim,max96752-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c5_max96752_pinctrl 0 288 25>; + }; + }; + + i2c5_max96752_panel: i2c5-max96752-panel { + compatible = "maxim,max96752-panel"; + reg = <0x48>; + backlight = <&i2c5_max96745_backlight>; + panel-size= <346 194>; + + panel-timing { + clock-frequency = <148500000>; + hactive = <1920>; + vactive = <1080>; + hfront-porch = <20>; + hsync-len = <20>; + hback-porch = <20>; + vfront-porch = <250>; + vsync-len = <2>; + vback-porch = <8>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + + port { + i2c5_max96745_panel_in: endpoint { + remote-endpoint = <&i2c5_max96745_out>; + }; + }; + + }; + }; +}; + +&i2c6 { + pinctrl-0 = <&i2c6m3_xfer>; + clock-frequency = <400000>; + status = "okay"; + + max96755f@40 { + compatible = "maxim,max96755f"; + reg = <0x40>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6_serdes_pins>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + + pinctrl { + compatible = "maxim,max96755f-pinctrl"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6_max96755f_pinctrl_hog>; + + i2c6_max96755f_pinctrl_hog: hog { + i2c { + groups = "I2C"; + function = "I2C"; + }; + }; + + + i2c6_max96755f_panel_pins: panel-pins { + bl-pwm { + pins = "MFP18"; + function = "GPIO_TX_0"; + }; + }; + }; + + bridge { + compatible = "maxim,max96755f-bridge"; + lock-gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c6_max96755f_in: endpoint { + remote-endpoint = <&dsi1_out>; + }; + }; + + port@1 { + reg = <1>; + + i2c6_max96755f_out: endpoint { + remote-endpoint = <&i2c6_max96755f_panel_in>; + }; + }; + }; + }; + + gmsl@0 { + reg = <0>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + panel@48 { + compatible = "boe,av156fht-l83"; + reg = <0x48>; + backlight = <&i2c6_max96755f_backlight>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6_max96755f_panel_pins>; + + panel-timing { + clock-frequency = <148500000>; + hactive = <1920>; + vactive = <1080>; + hfront-porch = <20>; + hsync-len = <20>; + hback-porch = <20>; + vfront-porch = <250>; + vsync-len = <2>; + vback-porch = <8>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + + port { + i2c6_max96755f_panel_in: endpoint { + remote-endpoint = <&i2c6_max96755f_out>; + }; + }; + }; + }; + }; +}; + +&i2c7 { + pinctrl-0 = <&i2c7m3_xfer>; + clock-frequency = <400000>; + status = "disabled"; + + max96745@42 { + compatible = "maxim,max96745"; + reg = <0x42>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_serdes_pins>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + + pinctrl { + compatible = "maxim,max96745-pinctrl"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_max96745_pinctrl_hog>; + + i2c7_max96745_pinctrl_hog: hog { + i2c { + groups = "I2C"; + function = "I2C"; + }; + }; + + i2c7_max96745_panel_pins: panel-pins { + bl-pwm { + pins = "MFP0"; + function = "GPIO_TX_A_0"; + }; + }; + }; + + bridge { + compatible = "maxim,max96745-bridge"; + lock-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c7_max96745_in: endpoint { + remote-endpoint = <&edp1_out>; + }; + }; + + port@1 { + reg = <1>; + + i2c7_max96745_out: endpoint { + remote-endpoint = <&i2c7_max96745_panel_in>; + }; + }; + }; + }; + + gmsl@0 { + reg = <0>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + panel@48 { + compatible = "boe,av156fht-l83"; + reg = <0x48>; + backlight = <&i2c7_max96745_backlight>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_max96745_panel_pins>; + + panel-timing { + clock-frequency = <148500000>; + hactive = <1920>; + vactive = <1080>; + hfront-porch = <20>; + hsync-len = <20>; + hback-porch = <20>; + vfront-porch = <250>; + vsync-len = <2>; + vback-porch = <8>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + + port { + i2c7_max96745_panel_in: endpoint { + remote-endpoint = <&i2c7_max96745_out>; + }; + }; + }; + }; + }; +}; + +&i2c8 { + pinctrl-0 = <&i2c8m2_xfer>; + clock-frequency = <400000>; + status = "disabled"; + + max96745@42 { + compatible = "maxim,max96745"; + reg = <0x42>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c8_serdes_pins>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + + pinctrl { + compatible = "maxim,max96745-pinctrl"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c8_max96745_pinctrl_hog>; + + i2c8_max96745_pinctrl_hog: hog { + i2c { + groups = "I2C"; + function = "I2C"; + }; + }; + + i2c8_max96745_panel_pins: panel-pins { + bl-pwm { + pins = "MFP0"; + function = "GPIO_TX_A_0"; + }; + }; + }; + + bridge { + compatible = "maxim,max96745-bridge"; + lock-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c8_max96745_in: endpoint { + remote-endpoint = <&dp1_out>; + }; + }; + + port@1 { + reg = <1>; + + i2c8_max96745_out: endpoint { + remote-endpoint = <&i2c8_max96745_panel_in>; + }; + }; + }; + }; + + gmsl@0 { + reg = <0>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + + panel@48 { + compatible = "boe,av156fht-l83"; + reg = <0x48>; + backlight = <&i2c8_max96745_backlight>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c8_max96745_panel_pins>; + + panel-timing { + clock-frequency = <148500000>; + hactive = <1920>; + vactive = <1080>; + hfront-porch = <20>; + hsync-len = <20>; + hback-porch = <20>; + vfront-porch = <250>; + vsync-len = <2>; + vback-porch = <8>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + + port { + i2c8_max96745_panel_in: endpoint { + remote-endpoint = <&i2c8_max96745_out>; + }; + }; + }; + }; + }; +}; + +&pinctrl { + serdes { + i2c2_serdes_pins: i2c2-serdes-pins { + rockchip,pins = + <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + i2c4_serdes_pins: i2c4-serdes-pins { + rockchip,pins = + <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + i2c5_serdes_pins: i2c5-serdes-pins { + rockchip,pins = + <0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + i2c6_serdes_pins: i2c6-serdes-pins { + rockchip,pins = + <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + i2c7_serdes_pins: i2c7-serdes-pins { + rockchip,pins = + <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + i2c8_serdes_pins: i2c8-serdes-pins { + rockchip,pins = + <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&pwm0 { + pinctrl-0 = <&pwm0m2_pins>; + status = "okay"; +}; + +&pwm10 { + pinctrl-0 = <&pwm10m2_pins>; + status = "okay"; +}; + +&pwm11 { + pinctrl-0 = <&pwm11m3_pins>; + status = "okay"; +}; + +&pwm7 { + pinctrl-0 = <&pwm7m0_pins>; + status = "okay"; +}; + +&pwm13 { + pinctrl-0 = <&pwm13m1_pins>; + status = "okay"; +}; + +&pwm14 { + pinctrl-0 = <&pwm14m0_pins>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-vehicle-serdes-mfd-display-rohm.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-serdes-mfd-display-rohm.dtsi new file mode 100644 index 000000000000..1bc6c5e09b83 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-vehicle-serdes-mfd-display-rohm.dtsi @@ -0,0 +1,2680 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Rockchip Electronics Co., Ltd. + * + */ + +/ { + dsi2lvds_backlight1: dsi2lvds_backlight1 { + compatible = "pwm-backlight"; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + }; + + dp2lvds_backlight0: dp2lvds_backlight0 { + compatible = "pwm-backlight"; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + }; + + dp2lvds_backlight1: dp2lvds_backlight1 { + compatible = "pwm-backlight"; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + }; + + edp2lvds_backlight0: edp2lvds_backlight0 { + compatible = "pwm-backlight"; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + }; + + edp2lvds_backlight1: edp2lvds_backlight1 { + compatible = "pwm-backlight"; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + }; + + dsi2lvds_panel0 { + compatible = "simple-panel"; + backlight = <&backlight>; + + display-timings { + native-mode = <&dsi2lvds0>; + dsi2lvds0: timing0 { + clock-frequency = <115200000>;//115200000/105573600 + hactive = <1920>; + vactive = <720>; + hfront-porch = <56>; + hsync-len = <32>; + hback-porch = <56>; + vfront-porch = <200>; + vsync-len = <2>; + vback-porch = <8>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + panel0_in_i2c2_bu18rl82: endpoint { + remote-endpoint = <&i2c2_bu18rl82_out_panel0>; + }; + }; + }; + }; + + dsi2lvds_panel1 { + compatible = "simple-panel"; + backlight = <&dsi2lvds_backlight1>; + + display-timings { + native-mode = <&dsi2lvds1>; + dsi2lvds1: timing0 { + clock-frequency = <115200000>; + hactive = <1920>; + vactive = <720>; + hfront-porch = <56>; + hsync-len = <32>; + hback-porch = <56>; + vfront-porch = <200>; + vsync-len = <2>; + vback-porch = <8>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + panel1_in_i2c6_bu18rl82: endpoint { + remote-endpoint = <&i2c6_bu18rl82_out_panel1>; + }; + }; + }; + }; + + dp2lvds_panel0 { + compatible = "simple-panel"; + backlight = <&dp2lvds_backlight0>; + status = "okay"; + + panel-timing { + clock-frequency = <115200000>; + hactive = <1920>; + vactive = <720>; + hfront-porch = <56>; + hsync-len = <32>; + hback-porch = <56>; + vfront-porch = <200>; + vsync-len = <2>; + vback-porch = <8>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + + port { + panel0_in_i2c4_bu18rl82: endpoint { + remote-endpoint = <&i2c4_bu18rl82_out_panel0>; + }; + }; + }; + + dp2lvds_panel1 { + compatible = "simple-panel"; + backlight = <&dp2lvds_backlight1>; + status = "disabled"; + + panel-timing { + clock-frequency = <148500000>; + hactive = <1920>; + vactive = <1080>; + hfront-porch = <140>; + hsync-len = <40>; + hback-porch = <100>; + vfront-porch = <15>; + vsync-len = <20>; + vback-porch = <10>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + + port { + panel1_in_i2c8_bu18rl82: endpoint { + remote-endpoint = <&i2c8_bu18rl82_out_panel1>; + }; + }; + }; + + edp2lvds_panel0 { + compatible = "simple-panel"; + backlight = <&edp2lvds_backlight0>; + status = "okay"; + + panel-timing { + clock-frequency = <148500000>; + hactive = <1920>; + vactive = <1080>; + hfront-porch = <140>; + hsync-len = <40>; + hback-porch = <100>; + vfront-porch = <15>; + vsync-len = <20>; + vback-porch = <10>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + + port { + panel0_in_i2c5_bu18rl82: endpoint { + remote-endpoint = <&i2c5_bu18rl82_out_panel0>; + }; + }; + }; + + edp2lvds_panel1 { + compatible = "simple-panel"; + backlight = <&edp2lvds_backlight1>; + status = "disabled"; + + panel-timing { + clock-frequency = <148500000>; + hactive = <1920>; + vactive = <1080>; + hfront-porch = <140>; + hsync-len = <40>; + hback-porch = <100>; + vfront-porch = <15>; + vsync-len = <20>; + vback-porch = <10>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + + port { + panel1_in_i2c7_bu18rl82: endpoint { + remote-endpoint = <&i2c7_bu18rl82_out_panel1>; + }; + }; + }; +}; + +&backlight { + pwms = <&pwm0 0 25000 0>; + pinctrl-names = "default"; + pinctrl-0 = <&bl0_enable_pin>; + enable-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&dsi2lvds_backlight1 { + pwms = <&pwm13 0 25000 0>; + pinctrl-names = "default"; + pinctrl-0 = <&bl1_enable_pin>; + enable-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&dp0 { + //split-mode; + force-hpd; + status = "okay"; + + ports { + port@1 { + reg = <1>; + + dp0_out_i2c4_bu18tl82: endpoint { + remote-endpoint = <&i2c4_bu18tl82_in_dp0>; + }; + }; + }; +}; + +&dp0_in_vp0 { + status = "okay"; +}; + +&dp0_in_vp1 { + status = "disabled"; +}; + +&dp0_in_vp2 { + status = "disabled"; +}; + +&dp1 { + force-hpd; + status = "disabled"; + + ports { + port@1 { + reg = <1>; + + dp1_out_i2c8_bu18tl82: endpoint { + remote-endpoint = <&i2c8_bu18tl82_in_dp1>; + }; + }; + }; +}; + +&dp1_in_vp0 { + status = "okay"; +}; + +&dp1_in_vp1 { + status = "disabled"; +}; + +&dp1_in_vp2 { + status = "disabled"; +}; + +&dp2lvds_backlight0 { + pwms = <&pwm10 0 25000 0>; + pinctrl-names = "default"; + pinctrl-0 = <&bl2_enable_pin>; + enable-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&dp2lvds_backlight1 { + pwms = <&pwm14 0 25000 0>; + pinctrl-names = "default"; + pinctrl-0 = <&bl3_enable_pin>; + enable-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +/* + * mipi_dcphy0 needs to be enabled + * when dsi0 is enabled + */ +&dsi0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + dsi0_out_i2c2_bu18tl82: endpoint { + remote-endpoint = <&i2c2_bu18tl82_in_dsi0>; + }; + }; + }; +}; + +&dsi0_in_vp2 { + status = "okay"; +}; + +&dsi0_in_vp3 { + status = "disabled"; +}; + +/* + * mipi_dcphy1 needs to be enabled + * when dsi1 is enabled + */ +&dsi1 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + dsi1_out_i2c6_bu18tl82: endpoint { + remote-endpoint = <&i2c6_bu18tl82_in_dsi1>; + }; + }; + }; +}; + +&dsi1_in_vp2 { + status = "disabled"; +}; + +&dsi1_in_vp3 { + status = "okay"; +}; + +&edp0 { + //split-mode; + force-hpd; + status = "okay"; + + ports { + port@1 { + reg = <1>; + + edp0_out_i2c5_bu18tl82: endpoint { + remote-endpoint = <&i2c5_bu18tl82_in_edp0>; + }; + }; + }; +}; + +&edp0_in_vp0 { + status = "disabled"; +}; + +&edp0_in_vp1 { + status = "okay"; +}; + +&edp0_in_vp2 { + status = "disabled"; +}; + +&edp1 { + force-hpd; + status = "disabled"; + + ports { + port@1 { + reg = <1>; + + edp1_out_i2c7_bu18tl82: endpoint { + remote-endpoint = <&i2c7_bu18tl82_in_edp1>; + }; + }; + }; +}; + +&edp1_in_vp0 { + status = "disabled"; +}; + +&edp1_in_vp1 { + status = "okay"; +}; + +&edp1_in_vp2 { + status = "disabled"; +}; + +&edp2lvds_backlight0 { + pwms = <&pwm7 0 25000 0>; + pinctrl-names = "default"; + pinctrl-0 = <&bl4_enable_pin>; + enable-gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&edp2lvds_backlight1 { + pwms = <&pwm11 0 25000 0>; + pinctrl-names = "default"; + pinctrl-0 = <&bl5_enable_pin>; + enable-gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&hdmi0 { + status = "disabled"; +}; + +&hdmi1 { + status = "disabled"; +}; + +&hdptxphy0 { + status = "okay"; +}; + +&hdptxphy1 { + status = "okay"; +}; + +&hdptxphy_hdmi0 { + status = "disabled"; +}; + +&hdptxphy_hdmi1 { + status = "disabled"; +}; + +&i2c2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2m4_xfer>; + clock-frequency = <400000>; + + i2c2_bu18tl82: i2c2-bu18tl82@10 { + compatible = "rohm,bu18tl82"; + reg = <0x10>; + sel-mipi; + status = "okay"; + + serdes-init-sequence = [ + 0013 0019 + 0014 0008 //014h[3]-lane1 enable + 0021 0008 + 0023 0009 + 0024 0009 + 022b 0038 + 022c 0072 + 022d 0023 //VPLL=75MHZS + //022b 00d8 + //022c 0089 + //022d 003d //VPLL=99MHz (ref26MHz) 4032984*26/1024x1024=99M + 022e 0080 + 027c 0048 + 027d 0048 //i2c addr 0x48 + 0296 0004 + 0297 0009 //CLLTX0_PLL_GAIN 297h[3:2] 1001 2'b10: 1.2~2.3 Gbps/lane + //0297 000d //CLLTX0_PLL_GAIN 297h[3:2] 1101 2'b11: 2.2~3.6 Gbps/lane + 0018 00a5 + 0019 0069 + 0267 003d + 0268 002c + 0269 002c + 026a 002c + 026b 002c + 0367 003d + 0368 002c + 0369 002c + 036a 002c + 036b 002c + 0018 0000 + 0019 0000 + //002a 0018 //gpio0 input lcd_bl_pwm + //002d 0018 //gpio1 input lcd_pwr_en + + //0030 0018 //gpio2 input lcd_rst + //0033 0018 //gpio3 input tp_rst + //0034 0005 //bypass des gpio3 + //0036 0000 //gpio4 output tp_int + //0037 0006 //bypass des gpio4 + + 02a7 0002 + 02a8 0003 + 02a9 0004 + 02aa 0005 + 0045 0080 + 0046 0007 //1920 + 004b 00d0 + 004c 0002 //720 + 004d 00d0 + 004e 0002 //720 + 0051 0080 + 0052 0007 //1920 + 0053 0024 //CLLCH2_EN 53h[5] 0:1 Clock Tx lane/1:2 Clock Tx lanes + 0054 0080 + 024d 0061 + 0252 0005 + 0274 0030 //I2C slave address of BU18RL82 for accessing via BU18TL82 + 0275 0020 + 0396 0004 + 0397 0009 //CLLTX0_PLL_GAIN 397h[3:2] 1001 2'b10: 1.2~2.31 Gbps/lane + //0397 000d //CLLTX0_PLL_GAIN 397h[3:2] 1101 2'b11: 2.2~3.60 Gbps/lane + 0061 0003 //CLLTX0 enable CLLTX1 enable + 0060 0003 //CLLTX0/1 RGB data output Enable + /* TL82 Pattern Gen Set 1 + * Horizontal Gray Scale 256 steps + */ + 040A 0010 + 040B 0080 + 040C 0080 + 040D 0080 + 0444 0090 + 0446 00d2 + ]; + + i2c2_bu18tl82_pinctrl: i2c2-bu18tl82-pinctrl { + compatible = "rohm,bu18tl82-pinctrl"; + pinctrl-names = "default","sleep"; + pinctrl-0 = <&i2c2_bu18tl82_panel_pins>; + pinctrl-1 = <&i2c2_bu18tl82_panel_pins>; + status = "okay"; + + i2c2_bu18tl82_panel_pins: panel-pins { + lcd-bl-pwm { + pins = "BU18TL82_GPIO0"; + function = "SER_TO_DES_GPIO0"; + }; + + lcd-pwr-en { + pins = "BU18TL82_GPIO1"; + function = "SER_TO_DES_GPIO1"; + }; + + ser-irq { + pins = "BU18TL82_GPIO2"; + function = "DES_GPIO2_TO_SER"; + }; + + tp-int { + pins = "BU18TL82_GPIO3"; + function = "DES_GPIO4_TO_SER"; + }; + }; + + i2c2_bu18tl82_gpio: i2c2-bu18tl82-gpio { + compatible = "rohm,bu18tl82-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c2_bu18tl82_pinctrl 0 160 8>; + }; + }; + + i2c2_bu18tl82_bridge: i2c2-bu18tl82-bridge { + compatible = "rohm,bu18tl82-bridge"; + status = "okay"; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c2_bu18tl82_in_dsi0: endpoint { + remote-endpoint = <&dsi0_out_i2c2_bu18tl82>; + }; + }; + + port@1 { + reg = <1>; + + i2c2_bu18tl82_out_i2c2_bu18rl82: endpoint { + remote-endpoint = <&i2c2_bu18rl82_in_i2c2_bu18tl82>; + }; + }; + }; + }; + + i2c2_bu18rl82: i2c2-bu18rl82@30 { + compatible = "rohm,bu18rl82"; + reg = <0x30>; + status = "okay"; + + serdes-init-sequence = [ + 0011 0003 //Clockless Link Receiver Lane-0+ LVDS portA + 0012 0003 //Clockless Link Receiver Lane-1+ LVDS portB + 0013 0000 + 001d 0008 + 001f 0002 //LVDSTX0_REFSEL + 0020 0002 //LVDSTX1_REFSEL + 0031 0048 + 0032 0048 //i2c addr 0x48 + 0423 0000 + 0424 0000 + 0425 0020 + 0426 0080 + //0057 0000 + //0058 0002 + //0057 0000 //rl gpio0 output lcd_bl_pwm + //0058 0002 //bypass ser gpio0 + //005a 0000 //rl gpio1 output lcd_pwr_en + //005b 0003 //bypass ser gpio1 + //005d 0000 //rl gpio2 output lcd_rst + //005e 0004 //bypass ser gpio2 + //0060 0000 //rl gpio3 output tp-rst + //0061 0005 //bypass ser gpio3 + //0063 0018 //rl gpio4 input tp-int + //0064 0006 //bypass ser gpio4 + //0066 0000 //rl gpio5 output + //0067 0001 //set gpio5 high + + 0073 0080 + 0074 0007 //0x0780 = 1920 + 0075 0080 + 0076 0007 //0x0780 = 1920 + 0079 000a //h[3]: dual lvds mode h[1] single lane / dual lane + 007b 00d0 + 007c 0002 //0x02d0 = 720 + 007d 00d0 + 007e 0002 //0x02d0 = 720 + 0081 0003 //01---> Sync OFF + 0082 0010 //Hsync=16clk + 0084 001c //HBP=28clk + 0086 0002 //Vsync=2lines + 0087 0008 //VBP=8lines + 0088 0000 //VSYNC_CHG=0CLK + 0089 0010 //Hsync = 16? + 008b 001c //HFP=28clk? + 008d 0002 //Vsync=2lines? + 008e 0008 //VFP=8line? + 008f 0000 //VSYNC_CHG=0CLK? + 00d0 0040 //[3]FixHtotalEN + 00d8 00c0 + 00d9 0003 //DE=960 + 0429 000a //LVDSTX0_PLLGAIN 2'b10: 30 MHz ~ 80 MHz + 045d 0001 + 0529 000a //LVDSTX1_PLLGAIN 2'b10: 30 MHz ~ 80 MHz + 055d 0001 + 0091 0003 + 0090 0001 + /* RL82 Pattern Gen Set + * Vertical Gray Scale Color Bar + */ + 060A 00B0 + 060B 00FF + 060C 00FF + 060D 00FF + 0644 0090 + 0646 00d2 + ]; + + i2c2_bu18rl82_pinctrl: i2c2-bu18rl82-pinctrl { + compatible = "rohm,bu18rl82-pinctrl"; + pinctrl-names = "default","sleep"; + pinctrl-0 = <&i2c2_bu18rl82_panel_pins>; + pinctrl-1 = <&i2c2_bu18rl82_panel_sleep_pins>; + status = "okay"; + + i2c2_bu18rl82_panel_pins: panel-pins { + lcd-bl-pwm { + pins = "BU18RL82_GPIO0"; + function = "SER_GPIO0_TO_DES"; + }; + + lcd-pwr-en { + pins = "BU18RL82_GPIO1"; + function = "SER_GPIO1_TO_DES"; + }; + + lcd-rst { + pins = "BU18RL82_GPIO2"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + + tp-rst { + pins = "BU18RL82_GPIO3"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + + tp-int { + pins = "BU18RL82_GPIO4"; + function = "DES_TO_SER_GPIO3"; + }; + + lcd-otp-pin { + pins = "BU18RL82_GPIO5"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + }; + + i2c2_bu18rl82_panel_sleep_pins: panel-sleep-pins { + lcd-rst-sleep { + pins = "BU18RL82_GPIO2"; + function = "DES_GPIO_OUTPUT_LOW"; + }; + + tp-rst-sleep { + pins = "BU18RL82_GPIO3"; + function = "DES_GPIO_OUTPUT_LOW"; + }; + + lcd-otp-pin-sleep { + pins = "BU18RL82_GPIO5"; + function = "DES_GPIO_OUTPUT_LOW"; + }; + }; + + i2c2_bu18rl82_gpio: i2c2-bu18rl82-gpio { + compatible = "rohm,bu18rl82-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c2_bu18rl82_pinctrl 0 169 8>; + }; + }; + + i2c2_bu18rl82_bridge: i2c2-bu18rl82-bridge { + compatible = "rohm,bu18rl82-bridge"; + status = "okay"; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c2_bu18rl82_in_i2c2_bu18tl82: endpoint { + remote-endpoint = <&i2c2_bu18tl82_out_i2c2_bu18rl82>; + }; + }; + + port@1 { + reg = <1>; + + i2c2_bu18rl82_out_panel0: endpoint { + remote-endpoint = <&panel0_in_i2c2_bu18rl82>; + }; + }; + }; + }; + + himax@48 { + compatible = "himax,hxcommon"; + reg = <0x48>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&touch_gpio_dsi0>; + pinctrl-1 = <&touch_gpio_dsi0>; + himax,location = "himax-touch-dsi0"; + //himax,irq-gpio = <&gpio1 RK_PB0 IRQ_TYPE_EDGE_FALLING>; + himax,rst-gpio = <&i2c2_bu18rl82_gpio 3 GPIO_ACTIVE_LOW>; + himax,panel-coords = <0 1920 0 720>; + himax,display-coords = <0 1920 0 720>; + status = "okay"; + }; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4m2_xfer>; + clock-frequency = <400000>; + status = "okay"; + + i2c4_bu18tl82: i2c4-bu18tl82@10 { + compatible = "rohm,bu18tl82"; + reg = <0x10>; + status = "okay"; + + serdes-init-sequence = [ + 0013 001a //013h[3]1-lane1 enable 013h[3] 1-LVDS Receiver Port-A + 0014 000a //014h[3]1-lane1 enable 014h[3] 1-LVDS Receiver Port-B + 0021 0008 + 0023 0009 + 0024 0009 + 022b 0038 + 022c 0072 + 022d 0023 //VPLL=75MHZS + //022b 00d8 + //022c 0089 + //022d 003d //VPLL=99MHz (ref26MHz) 4032984*26/1024x1024=99M + 022e 0080 + ffff 1000 //delay 0x1000us + 027c 0048 + 027d 0048 //i2c addr 0x48 + 0296 0004 + 0297 0009 //CLLTX0_PLL_GAIN 397h[3:2] 1001 2'b10: 1.2~2.31 Gbps/lane + //0297 000d //CLLTX0_PLL_GAIN 297h[3:2] 1101 2'b11: 2.2~3.60 Gbps/lane + 0018 00a5 + 0019 0069 + 0267 003d + 0268 002c + 0269 002c + 026a 002c + 026b 002c + 0367 003d + 0368 002c + 0369 002c + 036a 002c + 036b 002c + 0018 0000 + 0019 0000 + //002a 0018 //gpio0 input lcd_bl_pwm + //002d 0018 //gpio1 input lcd_pwr_en + + //0030 0018 //gpio2 input lcd_rst + //0033 0018 //gpio3 input tp_rst + //0034 0005 //bypass des gpio3 + //0036 0000 //gpio4 output tp_int + //0037 0006 //bypass des gpio4 + + 02a7 0002 + 02a8 0003 + 02a9 0004 + 02aa 0005 + 0045 0080 + 0046 0007 //1920 + 004b 00d0 + 004c 0002 //720 + 004d 00d0 + 004e 0002 //720 + 0051 0080 + 0052 0007 //1920 + 0053 0064 //0053h[6]1:2 Rx ports CLLCH2_EN 53h[5] 1:2 Clock Tx lanes + 024d 0061 + 0252 0005 + 0274 0030 + 0275 0020 + 0396 0004 + 0397 0009 //CLLTX0_PLL_GAIN 397h[3:2] 1001 2'b10: 1.2~2.3 Gbps/lane + //0397 000d //CLLTX0_PLL_GAIN 397h[3:2] 1101 2'b11: 2.2~3.6 Gbps/lane + 0061 0003 //CLLTX0 enable CLLTX1 enable + 0060 0003 //CLLTX0/1 RGB data output Enable + /* TL82 Pattern Gen Set 1 + * Horizontal Gray Scale 256 steps + */ + 040A 0010 + 040B 0080 + 040C 0080 + 040D 0080 + 0444 0090 //h_blank=144 + 0446 00d2 //v_blank=210 + ]; + + i2c4_bu18tl82_pinctrl: i2c4-bu18tl82-pinctrl { + compatible = "rohm,bu18tl82-pinctrl"; + pinctrl-names = "default","sleep"; + pinctrl-0 = <&i2c4_bu18tl82_panel_pins>; + pinctrl-1 = <&i2c4_bu18tl82_panel_pins>; + status = "okay"; + + i2c4_bu18tl82_panel_pins: panel-pins { + lcd-bl-pwm { + pins = "BU18TL82_GPIO0"; + function = "SER_TO_DES_GPIO0"; + }; + + lcd-pwr-en { + pins = "BU18TL82_GPIO1"; + function = "SER_TO_DES_GPIO1"; + }; + + ser-irq { + pins = "BU18TL82_GPIO2"; + function = "DES_GPIO2_TO_SER"; + }; + + tp-int { + pins = "BU18TL82_GPIO3"; + function = "DES_GPIO4_TO_SER"; + }; + + }; + + i2c4_bu18tl82_gpio: i2c4-bu18tl82-gpio { + compatible = "rohm,bu18tl82-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c4_bu18tl82_pinctrl 0 178 8>; + }; + }; + + i2c4_bu18tl82_bridge: i2c4-bu18tl82-bridge { + compatible = "rohm,bu18tl82-bridge"; + status = "okay"; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c4_bu18tl82_in_dp0: endpoint { + remote-endpoint = <&dp0_out_i2c4_bu18tl82>; + }; + }; + + port@1 { + reg = <1>; + + i2c4_bu18tl82_out_i2c4_bu18rl82: endpoint { + remote-endpoint = <&i2c4_bu18rl82_in_i2c4_bu18tl82>; + }; + }; + }; + }; + + i2c4_bu18rl82: i2c4-bu18rl82@30 { + compatible = "rohm,bu18rl82"; + reg = <0x30>; + status = "okay"; + + serdes-init-sequence = [ + 0011 0003 //Clockless Link Receiver Lane-0+ LVDS portA + 0012 0003 //Clockless Link Receiver Lane-1+ LVDS portB + 0013 0000 + 001d 0008 + 001f 0002 //LVDSTX0_REFSEL + 0020 0002 //LVDSTX1_REFSEL + 0031 0048 + 0032 0048 //i2c addr 0x48 + 0423 0000 + 0424 0000 + 0425 0020 + 0426 0080 + //0057 0000 + //0058 0002 + //0057 0000 //rl gpio0 output lcd_bl_pwm + //0058 0002 //bypass ser gpio0 + //005a 0000 //rl gpio1 output lcd_pwr_en + //005b 0003 //bypass ser gpio1 + //005d 0000 //rl gpio2 output lcd_rst + //005e 0004 //bypass ser gpio2 + //0060 0000 //rl gpio3 output tp-rst + //0061 0005 //bypass ser gpio3 + //0063 0018 //rl gpio4 input tp-int + //0064 0006 //bypass ser gpio4 + //0066 0000 //rl gpio5 output + //0067 0001 //set gpio5 high + + 0073 0080 + 0074 0007 //0x0780 = 1920 + 0075 0080 + 0076 0007 //0x0780 = 1920 + 0079 000a //h[3]: dual lvds mode h[1] single lane / dual lane + 007b 00d0 + 007c 0002 //0x02d0 = 720 + 007d 00d0 + 007e 0002 //0x02d0 = 720 + 0081 0003 //01---> Sync OFF + 0082 0010 //Hsync=16clk + 0084 001c //HBP=28clk + 0086 0002 //Vsync=2lines + 0087 0008 //VBP=8lines + 0088 0000 //VSYNC_CHG=0CLK + 0089 0010 //Hsync = 16? + 008b 001c //HFP=28clk? + 008d 0002 //Vsync=2lines? + 008e 0008 //VFP=8line? + 008f 0000 //VSYNC_CHG=0CLK? + 00d0 0040 //[3]FixHtotalEN + 00d8 00c0 + 00d9 0003 //DE=960 + 0429 000a //LVDSTX0_PLLGAIN 2'b10: 30 MHz ~ 80 MHz + 045d 0001 + 0529 000a //LVDSTX1_PLLGAIN 2'b10: 30 MHz ~ 80 MHz + 055d 0001 + 0091 0003 + 0090 0001 + /* RL82 Pattern Gen Set + * Vertical Gray Scale Color Bar + */ + 060A 00B0 + 060B 00FF + 060C 00FF + 060D 00FF + 0644 0090 + 0646 00d2 + ]; + + i2c4_bu18rl82_pinctrl: i2c4-bu18rl82-pinctrl { + compatible = "rohm,bu18rl82-pinctrl"; + pinctrl-names = "default","sleep"; + pinctrl-0 = <&i2c4_bu18rl82_panel_pins>; + pinctrl-1 = <&i2c4_bu18rl82_panel_sleep_pins>; + status = "okay"; + + i2c4_bu18rl82_panel_pins: panel-pins { + lcd-bl-pwm { + pins = "BU18RL82_GPIO0"; + function = "SER_GPIO0_TO_DES"; + }; + + lcd-pwr-en { + pins = "BU18RL82_GPIO1"; + function = "SER_GPIO1_TO_DES"; + }; + + lcd-rst { + pins = "BU18RL82_GPIO2"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + + tp-rst { + pins = "BU18RL82_GPIO3"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + + tp-int { + pins = "BU18RL82_GPIO4"; + function = "DES_TO_SER_GPIO3"; + }; + + lcd-otp-pin { + pins = "BU18RL82_GPIO5"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + }; + + i2c4_bu18rl82_panel_sleep_pins: panel-sleep-pins { + lcd-rst-sleep { + pins = "BU18RL82_GPIO2"; + function = "DES_GPIO_OUTPUT_LOW"; + }; + + tp-rst-sleep { + pins = "BU18RL82_GPIO3"; + function = "DES_GPIO_OUTPUT_LOW"; + }; + + lcd-otp-pin-sleep { + pins = "BU18RL82_GPIO5"; + function = "DES_GPIO_OUTPUT_LOW"; + }; + }; + + i2c4_bu18rl82_gpio: i2c4-bu18rl82-gpio { + compatible = "rohm,bu18rl82-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c4_bu18rl82_pinctrl 0 187 8>; + }; + }; + + i2c4_bu18rl82_bridge: i2c4-bu18rl82-bridge { + compatible = "rohm,bu18rl82-bridge"; + status = "okay"; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c4_bu18rl82_in_i2c4_bu18tl82: endpoint { + remote-endpoint = <&i2c4_bu18tl82_out_i2c4_bu18rl82>; + }; + }; + + port@1 { + reg = <1>; + + i2c4_bu18rl82_out_panel0: endpoint { + remote-endpoint = <&panel0_in_i2c4_bu18rl82>; + }; + }; + }; + }; + + himax@48 { + compatible = "himax,hxcommon"; + reg = <0x48>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&touch_gpio_dp0>; + pinctrl-1 = <&touch_gpio_dp0>; + himax,location = "himax-touch-dp0"; + himax,irq-gpio = <&gpio3 RK_PC5 IRQ_TYPE_EDGE_FALLING>; + himax,rst-gpio = <&i2c4_bu18rl82_gpio 3 GPIO_ACTIVE_LOW>; + himax,panel-coords = <0 1920 0 720>; + himax,display-coords = <0 1920 0 720>; + status = "okay"; + }; + + lt7911d@2b { + compatible = "lontium,lt7911d-fb-notifier"; + reg = <0x2b>; + reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; + status = "okay"; + }; +}; + +&i2c5 { + clock-frequency = <400000>; + status = "okay"; + + i2c5_bu18tl82: i2c5-bu18tl82@10 { + compatible = "rohm,bu18tl82"; + reg = <0x10>; + status = "okay"; + + serdes-init-sequence = [ + 0013 001a + 0014 000a + 0021 0008 + 0023 0009 + 0024 0009 + //002a 0018 //gpio0 input lcd_bl_pwm + //002d 0018 //gpio1 input lcd_pwr_en + + //0030 0018 //gpio2 input lcd_rst + //0033 0000 //gpio3 output tp_int + //0034 0005 //bypass des gpio3 + //0036 0018 //gpio4 input tp_rst + //0037 0006 //bypass des gpio4 + 027c 0041 + 027d 0041 + 0045 0080 + 0046 0007 + 004b 0038 + 004c 0004 + 0053 0064 + 022b 0062 + 022c 0027 + 022d 002e + 0274 0030 + 0275 0020 + 0296 0004 + 0297 000d + 02b2 00c8 + 02b4 0001 + 02b8 00ff + 02b9 000f + 02ba 00ff + 02bb 000f + 02be 00ff + 02bf 001f + 02c2 00ff + 02c3 001f + 0396 0004 + 0397 000d + 03b2 00c8 + 03b4 0001 + 03b8 00ff + 03b9 000f + 03ba 00ff + 03bb 000f + 03be 00ff + 03bf 001f + 03c2 00ff + 03c3 001f + 0060 0001 + 0061 0003 + 022e 0080 + 032e 0080 + /* TL82 Pattern Gen Set 1 + * Horizontal Gray Scale 256 steps + */ + 040A 0010 + 040B 0080 + 040C 0080 + 040D 0080 + 0444 0019 + 0445 0020 + 0446 001f + ]; + + i2c5_bu18tl82_pinctrl: i2c5-bu18tl82-pinctrl { + compatible = "rohm,bu18tl82-pinctrl"; + pinctrl-names = "default","sleep"; + pinctrl-0 = <&i2c5_bu18tl82_panel_pins>; + pinctrl-1 = <&i2c5_bu18tl82_panel_pins>; + status = "okay"; + + i2c5_bu18tl82_panel_pins: panel-pins { + lcd-bl-pwm { + pins = "BU18TL82_GPIO0"; + function = "SER_TO_DES_GPIO0"; + }; + + lcd-pwr-en { + pins = "BU18TL82_GPIO1"; + function = "SER_TO_DES_GPIO1"; + }; + + ser-irq { + pins = "BU18TL82_GPIO2"; + function = "DES_GPIO2_TO_SER"; + }; + + tp-int { + pins = "BU18TL82_GPIO3"; + function = "DES_GPIO3_TO_SER"; + }; + }; + + + i2c5_bu18tl82_gpio: i2c5-bu18tl82-gpio { + compatible = "rohm,bu18tl82-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c5_bu18tl82_pinctrl 0 196 8>; + }; + }; + + i2c5_bu18tl82_bridge: i2c5-bu18tl82-bridge { + compatible = "rohm,bu18tl82-bridge"; + status = "okay"; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c5_bu18tl82_in_edp0: endpoint { + remote-endpoint = <&edp0_out_i2c5_bu18tl82>; + }; + }; + + port@1 { + reg = <1>; + + i2c5_bu18tl82_out_i2c5_bu18rl82: endpoint { + remote-endpoint = <&i2c5_bu18rl82_in_i2c5_bu18tl82>; + }; + }; + }; + }; + + i2c5_bu18rl82: i2c5-bu18rl82@30 { + compatible = "rohm,bu18rl82"; + reg = <0x30>; + status = "okay"; + + serdes-init-sequence = [ + 0011 000b + 0012 0003 + 0013 0001 + 001d 0008 + 001f 0002 + 0020 0002 + 0031 0041 //i2c addr 0x41 + 0032 0041 //i2c addr 0x41 + //0057 0000 //rl gpio0 output lcd_bl_pwm + //0058 0002 //bypass ser gpio0 + //005a 0000 //rl gpio1 output lcd_pwr_en + //005b 0001 //bypass ser gpio1 + //005d 0000 //rl gpio2 output lcd_rst + //005e 0004 //bypass ser gpio2 + //0060 0018 //rl gpio3 input tp-int + //042e 0005 //bypass ser gpio3 + //0061 0005 //bypass ser gpio3 + //0063 0000 //rl gpio4 output tp-rst + //042f 0006 //bypass ser gpio4 + //0064 0006 //bypass ser gpio4 + //0066 0000 //rl gpio5 output + //0067 0007 //bypass ser gpio5 + 0073 0080 + 0074 0007 + 0079 000a + 007b 0038 + 007c 0004 + 0081 0003 + 0082 0010 + 0084 0020 + 0086 0002 + 0087 0002 + 0088 0010 + 0089 0010 + 008b 0020 + 008d 0002 + 008e 0002 + 008f 0010 + 00d0 0040 + 00d8 0042 + 00d9 0004 + 0423 0002 + 0424 00ec + 0425 0027 + 0429 000a + 045d 0001 + 0529 000a + 055d 0003 + 0090 0001 + 0091 0003 + 0426 0080 + 042d 0004 + /* RL82 Pattern Gen Set + * Vertical Gray Scale Color Bar + */ + 060A 00B0 + 060B 00FF + 060C 00FF + 060D 00FF + 0644 0019 + 0645 0020 + 0646 001f + ]; + + i2c5_bu18rl82_pinctrl: i2c5-bu18rl82-pinctrl { + compatible = "rohm,bu18rl82-pinctrl"; + pinctrl-names = "default","sleep"; + pinctrl-0 = <&i2c5_bu18rl82_panel_pins>; + pinctrl-1 = <&i2c5_bu18rl82_panel_sleep_pins>; + status = "okay"; + + i2c5_bu18rl82_panel_pins: panel-pins { + lcd-bl-pwm { + pins = "BU18RL82_GPIO0"; + function = "SER_GPIO0_TO_DES"; + }; + + lcd-pwr-en { + pins = "BU18RL82_GPIO1"; + function = "SER_GPIO1_TO_DES"; + }; + + lcd-rst { + pins = "BU18RL82_GPIO2"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + + tp-int { + pins = "BU18RL82_GPIO3"; + function = "DES_TO_SER_GPIO3"; + }; + + tp-rst { + pins = "BU18RL82_GPIO4"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + + lcd-otp-pin { + pins = "BU18RL82_GPIO5"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + }; + + i2c5_bu18rl82_panel_sleep_pins: panel-sleep-pins { + lcd-rst-sleep { + pins = "BU18RL82_GPIO2"; + function = "DES_GPIO_OUTPUT_LOW"; + }; + + tp-rst-sleep { + pins = "BU18RL82_GPIO4"; + function = "DES_GPIO_OUTPUT_LOW"; + }; + + lcd-otp-pin-sleep { + pins = "BU18RL82_GPIO5"; + function = "DES_GPIO_OUTPUT_LOW"; + }; + }; + + i2c5_bu18rl82_gpio: i2c5-bu18rl82-gpio { + compatible = "rohm,bu18rl82-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c5_bu18rl82_pinctrl 0 205 8>; + }; + }; + + i2c5_bu18rl82_bridge: i2c5-bu18rl82-bridge { + compatible = "rohm,bu18rl82-bridge"; + status = "okay"; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c5_bu18rl82_in_i2c5_bu18tl82: endpoint { + remote-endpoint = <&i2c5_bu18tl82_out_i2c5_bu18rl82>; + }; + }; + + port@1 { + reg = <1>; + + i2c5_bu18rl82_out_panel0: endpoint { + remote-endpoint = <&panel0_in_i2c5_bu18rl82>; + }; + }; + }; + }; + + ilitek@41 { + compatible = "ilitek,ili251x"; + reg = <0x41>; + interrupt-parent = <&gpio1>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&touch_gpio_edp0>; + //reset-gpio = <&gpio0 RK_PD1 GPIO_ACTIVE_LOW>; + ilitek,name = "ilitek_i2c"; + status = "okay"; + }; + + lt7911d@2b { + compatible = "lontium,lt7911d-fb-notifier"; + reg = <0x2b>; + reset-gpios = <&gpio0 RK_PD2 GPIO_ACTIVE_LOW>; + status = "okay"; + }; +}; + +&i2c6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c6m3_xfer>; + clock-frequency = <400000>; + + i2c6_bu18tl82: i2c6-bu18tl82@10 { + compatible = "rohm,bu18tl82"; + reg = <0x10>; + sel-mipi; + status = "okay"; + + serdes-init-sequence = [ + 0013 0019 + 0014 0008 //014h[3]-lane1 enable + 0021 0008 + 0023 0009 + 0024 0009 + 022b 0038 + 022c 0072 + 022d 0023 //VPLL=75MHZS + //022b 00d8 + //022c 0089 + //022d 003d //VPLL=99MHz (ref26MHz) 4032984*26/1024x1024=99M + 022e 0080 + 027c 0048 + 027d 0048 //i2c addr 0x48 + 0296 0004 + 0297 0009 //CLLTX0_PLL_GAIN 397h[3:2] 1001 2'b10: 1.2~2.3 Gbps/lane + //0297 000d //CLLTX0_PLL_GAIN 297h[3:2] 1101 2'b11: 2.2~3.6 Gbps/lane + 0018 00a5 + 0019 0069 + 0267 003d + 0268 002c + 0269 002c + 026a 002c + 026b 002c + 0367 003d + 0368 002c + 0369 002c + 036a 002c + 036b 002c + 0018 0000 + 0019 0000 + //002a 0018 //gpio0 input lcd_bl_pwm + //002d 0018 //gpio1 input lcd_pwr_en + + //0030 0018 //gpio2 input lcd_rst + //0033 0018 //gpio3 input tp_rst + //0034 0005 //bypass des gpio3 + //0036 0000 //gpio4 output tp_int + //0037 0006 //bypass des gpio4 + + 02a7 0002 + 02a8 0003 + 02a9 0004 + 02aa 0005 + 0045 0080 + 0046 0007 //1920 + 004b 00d0 + 004c 0002 //720 + 004d 00d0 + 004e 0002 //720 + 0051 0080 + 0052 0007 //1920 + 0053 0024 //CLLCH2_EN 53h[5] 0:1 Clock Tx lane/1:2 Clock Tx lanes + 0054 0080 + 024d 0061 + 0252 0005 + 0274 0030 + 0275 0020 + 0396 0004 + 0397 0009 //CLLTX0_PLL_GAIN 397h[3:2] 1001 2'b10: 1.2~2.3 Gbps/lane + //0397 000d //CLLTX0_PLL_GAIN 397h[3:2] 1101 2'b11: 2.2~3.6 Gbps/lane + 0061 0003 //CLLTX0 enable CLLTX1 enable + 0060 0003 //CLLTX0/1 RGB data output Enable + /* TL82 Pattern Gen Set 1 + * Horizontal Gray Scale 256 steps + */ + 040A 0010 + 040B 0080 + 040C 0080 + 040D 0080 + 0444 0090 //h_blank=144 + 0446 00d2 //v_blank=210 + + + ]; + + i2c6_bu18tl82_pinctrl: i2c6-bu18tl82-pinctrl { + compatible = "rohm,bu18tl82-pinctrl"; + pinctrl-names = "default","sleep"; + pinctrl-0 = <&i2c6_bu18tl82_panel_pins>; + pinctrl-1 = <&i2c6_bu18tl82_panel_pins>; + status = "okay"; + + i2c6_bu18tl82_panel_pins: panel-pins { + lcd-bl-pwm { + pins = "BU18TL82_GPIO0"; + function = "SER_TO_DES_GPIO0"; + }; + + lcd-pwr-en { + pins = "BU18TL82_GPIO1"; + function = "SER_TO_DES_GPIO1"; + }; + + ser-irq { + pins = "BU18TL82_GPIO2"; + function = "DES_GPIO2_TO_SER"; + }; + + tp-int { + pins = "BU18TL82_GPIO3"; + function = "DES_GPIO4_TO_SER"; + }; + }; + + + i2c6_bu18tl82_gpio: i2c6-bu18tl82-gpio { + compatible = "rohm,bu18tl82-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c6_bu18tl82_pinctrl 0 214 8>; + }; + }; + + i2c6_bu18tl82_bridge: i2c6-bu18tl82-bridge { + compatible = "rohm,bu18tl82-bridge"; + status = "okay"; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c6_bu18tl82_in_dsi1: endpoint { + remote-endpoint = <&dsi1_out_i2c6_bu18tl82>; + }; + }; + + port@1 { + reg = <1>; + + i2c6_bu18tl82_out_i2c6_bu18rl82: endpoint { + remote-endpoint = <&i2c6_bu18rl82_in_i2c6_bu18tl82>; + }; + }; + }; + }; + + i2c6_bu18rl82: i2c6-bu18rl82@30 { + compatible = "rohm,bu18rl82"; + reg = <0x30>; + status = "okay"; + + serdes-init-sequence = [ + 0011 0003 //Clockless Link Receiver Lane-0+ LVDS portA + 0012 0003 //Clockless Link Receiver Lane-1+ LVDS portB + 0013 0000 + 001d 0008 + 001f 0002 //LVDSTX0_REFSEL + 0020 0002 //LVDSTX1_REFSEL + 0031 0048 + 0032 0048 //i2c addr 0x48 + 0423 0000 + 0424 0000 + 0425 0020 + 0426 0080 + //0057 0000 + //0058 0002 + //0057 0000 //rl gpio0 output lcd_bl_pwm + //0058 0002 //bypass ser gpio0 + //005a 0000 //rl gpio1 output lcd_pwr_en + //005b 0003 //bypass ser gpio1 + //005d 0000 //rl gpio2 output lcd_rst + //005e 0004 //bypass ser gpio2 + //0060 0000 //rl gpio3 output tp-rst + //0061 0005 //bypass ser gpio3 + //0063 0018 //rl gpio4 input tp-int + //0064 0006 //bypass ser gpio4 + //0066 0000 //rl gpio5 output + //0067 0001 //set gpio5 high + + 0073 0080 + 0074 0007 //0x0780 = 1920 + 0075 0080 + 0076 0007 //0x0780 = 1920 + 0079 000a //h[3]: dual lvds mode h[1] single lane / dual lane + 007b 00d0 + 007c 0002 //0x02d0 = 720 + 007d 00d0 + 007e 0002 //0x02d0 = 720 + 0081 0003 //01---> Sync OFF + 0082 0010 //Hsync=16clk + 0084 001c //HBP=28clk + 0086 0002 //Vsync=2lines + 0087 0008 //VBP=8lines + 0088 0000 //VSYNC_CHG=0CLK + 0089 0010 //Hsync = 16? + 008b 001c //HFP=28clk? + 008d 0002 //Vsync=2lines? + 008e 0008 //VFP=8line? + 008f 0000 //VSYNC_CHG=0CLK? + 00d0 0040 //[3]FixHtotalEN + 00d8 00c0 + 00d9 0003 //DE=960 + 0429 000a //LVDSTX0_PLLGAIN 2'b10: 30 MHz ~ 80 MHz + 045d 0001 + 0529 000a //LVDSTX1_PLLGAIN 2'b10: 30 MHz ~ 80 MHz + 055d 0001 + 0091 0003 + 0090 0001 + /* RL82 Pattern Gen Set + * Vertical Gray Scale Color Bar + */ + 060A 00B0 + 060B 00FF + 060C 00FF + 060D 00FF + 0644 0090 + 0646 00d2 + ]; + + i2c6_bu18rl82_pinctrl: i2c6-bu18rl82-pinctrl { + compatible = "rohm,bu18rl82-pinctrl"; + pinctrl-names = "default","sleep"; + pinctrl-0 = <&i2c6_bu18rl82_panel_pins>; + pinctrl-1 = <&i2c6_bu18rl82_panel_sleep_pins>; + status = "okay"; + + i2c6_bu18rl82_panel_pins: panel-pins { + lcd-bl-pwm { + pins = "BU18RL82_GPIO0"; + function = "SER_GPIO0_TO_DES"; + }; + + lcd-pwr-en { + pins = "BU18RL82_GPIO1"; + function = "SER_GPIO1_TO_DES"; + }; + + lcd-rst { + pins = "BU18RL82_GPIO2"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + + tp-rst { + pins = "BU18RL82_GPIO3"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + + tp-int { + pins = "BU18RL82_GPIO4"; + function = "DES_TO_SER_GPIO3"; + }; + + lcd-otp-pin { + pins = "BU18RL82_GPIO5"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + }; + + i2c6_bu18rl82_panel_sleep_pins: panel-sleep-pins { + lcd-rst-sleep { + pins = "BU18RL82_GPIO2"; + function = "DES_GPIO_OUTPUT_LOW"; + }; + + tp-rst-sleep { + pins = "BU18RL82_GPIO3"; + function = "DES_GPIO_OUTPUT_LOW"; + }; + + lcd-otp-pin-sleep { + pins = "BU18RL82_GPIO5"; + function = "DES_GPIO_OUTPUT_LOW"; + }; + }; + + i2c6_bu18rl82_gpio: i2c6-bu18rl82-gpio { + compatible = "rohm,bu18rl82-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c6_bu18rl82_pinctrl 0 223 8>; + }; + }; + + i2c6_bu18rl82_bridge: i2c6-bu18rl82-bridge { + compatible = "rohm,bu18rl82-bridge"; + status = "okay"; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c6_bu18rl82_in_i2c6_bu18tl82: endpoint { + remote-endpoint = <&i2c6_bu18tl82_out_i2c6_bu18rl82>; + }; + }; + + port@1 { + reg = <1>; + + i2c6_bu18rl82_out_panel1: endpoint { + remote-endpoint = <&panel1_in_i2c6_bu18rl82>; + }; + }; + }; + }; + + himax@48 { + compatible = "himax,hxcommon"; + reg = <0x48>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&touch_gpio_dsi1>; + pinctrl-1 = <&touch_gpio_dsi1>; + himax,location = "himax-touch-dsi1"; + himax,irq-gpio = <&gpio1 RK_PB7 IRQ_TYPE_EDGE_FALLING>; + himax,rst-gpio = <&i2c6_bu18rl82_gpio 3 GPIO_ACTIVE_LOW>; + himax,panel-coords = <0 1920 0 720>; + himax,display-coords = <0 1920 0 720>; + status = "okay"; + }; +}; + +&i2c7 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c7m3_xfer>; + clock-frequency = <400000>; + status = "disabled"; + + i2c7_bu18tl82: i2c7-bu18tl82@10 { + compatible = "rohm,bu18tl82"; + reg = <0x10>; + status = "okay"; + + serdes-init-sequence = [ + 0013 001a + 0014 000a + 0021 0008 + 0023 0009 + 0024 0009 + 002a 0018 //gpio0 input lcd_bl_pwm + 002d 0018 //gpio1 input lcd_pwr_en + + 0030 0018 //gpio2 input lcd_rst + 0033 0000 //gpio3 output tp_int + 0034 0005 //bypass des gpio3 + 0036 0018 //gpio4 input tp_rst + 0037 0006 //bypass des gpio4 + 027c 0041 + 027d 0041 + 0045 0080 + 0046 0007 + 004b 0038 + 004c 0004 + 0053 0064 + 022b 0062 + 022c 0027 + 022d 002e + 0274 0030 + 0275 0020 + 0296 0004 + 0297 000d + 02b2 00c8 + 02b4 0001 + 02b8 00ff + 02b9 000f + 02ba 00ff + 02bb 000f + 02be 00ff + 02bf 001f + 02c2 00ff + 02c3 001f + 0396 0004 + 0397 000d + 03b2 00c8 + 03b4 0001 + 03b8 00ff + 03b9 000f + 03ba 00ff + 03bb 000f + 03be 00ff + 03bf 001f + 03c2 00ff + 03c3 001f + 0060 0001 + 0061 0003 + 022e 0080 + 032e 0080 + /* TL82 Pattern Gen Set 1 + * Horizontal Gray Scale 256 steps + */ + 040A 0010 + 040B 0080 + 040C 0080 + 040D 0080 + 0444 0019 + 0445 0020 + 0446 001f + ]; + + i2c7_bu18tl82_pinctrl: i2c7-bu18tl82-pinctrl { + compatible = "rohm,bu18tl82-pinctrl"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_bu18tl82_panel_pins>; + status = "okay"; + + i2c7_bu18tl82_panel_pins: panel-pins { + lcd-bl-pwm { + pins = "BU18TL82_GPIO0"; + function = "SER_TO_DES_GPIO0"; + }; + + lcd-pwr-en { + pins = "BU18TL82_GPIO1"; + function = "SER_TO_DES_GPIO1"; + }; + + ser-irq { + pins = "BU18TL82_GPIO2"; + function = "DES_GPIO2_TO_SER"; + }; + + tp-int { + pins = "BU18TL82_GPIO3"; + function = "DES_GPIO4_TO_SER"; + }; + }; + + + i2c7_bu18tl82_gpio: i2c7-bu18tl82-gpio { + compatible = "rohm,bu18tl82-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c7_bu18tl82_pinctrl 0 232 8>; + }; + }; + + i2c7_bu18tl82_bridge: i2c7-bu18tl82-bridge { + compatible = "rohm,bu18tl82-bridge"; + status = "okay"; + }; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c7_bu18tl82_in_edp1: endpoint { + remote-endpoint = <&edp1_out_i2c7_bu18tl82>; + }; + }; + + port@1 { + reg = <1>; + + i2c7_bu18tl82_out_i2c7_bu18rl82: endpoint { + remote-endpoint = <&i2c7_bu18rl82_in_i2c7_bu18tl82>; + }; + }; + }; + }; + + i2c7_bu18rl82: i2c7-bu18rl82@30 { + compatible = "rohm,bu18rl82"; + reg = <0x30>; + status = "okay"; + serdes-init-sequence = [ + 0011 000b + 0012 0003 + 0013 0001 + 001d 0008 + 001f 0002 + 0020 0002 + 0031 0041 //i2c addr 0x41 + 0032 0041 //i2c addr 0x41 + 0057 0000 //rl gpio0 output lcd_bl_pwm + 0058 0002 //bypass ser gpio0 + 005a 0000 //rl gpio1 output lcd_pwr_en + 005b 0001 //bypass ser gpio1 + 005d 0000 //rl gpio2 output lcd_rst + 005e 0004 //bypass ser gpio2 + 0060 0018 //rl gpio3 input tp-int + 042e 0005 //bypass ser gpio3 + 0061 0005 //bypass ser gpio3 + 0063 0000 //rl gpio4 output tp-rst + 0064 0006 //bypass ser gpio4 + 0066 0000 //rl gpio5 output + 0067 0007 //bypass ser gpio5 + 0073 0080 + 0074 0007 + 0079 000a + 007b 0038 + 007c 0004 + 0081 0003 + 0082 0010 + 0084 0020 + 0086 0002 + 0087 0002 + 0088 0010 + 0089 0010 + 008b 0020 + 008d 0002 + 008e 0002 + 008f 0010 + 00d0 0040 + 00d8 0042 + 00d9 0004 + 0423 0002 + 0424 00ec + 0425 0027 + 0429 000a + 045d 0001 + 0529 000a + 055d 0003 + 0090 0001 + 0091 0003 + 0426 0080 + 042d 0004 + /* RL82 Pattern Gen Set + * Vertical Gray Scale Color Bar + */ + 060A 00B0 + 060B 00FF + 060C 00FF + 060D 00FF + 0644 0019 + 0645 0020 + 0646 001f + ]; + i2c7_bu18rl82_pinctrl: i2c7-bu18rl82-pinctrl { + compatible = "rohm,bu18rl82-pinctrl"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_bu18rl82_panel_pins>; + status = "okay"; + + i2c7_bu18rl82_panel_pins: panel-pins { + lcd-bl-pwm { + pins = "BU18RL82_GPIO0"; + function = "SER_GPIO0_TO_DES"; + }; + + lcd-pwr-en { + pins = "BU18RL82_GPIO1"; + function = "SER_GPIO1_TO_DES"; + }; + + lcd-rst { + pins = "BU18RL82_GPIO2"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + + tp-rst { + pins = "BU18RL82_GPIO3"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + + tp-int { + pins = "BU18RL82_GPIO4"; + function = "DES_TO_SER_GPIO3"; + }; + + lcd-otp-pin { + pins = "BU18RL82_GPIO5"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + }; + + i2c7_bu18rl82_gpio: i2c7-bu18rl82-gpio { + compatible = "rohm,bu18rl82-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c7_bu18rl82_pinctrl 0 241 8>; + }; + }; + + i2c7_bu18rl82_bridge: i2c7-bu18rl82-bridge { + compatible = "rohm,bu18rl82-bridge"; + status = "okay"; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c7_bu18rl82_in_i2c7_bu18tl82: endpoint { + remote-endpoint = <&i2c7_bu18tl82_out_i2c7_bu18rl82>; + }; + }; + + port@1 { + reg = <1>; + + i2c7_bu18rl82_out_panel1: endpoint { + remote-endpoint = <&panel1_in_i2c7_bu18rl82>; + }; + }; + }; + }; + + lt7911d@2b { + compatible = "lontium,lt7911d-fb-notifier"; + reg = <0x2b>; + reset-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_LOW>; + status = "okay"; + }; +}; + +&i2c8 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c8m2_xfer>; + clock-frequency = <400000>; + status = "disabled"; + + i2c8_bu18tl82: i2c8-bu18tl82@10 { + compatible = "rohm,bu18tl82"; + reg = <0x10>; + status = "okay"; + + serdes-init-sequence = [ + 0013 001a //013h[3]1-lane1 enable 013h[3] 1-LVDS Receiver Port-A + 0014 000a //014h[3]1-lane1 enable 014h[3] 1-LVDS Receiver Port-B + 0021 0008 + 0023 0009 + 0024 0009 + 022b 0038 + 022c 0072 + 022d 0023 //VPLL=75MHZS + //022b 00d8 + //022c 0089 + //022d 003d //VPLL=99MHz (ref26MHz) 4032984*26/1024x1024=99M + 022e 0080 + 027c 0048 + 027d 0048 //i2c addr 0x48 + 0296 0004 + 0297 0009 //CLLTX0_PLL_GAIN 397h[3:2] 1001 2'b10: 1.2~2.3 Gbps/lane + //0297 000d //CLLTX0_PLL_GAIN 297h[3:2] 1101 2'b11: 2.2~3.6 Gbps/lane + 0018 00a5 + 0019 0069 + 0267 003d + 0268 002c + 0269 002c + 026a 002c + 026b 002c + 0367 003d + 0368 002c + 0369 002c + 036a 002c + 036b 002c + 0018 0000 + 0019 0000 + 002a 0018 //gpio0 input lcd_bl_pwm + 002d 0018 //gpio1 input lcd_pwr_en + + 0030 0018 //gpio2 input lcd_rst + 0033 0018 //gpio3 input tp_rst + 0034 0005 //bypass des gpio3 + 0036 0000 //gpio4 output tp_int + 0037 0006 //bypass des gpio4 + + 02a7 0002 + 02a8 0003 + 02a9 0004 + 02aa 0005 + 0045 0080 + 0046 0007 //1920 + 004b 00d0 + 004c 0002 //720 + 004d 00d0 + 004e 0002 //720 + 0051 0080 + 0052 0007 //1920 + 0053 0064 //0053h[6]1:2 Rx ports CLLCH2_EN 53h[5] 1:2 Clock Tx lanes + 024d 0061 + 0252 0005 + 0274 0030 + 0275 0020 + 0396 0004 + 0397 0009 //CLLTX0_PLL_GAIN 397h[3:2] 1001 2'b10: 1.2~2.3 Gbps/lane + //0397 000d //CLLTX0_PLL_GAIN 397h[3:2] 1101 2'b11: 2.2~3.6 Gbps/lane + 0061 0003 //CLLTX0 enable CLLTX1 enable + 0060 0003 //CLLTX0/1 RGB data output Enable + /* TL82 Pattern Gen Set 1 + * Horizontal Gray Scale 256 steps + */ + 040A 0010 + 040B 0080 + 040C 0080 + 040D 0080 + 0444 0090 //h_blank=144 + 0446 00d2 //v_blank=210 + ]; + i2c8_bu18tl82_pinctrl: i2c8-bu18tl82-pinctrl { + compatible = "rohm,bu18tl82-pinctrl"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c8_bu18tl82_panel_pins>; + status = "okay"; + + i2c8_bu18tl82_panel_pins: panel-pins { + lcd-bl-pwm { + pins = "BU18TL82_GPIO0"; + function = "SER_TO_DES_GPIO0"; + }; + + lcd-pwr-en { + pins = "BU18TL82_GPIO1"; + function = "SER_TO_DES_GPIO1"; + }; + + ser-irq { + pins = "BU18TL82_GPIO2"; + function = "DES_GPIO2_TO_SER"; + }; + + tp-int { + pins = "BU18TL82_GPIO3"; + function = "DES_GPIO4_TO_SER"; + }; + }; + + + i2c8_bu18tl82_gpio: i2c8-bu18tl82-gpio { + compatible = "rohm,bu18tl82-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c8_bu18tl82_pinctrl 0 250 8>; + }; + }; + + i2c8_bu18tl82_bridge: i2c8-bu18tl82-bridge { + compatible = "rohm,bu18tl82-bridge"; + status = "okay"; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c8_bu18tl82_in_dp1: endpoint { + remote-endpoint = <&dp1_out_i2c8_bu18tl82>; + }; + }; + + port@1 { + reg = <1>; + + i2c8_bu18tl82_out_i2c8_bu18rl82: endpoint { + remote-endpoint = <&i2c8_bu18rl82_in_i2c8_bu18tl82>; + }; + }; + }; + }; + + i2c8_bu18rl82: i2c8-bu18rl82@30 { + compatible = "rohm,bu18rl82"; + reg = <0x30>; + status = "okay"; + serdes-init-sequence = [ + 0011 0003 //Clockless Link Receiver Lane-0+ LVDS portA + 0012 0003 //Clockless Link Receiver Lane-1+ LVDS portB + 0013 0000 + 001d 0008 + 001f 0002 //LVDSTX0_REFSEL + 0020 0002 //LVDSTX1_REFSEL + 0031 0048 + 0032 0048 //i2c addr 0x48 + 0423 0000 + 0424 0000 + 0425 0020 + 0426 0080 + 0057 0000 + 0058 0002 + 0057 0000 //rl gpio0 output lcd_bl_pwm + 0058 0002 //bypass ser gpio0 + 005a 0000 //rl gpio1 output lcd_pwr_en + 005b 0003 //bypass ser gpio1 + 005d 0000 //rl gpio2 output lcd_rst + 005e 0004 //bypass ser gpio2 + 0060 0000 //rl gpio3 output tp-rst + 0061 0005 //bypass ser gpio3 + 0063 0018 //rl gpio4 input tp-int + 0064 0006 //bypass ser gpio4 + 0066 0000 //rl gpio5 output + 0067 0001 //set gpio5 high + + 0073 0080 + 0074 0007 //0x0780 = 1920 + 0075 0080 + 0076 0007 //0x0780 = 1920 + 0079 000a //h[3]: dual lvds mode h[1] single lane / dual lane + 007b 00d0 + 007c 0002 //0x02d0 = 720 + 007d 00d0 + 007e 0002 //0x02d0 = 720 + 0081 0003 //01---> Sync OFF + 0082 0010 //Hsync=16clk + 0084 001c //HBP=28clk + 0086 0002 //Vsync=2lines + 0087 0008 //VBP=8lines + 0088 0000 //VSYNC_CHG=0CLK + 0089 0010 //Hsync = 16? + 008b 001c //HFP=28clk? + 008d 0002 //Vsync=2lines? + 008e 0008 //VFP=8line? + 008f 0000 //VSYNC_CHG=0CLK? + 00d0 0040 //[3]FixHtotalEN + 00d8 00c0 + 00d9 0003 //DE=960 + 0429 000a //LVDSTX0_PLLGAIN 2'b10: 30 MHz ~ 80 MHz + 045d 0001 + 0529 000a //LVDSTX1_PLLGAIN 2'b10: 30 MHz ~ 80 MHz + 055d 0001 + 0091 0003 + 0090 0001 + /* RL82 Pattern Gen Set + * Vertical Gray Scale Color Bar + */ + 060A 00B0 + 060B 00FF + 060C 00FF + 060D 00FF + 0644 0090 + 0646 00d2 + ]; + i2c8_bu18rl82_pinctrl: i2c8-bu18rl82-pinctrl { + compatible = "rohm,bu18rl82-pinctrl"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c8_bu18rl82_panel_pins>; + status = "okay"; + + i2c8_bu18rl82_panel_pins: panel-pins { + lcd-bl-pwm { + pins = "BU18RL82_GPIO0"; + function = "SER_GPIO0_TO_DES"; + }; + + lcd-pwr-en { + pins = "BU18RL82_GPIO1"; + function = "SER_GPIO1_TO_DES"; + }; + + lcd-rst { + pins = "BU18RL82_GPIO2"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + + tp-rst { + pins = "BU18RL82_GPIO3"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + + tp-int { + pins = "BU18RL82_GPIO4"; + function = "DES_TO_SER_GPIO3"; + }; + + lcd-otp-pin { + pins = "BU18RL82_GPIO5"; + function = "DES_GPIO_OUTPUT_HIGH"; + }; + }; + + i2c8_bu18rl82_gpio: i2c8-bu18rl82-gpio { + compatible = "rohm,bu18rl82-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c8_bu18rl82_pinctrl 0 259 8>; + }; + }; + + i2c8_bu18rl82_bridge: i2c8-bu18rl82-bridge { + compatible = "rohm,bu18rl82-bridge"; + status = "okay"; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c8_bu18rl82_in_i2c8_bu18tl82: endpoint { + remote-endpoint = <&i2c8_bu18tl82_out_i2c8_bu18rl82>; + }; + }; + + port@1 { + reg = <1>; + + i2c8_bu18rl82_out_panel1: endpoint { + remote-endpoint = <&panel1_in_i2c8_bu18rl82>; + }; + }; + }; + }; + + lt7911d@2b { + compatible = "lontium,lt7911d-fb-notifier"; + reg = <0x2b>; + reset-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>; + status = "okay"; + }; +}; + +&mipi_dcphy0 { + status = "okay"; +}; + +&mipi_dcphy1 { + status = "okay"; +}; + +/* dsi0->serdes->lvds_panel */ +&pwm0 { + status = "okay"; + pinctrl-0 = <&pwm0m2_pins>; +}; + +/* dp0->serdes->lvds_panel */ +&pwm10 { + pinctrl-0 = <&pwm10m2_pins>; + status = "okay"; +}; + +/* edp1->serdes->lvds_panel */ +&pwm11 { + pinctrl-0 = <&pwm11m3_pins>; + status = "okay"; +}; + +/* edp0->serdes->lvds_panel */ +&pwm7 { + pinctrl-0 = <&pwm7m0_pins>; + status = "okay"; +}; + +/* dsi1->serdes->lvds_panel */ +&pwm13 { + status = "okay"; + pinctrl-0 = <&pwm13m1_pins>; +}; + +/* dp1->serdes->lvds_panel */ +&pwm14 { + pinctrl-0 = <&pwm14m0_pins>; + status = "okay"; +}; + +&route_dp0 { + status = "disabled"; + connect = <&vp0_out_dp0>; + logo,uboot = "logo34.bmp"; + logo,kernel = "logo34.bmp"; +}; + +&route_dp1 { + status = "disabled"; + connect = <&vp0_out_dp1>; + logo,uboot = "logo34.bmp"; + logo,kernel = "logo34.bmp"; +}; + +&route_dsi0 { + status = "disabled"; + connect = <&vp2_out_dsi0>; + logo,uboot = "logo1.bmp"; + logo,kernel = "logo1.bmp"; +}; + +&route_dsi1 { + status = "disabled"; + connect = <&vp3_out_dsi1>; + logo,uboot = "logo2.bmp"; + logo,kernel = "logo2.bmp"; +}; + +&route_edp0 { + status = "disabled"; + connect = <&vp1_out_edp0>; + logo,uboot = "logo56.bmp"; + logo,kernel = "logo56.bmp"; +}; + +&route_edp1 { + status = "disabled"; + connect = <&vp1_out_edp1>; + logo,uboot = "logo56.bmp"; + logo,kernel = "logo56.bmp"; +}; + +&usbdp_phy0 { + rockchip,dp-lane-mux = <0 1 2 3>; + status = "okay"; +}; + +&usbdp_phy1 { + rockchip,dp-lane-mux = <0 1 2 3>; + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru PLL_V0PLL>; + assigned-clock-rates = <1152000000>; +}; + +&vp0 { + assigned-clocks = <&cru DCLK_VOP0_SRC>; + assigned-clock-parents = <&cru PLL_V0PLL>; +}; + +&vp1 { + assigned-clocks = <&cru DCLK_VOP1_SRC>; + assigned-clock-parents = <&cru PLL_GPLL>; +}; + +&vp2 { + assigned-clocks = <&cru DCLK_VOP2_SRC>; + assigned-clock-parents = <&cru PLL_V0PLL>; +}; + +&vp3 { + assigned-clocks = <&cru DCLK_VOP3>; + assigned-clock-parents = <&cru PLL_V0PLL>; +};