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Merge tag 'rproc-v5.12-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc
Pull remoteproc fixes from Bjorn Andersson: "This fixes an issue with firmware loading on the TI K3 PRU, fixes compatibility with GNU binutils for the same and resolves link error due to a 64-bit division in the Qualcomm PIL info. It also recognizes Mathieu Poirier as co-maintainer of the remoteproc and rpmsg subsystems" * tag 'rproc-v5.12-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc: remoteproc: pru: Fix firmware loading crashes on K3 SoCs remoteproc: pru: Fix loading of GNU Binutils ELF MAINTAINERS: Add co-maintainer for remoteproc/RPMSG subsystems remoteproc: qcom: pil_info: avoid 64-bit division
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@@ -15199,6 +15199,7 @@ F: fs/reiserfs/
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REMOTE PROCESSOR (REMOTEPROC) SUBSYSTEM
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M: Ohad Ben-Cohen <ohad@wizery.com>
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M: Bjorn Andersson <bjorn.andersson@linaro.org>
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M: Mathieu Poirier <mathieu.poirier@linaro.org>
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L: linux-remoteproc@vger.kernel.org
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S: Maintained
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc.git rproc-next
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@@ -15212,6 +15213,7 @@ F: include/linux/remoteproc/
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REMOTE PROCESSOR MESSAGING (RPMSG) SUBSYSTEM
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M: Ohad Ben-Cohen <ohad@wizery.com>
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M: Bjorn Andersson <bjorn.andersson@linaro.org>
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M: Mathieu Poirier <mathieu.poirier@linaro.org>
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L: linux-remoteproc@vger.kernel.org
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S: Maintained
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc.git rpmsg-next
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@@ -450,6 +450,24 @@ static void *pru_i_da_to_va(struct pru_rproc *pru, u32 da, size_t len)
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if (len == 0)
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return NULL;
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/*
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* GNU binutils do not support multiple address spaces. The GNU
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* linker's default linker script places IRAM at an arbitrary high
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* offset, in order to differentiate it from DRAM. Hence we need to
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* strip the artificial offset in the IRAM addresses coming from the
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* ELF file.
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*
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* The TI proprietary linker would never set those higher IRAM address
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* bits anyway. PRU architecture limits the program counter to 16-bit
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* word-address range. This in turn corresponds to 18-bit IRAM
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* byte-address range for ELF.
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*
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* Two more bits are added just in case to make the final 20-bit mask.
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* Idea is to have a safeguard in case TI decides to add banking
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* in future SoCs.
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*/
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da &= 0xfffff;
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if (da >= PRU_IRAM_DA &&
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da + len <= PRU_IRAM_DA + pru->mem_regions[PRU_IOMEM_IRAM].size) {
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offset = da - PRU_IRAM_DA;
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@@ -585,7 +603,7 @@ pru_rproc_load_elf_segments(struct rproc *rproc, const struct firmware *fw)
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break;
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}
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if (pru->data->is_k3 && is_iram) {
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if (pru->data->is_k3) {
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ret = pru_rproc_memcpy(ptr, elf_data + phdr->p_offset,
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filesz);
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if (ret) {
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@@ -56,7 +56,7 @@ static int qcom_pil_info_init(void)
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memset_io(base, 0, resource_size(&imem));
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_reloc.base = base;
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_reloc.num_entries = resource_size(&imem) / PIL_RELOC_ENTRY_SIZE;
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_reloc.num_entries = (u32)resource_size(&imem) / PIL_RELOC_ENTRY_SIZE;
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return 0;
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}
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