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vlock: when quite vlock, restore pre pll value [1/1]

Browse Source 
PD#TV-6743

Problem:
exit hdmi source, display many horizontal fine lines.
restore m/f value is wrong.

Solution:
when exit vlock, need restore m/f value from backup.

Verify:
T950X

Change-Id: If0d1b3758a19547675aa4bef920168c20ca83939
Signed-off-by: Yong Qin <yong.qin@amlogic.com>
This commit is contained in:
Yong Qin
2019-07-08 14:19:04 +08:00
committed by Tao Zeng
parent 38a37f0acc
commit 3776e28ee5
10 changed files with 34 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/amlogic/tl1_t962x2_t309.dts
View File

@@ -520,7 +520,7 @@
*bit5:manual MIX PLL ENC
*/
vlock_pll_m_limit = <1>;
vlock_line_limit = <3>;
vlock_line_limit = <2>;
};
vdin@0 {

2
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_1g.dts
View File

@@ -536,7 +536,7 @@
*bit5:manual MIX PLL ENC
*/
vlock_pll_m_limit = <1>;
vlock_line_limit = <3>;
vlock_line_limit = <2>;
};
vdin@0 {

2
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_2g.dts
View File

@@ -530,7 +530,7 @@
*bit5:manual MIX PLL ENC
*/
vlock_pll_m_limit = <1>;
vlock_line_limit = <3>;
vlock_line_limit = <2>;
};
vdin@0 {

2
arch/arm64/boot/dts/amlogic/tm2_pxp.dts
View File

@@ -424,7 +424,7 @@
*bit5:manual MIX PLL ENC
*/
vlock_pll_m_limit = <1>;
vlock_line_limit = <3>;
vlock_line_limit = <2>;
};
amdolby_vision {

2
arch/arm64/boot/dts/amlogic/tm2_t962e2_ab311.dts
View File

@@ -524,7 +524,7 @@
*bit5:manual MIX PLL ENC
*/
vlock_pll_m_limit = <1>;
vlock_line_limit = <3>;
vlock_line_limit = <2>;
};
amdolby_vision {

2
arch/arm64/boot/dts/amlogic/tm2_t962e2_ab319.dts
View File

@@ -551,7 +551,7 @@
*bit5:manual MIX PLL ENC
*/
vlock_pll_m_limit = <1>;
vlock_line_limit = <3>;
vlock_line_limit = <2>;
};
amdolby_vision {

2
arch/arm64/boot/dts/amlogic/tm2_t962x3_ab301.dts
View File

@@ -526,7 +526,7 @@
*bit5:manual MIX PLL ENC
*/
vlock_pll_m_limit = <1>;
vlock_line_limit = <3>;
vlock_line_limit = <2>;
};
amdolby_vision {

2
arch/arm64/boot/dts/amlogic/tm2_t962x3_ab309.dts
View File

@@ -552,7 +552,7 @@
*bit5:manual MIX PLL ENC
*/
vlock_pll_m_limit = <1>;
vlock_line_limit = <3>;
vlock_line_limit = <2>;
};
amdolby_vision {

3
drivers/amlogic/media/enhancement/amvecm/amvecm.c
View File

@@ -6663,6 +6663,8 @@ static void aml_vecm_dt_parse(struct platform_device *pdev)
/*vlock param config*/
vlock_param_config(node);
vlock_status_init();
}
/* init module status */
amvecm_wb_init(wb_en);
@@ -6783,7 +6785,6 @@ static int aml_vecm_probe(struct platform_device *pdev)
hdr_init(&amvecm_dev.hdr_d);
aml_vecm_dt_parse(pdev);
vlock_status_init();
probe_ok = 1;
pr_info("%s: ok\n", __func__);

37
drivers/amlogic/media/enhancement/amvecm/vlock.c
View File

@@ -64,7 +64,7 @@ static unsigned int vlock_intput_type;
/* [reg(0x3009) x linemax_num)]>>24 is the limit line of enc mode
* change from 4 to 3,for 4 may cause shake issue for 60.3hz input
*/
static signed int vlock_line_limit = 3;
static signed int vlock_line_limit = 2;
static unsigned int vlock_enc_adj_limit;
/* 0x3009 default setting for 2 line(1080p-output) is 0x8000 */
static unsigned int vlock_capture_limit = 0x10000/*0x8000*/;
@@ -662,7 +662,7 @@ static void vlock_setting(struct vframe_s *vf,
void vlock_vmode_check(void)
{
const struct vinfo_s *vinfo;
unsigned int t0, t1;
/*unsigned int t0, t1;*/
if (vlock_en == 0)
return;
@@ -675,6 +675,7 @@ void vlock_vmode_check(void)
VLOCK_MODE_AUTO_PLL)) {
/*amvecm_hiu_reg_read(hhi_pll_reg_frac, &t0);*/
/*amvecm_hiu_reg_read(hhi_pll_reg_m, &t1);*/
#if 0
t0 = vlock_get_panel_pll_m();
t1 = vlock_get_panel_pll_frac();
if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
@@ -684,6 +685,16 @@ void vlock_vmode_check(void)
pre_hiu_reg_frac = t0 & 0xfff;
pre_hiu_reg_m = t1 & 0x1ff;
}
#else
if (cpu_after_eq(MESON_CPU_MAJOR_ID_TL1)) {
pre_hiu_reg_frac =
(vlock.val_frac >> 5) & 0xfff;
pre_hiu_reg_m = vlock.val_m & 0xff;
} else {
pre_hiu_reg_frac = vlock.val_frac & 0xfff;
pre_hiu_reg_m = vlock.val_m & 0x1ff;
}
#endif
}
if ((vlock_mode & (VLOCK_MODE_MANUAL_ENC |
VLOCK_MODE_AUTO_ENC |
@@ -1624,14 +1635,14 @@ void vlock_status_init(void)
/*config vlock mode*/
/*todo:txlx & g9tv support auto pll,*/
/*but support not good,need vlsi support optimize*/
vlock_line_limit = 2;/*only for test*/
#if 0
if (is_meson_gxtvbb_cpu() ||
is_meson_txl_cpu() || is_meson_txlx_cpu()
|| is_meson_tl1_cpu() || is_meson_tm2_cpu())
vlock_en = 1;
else
vlock_en = 0;
#endif
/*initial pll register address*/
if (is_meson_tl1_cpu() || is_meson_tm2_cpu()) {
@@ -2534,6 +2545,8 @@ void vlock_lcd_param_work(struct work_struct *p_work)
}
msleep(20);
}
pr_info("lcd vlock_en=%d, vlock_mode=0x%x\n", vlock_en, vlock_mode);
}
#endif
@@ -2553,19 +2566,17 @@ void vlock_param_config(struct device_node *node)
else
vlock_mode = val;
ret = of_property_read_u32(node, "vlock_pll_m_limit", &val);
if (ret) {
if (ret)
pr_info("Can't find vlock_pll_m_limit.\n");
vlock_pll_m_limit = 1;
} else {
else
vlock_pll_m_limit = val;
}
ret = of_property_read_u32(node, "vlock_line_limit", &val);
if (ret) {
if (ret)
pr_info("Can't find vlock_line_limit.\n");
vlock_line_limit = 1;
} else {
else
vlock_line_limit = val;
}
#ifdef CONFIG_AMLOGIC_LCD
schedule_work(&aml_lcd_vlock_param_work);
#endif
@@ -2574,7 +2585,7 @@ void vlock_param_config(struct device_node *node)
vlock_mode &= ~VLOCK_MODE_MANUAL_MIX_PLL_ENC;
vlock_mode |= VLOCK_MODE_MANUAL_PLL;
}
pr_info("param_config vlock_en:%d\n", vlock_en);
pr_info("param_config vlock_en:%d md=0x%x\n", vlock_en, vlock_mode);
}
int vlock_notify_callback(struct notifier_block *block, unsigned long cmd,