From 37b5bec67d92514f2b3fb463e7e1961b00a91b78 Mon Sep 17 00:00:00 2001 From: Sandy Huang Date: Thu, 31 Dec 2020 10:59:57 +0800 Subject: [PATCH] drm/rockchip: vop2: afbc_tile_num should align up to 16 pixel and divide 16 Change-Id: Ied67749759268e9ff4acb0322a6517f8ed099c9d Signed-off-by: Sandy Huang --- drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index d04c3a5db391..bdb4d0ccd7fe 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -1991,7 +1991,7 @@ static void vop2_plane_atomic_update(struct drm_plane *plane, struct drm_plane_s if (vpstate->afbc_en) { /* the afbc superblock is 16 x 16 */ afbc_format = vop2_convert_afbc_format(fb->format->format); - afbc_tile_num = actual_w >> 4; + afbc_tile_num = ALIGN(actual_w, 16) >> 4; /* AFBC pic_vir_width is count by pixel, this is different * with WIN_VIR_STRIDE. */