From 38cfa875e45d5142bf549944d2f3f7ee82a22e49 Mon Sep 17 00:00:00 2001 From: Yu Qiaowei Date: Wed, 22 Nov 2023 12:01:36 +0800 Subject: [PATCH] video: rockchip: rga3: modify rga_win_data formats config Change-Id: I83e1be5313e4e6d18c19c7c50dce9b7b685da6b1 Signed-off-by: Yu Qiaowei --- .../rockchip/rga3/include/rga_hw_config.h | 24 +++++----- drivers/video/rockchip/rga3/rga_hw_config.c | 48 +++++++++---------- drivers/video/rockchip/rga3/rga_policy.c | 48 ++++++++++--------- 3 files changed, 62 insertions(+), 58 deletions(-) diff --git a/drivers/video/rockchip/rga3/include/rga_hw_config.h b/drivers/video/rockchip/rga3/include/rga_hw_config.h index 73f05f7f517d..46f7531aa88f 100644 --- a/drivers/video/rockchip/rga3/include/rga_hw_config.h +++ b/drivers/video/rockchip/rga3/include/rga_hw_config.h @@ -16,20 +16,22 @@ enum rga_mmu { RGA_IOMMU = 2, }; +enum rga_hw_support_format_index { + RGA_RASTER_INDEX, + RGA_AFBC16x16_INDEX, + RGA_TILE8x8_INDEX, + RGA_FORMAT_INDEX_BUTT, +}; + struct rga_win_data { const char *name; - const uint32_t *raster_formats; - const uint32_t *fbc_formats; - const uint32_t *tile_formats; - uint32_t num_of_raster_formats; - uint32_t num_of_fbc_formats; - uint32_t num_of_tile_formats; - - const unsigned int supported_rotations; - const unsigned int scale_up_mode; - const unsigned int scale_down_mode; - const unsigned int rd_mode; + const uint32_t *formats[RGA_FORMAT_INDEX_BUTT]; + uint32_t formats_count[RGA_FORMAT_INDEX_BUTT]; + uint32_t supported_rotations; + uint32_t scale_up_mode; + uint32_t scale_down_mode; + uint32_t rd_mode; }; struct rga_rect { diff --git a/drivers/video/rockchip/rga3/rga_hw_config.c b/drivers/video/rockchip/rga3/rga_hw_config.c index 4af4a85437c9..0cf2599b931e 100644 --- a/drivers/video/rockchip/rga3/rga_hw_config.c +++ b/drivers/video/rockchip/rga3/rga_hw_config.c @@ -175,12 +175,12 @@ const uint32_t rga2e_output_raster_format[] = { const struct rga_win_data rga3_win_data[] = { { .name = "rga3-win0", - .raster_formats = rga3_input_raster_format, - .num_of_raster_formats = ARRAY_SIZE(rga3_input_raster_format), - .fbc_formats = rga3_fbcd_format, - .num_of_fbc_formats = ARRAY_SIZE(rga3_fbcd_format), - .tile_formats = rga3_tile_format, - .num_of_tile_formats = ARRAY_SIZE(rga3_tile_format), + .formats[RGA_RASTER_INDEX] = rga3_input_raster_format, + .formats_count[RGA_RASTER_INDEX] = ARRAY_SIZE(rga3_input_raster_format), + .formats[RGA_AFBC16x16_INDEX] = rga3_fbcd_format, + .formats_count[RGA_AFBC16x16_INDEX] = ARRAY_SIZE(rga3_fbcd_format), + .formats[RGA_TILE8x8_INDEX] = rga3_tile_format, + .formats_count[RGA_TILE8x8_INDEX] = ARRAY_SIZE(rga3_tile_format), .supported_rotations = RGA_MODE_ROTATE_MASK, .scale_up_mode = RGA_SCALE_UP_BIC, .scale_down_mode = RGA_SCALE_DOWN_AVG, @@ -190,12 +190,12 @@ const struct rga_win_data rga3_win_data[] = { { .name = "rga3-win1", - .raster_formats = rga3_input_raster_format, - .num_of_raster_formats = ARRAY_SIZE(rga3_input_raster_format), - .fbc_formats = rga3_fbcd_format, - .num_of_fbc_formats = ARRAY_SIZE(rga3_fbcd_format), - .tile_formats = rga3_tile_format, - .num_of_tile_formats = ARRAY_SIZE(rga3_tile_format), + .formats[RGA_RASTER_INDEX] = rga3_input_raster_format, + .formats_count[RGA_RASTER_INDEX] = ARRAY_SIZE(rga3_input_raster_format), + .formats[RGA_AFBC16x16_INDEX] = rga3_fbcd_format, + .formats_count[RGA_AFBC16x16_INDEX] = ARRAY_SIZE(rga3_fbcd_format), + .formats[RGA_TILE8x8_INDEX] = rga3_tile_format, + .formats_count[RGA_TILE8x8_INDEX] = ARRAY_SIZE(rga3_tile_format), .supported_rotations = RGA_MODE_ROTATE_MASK, .scale_up_mode = RGA_SCALE_UP_BIC, .scale_down_mode = RGA_SCALE_DOWN_AVG, @@ -205,12 +205,12 @@ const struct rga_win_data rga3_win_data[] = { { .name = "rga3-wr", - .raster_formats = rga3_output_raster_format, - .num_of_raster_formats = ARRAY_SIZE(rga3_output_raster_format), - .fbc_formats = rga3_fbcd_format, - .num_of_fbc_formats = ARRAY_SIZE(rga3_fbcd_format), - .tile_formats = rga3_tile_format, - .num_of_tile_formats = ARRAY_SIZE(rga3_tile_format), + .formats[RGA_RASTER_INDEX] = rga3_output_raster_format, + .formats_count[RGA_RASTER_INDEX] = ARRAY_SIZE(rga3_output_raster_format), + .formats[RGA_AFBC16x16_INDEX] = rga3_fbcd_format, + .formats_count[RGA_AFBC16x16_INDEX] = ARRAY_SIZE(rga3_fbcd_format), + .formats[RGA_TILE8x8_INDEX] = rga3_tile_format, + .formats_count[RGA_TILE8x8_INDEX] = ARRAY_SIZE(rga3_tile_format), .supported_rotations = 0, .scale_up_mode = RGA_SCALE_UP_NONE, .scale_down_mode = RGA_SCALE_DOWN_NONE, @@ -222,8 +222,8 @@ const struct rga_win_data rga3_win_data[] = { const struct rga_win_data rga2e_win_data[] = { { .name = "rga2e-src0", - .raster_formats = rga2e_input_raster_format, - .num_of_raster_formats = ARRAY_SIZE(rga2e_input_raster_format), + .formats[RGA_RASTER_INDEX] = rga2e_input_raster_format, + .formats_count[RGA_RASTER_INDEX] = ARRAY_SIZE(rga2e_input_raster_format), .supported_rotations = RGA_MODE_ROTATE_MASK, .scale_up_mode = RGA_SCALE_UP_BIC, .scale_down_mode = RGA_SCALE_DOWN_AVG, @@ -233,8 +233,8 @@ const struct rga_win_data rga2e_win_data[] = { { .name = "rga2e-src1", - .raster_formats = rga2e_input_raster_format, - .num_of_raster_formats = ARRAY_SIZE(rga2e_input_raster_format), + .formats[RGA_RASTER_INDEX] = rga2e_input_raster_format, + .formats_count[RGA_RASTER_INDEX] = ARRAY_SIZE(rga2e_input_raster_format), .supported_rotations = RGA_MODE_ROTATE_MASK, .scale_up_mode = RGA_SCALE_UP_BIC, .scale_down_mode = RGA_SCALE_DOWN_AVG, @@ -244,8 +244,8 @@ const struct rga_win_data rga2e_win_data[] = { { .name = "rga2-dst", - .raster_formats = rga2e_output_raster_format, - .num_of_raster_formats = ARRAY_SIZE(rga2e_output_raster_format), + .formats[RGA_RASTER_INDEX] = rga2e_output_raster_format, + .formats_count[RGA_RASTER_INDEX] = ARRAY_SIZE(rga2e_output_raster_format), .supported_rotations = 0, .scale_up_mode = RGA_SCALE_UP_NONE, .scale_down_mode = RGA_SCALE_DOWN_NONE, diff --git a/drivers/video/rockchip/rga3/rga_policy.c b/drivers/video/rockchip/rga3/rga_policy.c index c00a67066fb0..c87ce1881cff 100644 --- a/drivers/video/rockchip/rga3/rga_policy.c +++ b/drivers/video/rockchip/rga3/rga_policy.c @@ -108,32 +108,34 @@ static bool rga_check_format(const struct rga_hw_data *data, int rd_mode, int format, int win_num) { int i; - bool matched = false; + const uint32_t *formats; + uint32_t format_count; - if (rd_mode == RGA_RASTER_MODE) { - for (i = 0; i < data->win[win_num].num_of_raster_formats; i++) { - if (format == data->win[win_num].raster_formats[i]) { - matched = true; - break; - } - } - } else if (rd_mode == RGA_FBC_MODE) { - for (i = 0; i < data->win[win_num].num_of_fbc_formats; i++) { - if (format == data->win[win_num].fbc_formats[i]) { - matched = true; - break; - } - } - } else if (rd_mode == RGA_TILE_MODE) { - for (i = 0; i < data->win[win_num].num_of_tile_formats; i++) { - if (format == data->win[win_num].tile_formats[i]) { - matched = true; - break; - } - } + switch (rd_mode) { + case RGA_RASTER_MODE: + formats = data->win[win_num].formats[RGA_RASTER_INDEX]; + format_count = data->win[win_num].formats_count[RGA_RASTER_INDEX]; + break; + case RGA_FBC_MODE: + formats = data->win[win_num].formats[RGA_AFBC16x16_INDEX]; + format_count = data->win[win_num].formats_count[RGA_AFBC16x16_INDEX]; + break; + case RGA_TILE_MODE: + formats = data->win[win_num].formats[RGA_TILE8x8_INDEX]; + format_count = data->win[win_num].formats_count[RGA_TILE8x8_INDEX]; + break; + default: + return false; } - return matched; + if (formats == NULL || format_count == 0) + return false; + + for (i = 0; i < format_count; i++) + if (format == formats[i]) + return true; + + return false; } static bool rga_check_align(uint32_t byte_stride_align, uint32_t format, uint16_t w_stride)