From 394c4096b79d99a7270d3799567eec93acd04283 Mon Sep 17 00:00:00 2001
From: Shunqian Zheng <zhengsq@rock-chips.com>
Date: Fri, 26 Aug 2016 08:00:44 +0800
Subject: [PATCH] UPSTREAM: arm64: dts: rockchip: set to CCI clock of RK3399 to
 600M

Per testing, this can reduce the memory latency and d8 gets
better scores.

Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit bb4b6201d21653c99e41d1e57b3b26524be0e87e)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

Change-Id: I6f305e0bc60a91f18f606fb7a8012d80fcd378b5
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index fdef9c01a48e..bedae782ee53 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1486,7 +1486,7 @@
 			<&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>,
 			<&cru PCLK_PERIHP>,
 			<&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>,
-			<&cru PCLK_PERILP0>,
+			<&cru PCLK_PERILP0>, <&cru ACLK_CCI>,
 			<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>;
 		assigned-clock-rates =
 			 <400000000>,  <200000000>,
@@ -1497,7 +1497,7 @@
 			 <150000000>,   <75000000>,
 			  <37500000>,
 			 <100000000>,  <100000000>,
-			  <50000000>,
+			  <50000000>, <600000000>,
 			 <100000000>,   <50000000>;
 	};