From 394d2ee04d9127d7724c5f1141f9e75ddf9a026f Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Thu, 4 Mar 2021 20:03:26 +0800 Subject: [PATCH] net: can: rockchip: fix up the receiving filter ID ID MASK bit is bit[28:0]. Change-Id: Id8202e777c2b9daabe2b06335bfb20bb14cc7469 Signed-off-by: Elaine Zhang --- drivers/net/can/rockchip/rockchip_can.c | 4 +++- drivers/net/can/rockchip/rockchip_canfd.c | 14 ++++++++------ 2 files changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/net/can/rockchip/rockchip_can.c b/drivers/net/can/rockchip/rockchip_can.c index 461c6d5cb66c..64ad725a446f 100644 --- a/drivers/net/can/rockchip/rockchip_can.c +++ b/drivers/net/can/rockchip/rockchip_can.c @@ -101,6 +101,8 @@ #define CAN_RX_DATA2 0x6c +#define CAN_RX_FILTER_MASK 0x1fffffff + #define CAN_VERSION 0x70 struct rockchip_can { @@ -209,7 +211,7 @@ static int rockchip_can_start(struct net_device *ndev) /* RECEIVING FILTER, accept all */ writel(0, rcan->base + CAN_ID); - writel(0xfffffff, rcan->base + CAN_ID_MASK); + writel(CAN_RX_FILTER_MASK, rcan->base + CAN_ID_MASK); rockchip_can_set_bittiming(ndev); diff --git a/drivers/net/can/rockchip/rockchip_canfd.c b/drivers/net/can/rockchip/rockchip_canfd.c index 8622f6a56109..9a1c9c571582 100644 --- a/drivers/net/can/rockchip/rockchip_canfd.c +++ b/drivers/net/can/rockchip/rockchip_canfd.c @@ -200,6 +200,8 @@ enum rockchip_canfd_reg { #define CAN_TXEFRD_OFFSET(n) (CAN_TXEFRD + CAN_TEF_SIZE * (n)) #define CAN_RXFRD_OFFSET(n) (CAN_RXFRD + CAN_RF_SIZE * (n)) +#define CAN_RX_FILTER_MASK 0x1fffffff + #define DRV_NAME "rockchip_canfd" /* rockchip_canfd private data structure */ @@ -380,17 +382,17 @@ static int rockchip_canfd_start(struct net_device *ndev) /* RECEIVING FILTER, accept all */ rockchip_canfd_write(rcan, CAN_IDCODE, 0); - rockchip_canfd_write(rcan, CAN_IDMASK, 0xfffffff); + rockchip_canfd_write(rcan, CAN_IDMASK, CAN_RX_FILTER_MASK); rockchip_canfd_write(rcan, CAN_IDCODE0, 0); - rockchip_canfd_write(rcan, CAN_IDMASK0, 0xfffffff); + rockchip_canfd_write(rcan, CAN_IDMASK0, CAN_RX_FILTER_MASK); rockchip_canfd_write(rcan, CAN_IDCODE1, 0); - rockchip_canfd_write(rcan, CAN_IDMASK1, 0xfffffff); + rockchip_canfd_write(rcan, CAN_IDMASK1, CAN_RX_FILTER_MASK); rockchip_canfd_write(rcan, CAN_IDCODE2, 0); - rockchip_canfd_write(rcan, CAN_IDMASK2, 0xfffffff); + rockchip_canfd_write(rcan, CAN_IDMASK2, CAN_RX_FILTER_MASK); rockchip_canfd_write(rcan, CAN_IDCODE3, 0); - rockchip_canfd_write(rcan, CAN_IDMASK3, 0xfffffff); + rockchip_canfd_write(rcan, CAN_IDMASK3, CAN_RX_FILTER_MASK); rockchip_canfd_write(rcan, CAN_IDCODE4, 0); - rockchip_canfd_write(rcan, CAN_IDMASK4, 0xfffffff); + rockchip_canfd_write(rcan, CAN_IDMASK4, CAN_RX_FILTER_MASK); /* set mode */ val = rockchip_canfd_read(rcan, CAN_MODE);