From 39b8455a14c887d35de2eb189efbe3aa32070093 Mon Sep 17 00:00:00 2001 From: Jon Lin Date: Wed, 5 Jul 2023 15:33:13 +0800 Subject: [PATCH] mtd: spinand: gigadevice: Sync with upstream from commit: 5b7261b mtd: spinand: winbond: Add support for Winbond W35N01JW SPI NAND flash Change-Id: Iabca09af99d7b94150c847653faf0275228b7144 Signed-off-by: Jon Lin Signed-off-by: Tao Huang --- drivers/mtd/nand/spi/gigadevice.c | 30 ++++++++++-------------------- 1 file changed, 10 insertions(+), 20 deletions(-) diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c index 176b6c425dd3..fcd6246fccf4 100644 --- a/drivers/mtd/nand/spi/gigadevice.c +++ b/drivers/mtd/nand/spi/gigadevice.c @@ -435,16 +435,6 @@ static const struct spinand_info gigadevice_spinand_table[] = { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, gd5fxgq5xexxg_ecc_get_status)), - SPINAND_INFO("GD5F2GQ4UBxxG", - SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xd2), - NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), - NAND_ECCREQ(8, 512), - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, - &write_cache_variants, - &update_cache_variants), - SPINAND_HAS_QE_BIT, - SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, - gd5fxgq4xa_ecc_get_status)), SPINAND_INFO("GD5F2GQ5RExxG", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x42), NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), @@ -465,16 +455,6 @@ static const struct spinand_info gigadevice_spinand_table[] = { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, gd5fxgq5xexxg_ecc_get_status)), - SPINAND_INFO("GD5F1GQ4UExxH", - SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xd9), - NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), - NAND_ECCREQ(8, 512), - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, - &write_cache_variants, - &update_cache_variants), - SPINAND_HAS_QE_BIT, - SPINAND_ECCINFO(&gd5fxgqx_variant3_ooblayout, - gd5fxgq4xa_ecc_get_status)), SPINAND_INFO("GD5F4GQ6RExxG", SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x45), NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 2, 1), @@ -545,6 +525,16 @@ static const struct spinand_info gigadevice_spinand_table[] = { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, gd5fxgq4uexxg_ecc_get_status)), + SPINAND_INFO("GD5F1GQ4UExxH", + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xd9), + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), + NAND_ECCREQ(8, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgqx_variant3_ooblayout, + gd5fxgq4xa_ecc_get_status)), }; static const struct spinand_manufacturer_ops gigadevice_spinand_manuf_ops = {