From 3a3bde59ba2ba1d517f141effe7f635b208de9f5 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Thu, 16 Dec 2021 10:35:15 +0800 Subject: [PATCH] arm64: defconfig: Enable CONFIG_PCIEASPM_POWERSAVE Enable Low power mode for PCIE by default, the PCIe subsystem will enter L0s/L1 under hardware control. Signed-off-by: Kever Yang Change-Id: I9558587f23cf6b4f852ca6b5d1ab5a9f9eb014ca --- arch/arm64/configs/rockchip_defconfig | 1 + arch/arm64/configs/rockchip_linux_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm64/configs/rockchip_defconfig b/arch/arm64/configs/rockchip_defconfig index 5b4e2f40573e..73dce613fb12 100644 --- a/arch/arm64/configs/rockchip_defconfig +++ b/arch/arm64/configs/rockchip_defconfig @@ -261,6 +261,7 @@ CONFIG_RFKILL=y CONFIG_RFKILL_RK=y CONFIG_PCI=y CONFIG_PCIEPORTBUS=y +CONFIG_PCIEASPM_POWERSAVE=y CONFIG_PCIE_ROCKCHIP_HOST=y CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_DEVTMPFS=y diff --git a/arch/arm64/configs/rockchip_linux_defconfig b/arch/arm64/configs/rockchip_linux_defconfig index 27c61db8e271..191375356053 100644 --- a/arch/arm64/configs/rockchip_linux_defconfig +++ b/arch/arm64/configs/rockchip_linux_defconfig @@ -100,6 +100,7 @@ CONFIG_RFKILL=y CONFIG_RFKILL_RK=y CONFIG_PCI=y CONFIG_PCIEPORTBUS=y +CONFIG_PCIEASPM_POWERSAVE=y CONFIG_PCIE_ROCKCHIP_HOST=y CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_DEVTMPFS=y