mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-09 12:17:12 +09:00
ath9k_hw: avoid possible infinite loop in ar9003_get_pll_sqsum_dvc
commitf18e3c6b67upstream. "ath9k: Fix softlockup in AR9485" with commit id64bc1239c7fixed the reported issue, yet its better to avoid the possible infinite loop in ar9003_get_pll_sqsum_dvc by having a timeout as suggested by ath9k maintainers. http://www.spinics.net/lists/linux-wireless/msg92126.html. Based on my testing PLL's locking measurement is done in ~200us (2 iterations). Cc: Rolf Offermanns <rolf.offermanns@gmx.net> Cc: Sujith Manoharan <c_manoha@qca.qualcomm.com> Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com> Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
de39eed0da
commit
3a3ca923be
@@ -682,13 +682,25 @@ static void ath9k_hw_init_qos(struct ath_hw *ah)
|
||||
|
||||
u32 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah)
|
||||
{
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
int i = 0;
|
||||
|
||||
REG_CLR_BIT(ah, PLL3, PLL3_DO_MEAS_MASK);
|
||||
udelay(100);
|
||||
REG_SET_BIT(ah, PLL3, PLL3_DO_MEAS_MASK);
|
||||
|
||||
while ((REG_READ(ah, PLL4) & PLL4_MEAS_DONE) == 0)
|
||||
while ((REG_READ(ah, PLL4) & PLL4_MEAS_DONE) == 0) {
|
||||
|
||||
udelay(100);
|
||||
|
||||
if (WARN_ON_ONCE(i >= 100)) {
|
||||
ath_err(common, "PLL4 meaurement not done\n");
|
||||
break;
|
||||
}
|
||||
|
||||
i++;
|
||||
}
|
||||
|
||||
return (REG_READ(ah, PLL3) & SQSUM_DVC_MASK) >> 3;
|
||||
}
|
||||
EXPORT_SYMBOL(ar9003_get_pll_sqsum_dvc);
|
||||
|
||||
Reference in New Issue
Block a user