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hdmirx: optimize for hdcp22 [1/1]

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PD#SWPL-13130

Problem:
on LG UBK80-N DVD, hdcp22 auth passed before esm reset,
auth status will be reset, result in black screen

Solution:
delay hdcp22 auth to after esm reset

Verify:
TXLX

Change-Id: I4e7fe60cf3117712eea5f8b1eec65d544b557a48
Signed-off-by: Hang Cheng <hang.cheng@amlogic.com>
This commit is contained in:
Hang Cheng
2019-08-22 17:29:49 +08:00
committed by Luke Go
parent 4bd1404666
commit 3a9c1b3b3b
2 changed files with 12 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.h
View File

@@ -47,7 +47,7 @@
*
*
*/
#define RX_VER2 "ver.2019/07/30"
#define RX_VER2 "ver.2019/08/22"
/*print type*/
#define LOG_EN 0x01

20
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.c
View File

@@ -1700,10 +1700,11 @@ hdmirx_wr_dwc(DWC_DMI_SW_RST, 0x0000001F);
void rx_esm_tmdsclk_en(bool en)
{
hdmirx_wr_bits_top(TOP_CLK_CNTL, HDCP22_TMDSCLK_EN, en);
if (log_level & HDCP_LOG)
rx_pr("%s:%d\n", __func__, en);
hdmirx_wr_bits_top(TOP_CLK_CNTL, HDCP22_TMDSCLK_EN, en);
if (hdcp22_on)
hdmirx_hdcp22_hpd(en);
if (log_level & HDCP_LOG)
rx_pr("%s:%d\n", __func__, en);
}
/*
@@ -1993,11 +1994,12 @@ data32 |= 10 << 20; /* [29:20] chlock_max_err */
data32 |= 24000 << 0; /* [15:0] milisec_timer_limit */
hdmirx_wr_dwc(DWC_CHLOCK_CONFIG, data32);
/* hdcp2.2 ctl */
if (hdcp22_on)
hdmirx_wr_dwc(DWC_HDCP22_CONTROL, 0x1000);
else
hdmirx_wr_dwc(DWC_HDCP22_CONTROL, 2);
/* hdcp2.2 ctl */
if (hdcp22_on)
/* set hdcp_hpd high later */
hdmirx_wr_dwc(DWC_HDCP22_CONTROL, 0);
else
hdmirx_wr_dwc(DWC_HDCP22_CONTROL, 2);
}