From 3c734e64aa2c92e8d8ace4b28171f90d5d2cb5a2 Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Thu, 1 Feb 2018 20:12:35 +0800 Subject: [PATCH] clk: rockchip: rk3368: Add clock id for tsp Change-Id: I79a423f93f991aab43922e58ce34eac1754304e2 Signed-off-by: Finley Xiao Signed-off-by: Elaine Zhang --- drivers/clk/rockchip/clk-rk3368.c | 4 ++-- include/dt-bindings/clock/rk3368-cru.h | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3368.c b/drivers/clk/rockchip/clk-rk3368.c index b7198ee07e90..9a2b54bbabbb 100644 --- a/drivers/clk/rockchip/clk-rk3368.c +++ b/drivers/clk/rockchip/clk-rk3368.c @@ -433,10 +433,10 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = { GATE(SCLK_I2S_2CH, "sclk_i2s_2ch", "i2s_2ch_pre", CLK_SET_RATE_PARENT, RK3368_CLKGATE_CON(5), 15, GFLAGS), - COMPOSITE(0, "sclk_tsp", mux_pll_src_cpll_gpll_npll_p, 0, + COMPOSITE(SCLK_TSP, "sclk_tsp", mux_pll_src_cpll_gpll_npll_p, 0, RK3368_CLKSEL_CON(46), 6, 2, MFLAGS, 0, 5, DFLAGS, RK3368_CLKGATE_CON(6), 12, GFLAGS), - GATE(0, "sclk_hsadc_tsp", "ext_hsadc_tsp", 0, + GATE(SCLK_HSADC_TSP, "sclk_hsadc_tsp", "ext_hsadc_tsp", 0, RK3368_CLKGATE_CON(13), 7, GFLAGS), MUX(0, "uart_src", mux_pll_src_cpll_gpll_p, 0, diff --git a/include/dt-bindings/clock/rk3368-cru.h b/include/dt-bindings/clock/rk3368-cru.h index 690800da96b0..5d3531686790 100644 --- a/include/dt-bindings/clock/rk3368-cru.h +++ b/include/dt-bindings/clock/rk3368-cru.h @@ -92,6 +92,8 @@ #define SCLK_TIMER14 137 #define SCLK_TIMER15 138 #define SCLK_DDRCLK 139 +#define SCLK_TSP 140 +#define SCLK_HSADC_TSP 141 #define DCLK_VOP 190 #define MCLK_CRYPTO 191