diff --git a/arch/arm64/boot/dts/rockchip/rk3368-tb-sheep.dts b/arch/arm64/boot/dts/rockchip/rk3368-tb-sheep.dts
index d21a6eac9e55..e1a17f0a4a8d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-tb-sheep.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-tb-sheep.dts
@@ -111,10 +111,34 @@
 	cpu-supply = <&syr827>;
 };
 
+&cpu_l1 {
+	cpu-supply = <&syr827>;
+};
+
+&cpu_l2 {
+	cpu-supply = <&syr827>;
+};
+
+&cpu_l3 {
+	cpu-supply = <&syr827>;
+};
+
 &cpu_b0 {
 	cpu-supply = <&syr827>;
 };
 
+&cpu_b1 {
+	cpu-supply = <&syr827>;
+};
+
+&cpu_b2 {
+	cpu-supply = <&syr827>;
+};
+
+&cpu_b3 {
+	cpu-supply = <&syr827>;
+};
+
 &gpu {
 	logic-supply = <&vdd_logic>;
 };
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 55af19b5d5c5..1546d5221f82 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -137,6 +137,7 @@
 			reg = <0x0 0x1>;
 			cpu-idle-states = <&cpu_sleep>;
 			enable-method = "psci";
+			clocks = <&cru ARMCLKL>;
 			operating-points-v2 = <&cluster1_opp>;
 		};
 
@@ -146,6 +147,7 @@
 			reg = <0x0 0x2>;
 			cpu-idle-states = <&cpu_sleep>;
 			enable-method = "psci";
+			clocks = <&cru ARMCLKL>;
 			operating-points-v2 = <&cluster1_opp>;
 		};
 
@@ -155,6 +157,7 @@
 			reg = <0x0 0x3>;
 			cpu-idle-states = <&cpu_sleep>;
 			enable-method = "psci";
+			clocks = <&cru ARMCLKL>;
 			operating-points-v2 = <&cluster1_opp>;
 		};
 
@@ -174,6 +177,7 @@
 			reg = <0x0 0x101>;
 			cpu-idle-states = <&cpu_sleep>;
 			enable-method = "psci";
+			clocks = <&cru ARMCLKB>;
 			operating-points-v2 = <&cluster0_opp>;
 		};
 
@@ -183,6 +187,7 @@
 			reg = <0x0 0x102>;
 			cpu-idle-states = <&cpu_sleep>;
 			enable-method = "psci";
+			clocks = <&cru ARMCLKB>;
 			operating-points-v2 = <&cluster0_opp>;
 		};
 
@@ -192,6 +197,7 @@
 			reg = <0x0 0x103>;
 			cpu-idle-states = <&cpu_sleep>;
 			enable-method = "psci";
+			clocks = <&cru ARMCLKB>;
 			operating-points-v2 = <&cluster0_opp>;
 		};
 	};