From 3db3717c1e0c4f12f50452912a346dd13bd3ee4a Mon Sep 17 00:00:00 2001 From: Xu Jianqun Date: Tue, 26 Jan 2016 18:02:29 +0800 Subject: [PATCH] clk: rockchip: rk3368 plls' supports 1188MHz Since HDMI needs clock rate 74.25MHz, so plls must support a multiple of it. For Rockchip rk3368 pll has better jetter with 1188MHz, so add 1188MHz support. Change-Id: I68c7333ae076ecabf8637298ee8ca43149cb17d1 Signed-off-by: Xu Jianqun Signed-off-by: Elaine Zhang --- drivers/clk/rockchip/clk-rk3368.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/rockchip/clk-rk3368.c b/drivers/clk/rockchip/clk-rk3368.c index 0886365c7864..12bee36c88f2 100644 --- a/drivers/clk/rockchip/clk-rk3368.c +++ b/drivers/clk/rockchip/clk-rk3368.c @@ -67,6 +67,7 @@ static struct rockchip_pll_rate_table rk3368_pll_rates[] = { RK3066_PLL_RATE(1248000000, 1, 52, 1), RK3066_PLL_RATE(1224000000, 1, 51, 1), RK3066_PLL_RATE(1200000000, 1, 50, 1), + RK3066_PLL_RATE(1188000000, 2, 99, 1), RK3066_PLL_RATE(1176000000, 1, 49, 1), RK3066_PLL_RATE(1128000000, 1, 47, 1), RK3066_PLL_RATE(1104000000, 1, 46, 1),