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UPSTREAM: perf: pmuv3: Abstract PMU version checks
The current PMU version definitions are available for arm64 only,
As we want to add PMUv3 support to arm (32-bit), abstracts
these definitions by using arch-specific helpers.
Change-Id: I4d487c354c5b1384d2e8c95d097c0d3864907787
Signed-off-by: Zaid Al-Bassam <zalbassam@google.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20230317195027.3746949-4-zalbassam@google.com
Signed-off-by: Will Deacon <will@kernel.org>
(cherry picked from commit 711432770f)
Signed-off-by: Danesh Petigara <danesh.petigara@broadcom.com>
This commit is contained in:
committed by
Pierre Couillaud
parent
55cfecdaaa
commit
3e7e6fa4da
@@ -134,4 +134,20 @@ static inline u32 read_pmceid1(void)
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return read_sysreg(pmceid1_el0);
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}
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static inline bool pmuv3_implemented(int pmuver)
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{
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return !(pmuver == ID_AA64DFR0_EL1_PMUVer_IMP_DEF ||
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pmuver == ID_AA64DFR0_EL1_PMUVer_NI);
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}
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static inline bool is_pmuv3p4(int pmuver)
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{
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return pmuver >= ID_AA64DFR0_EL1_PMUVer_V3P4;
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}
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static inline bool is_pmuv3p5(int pmuver)
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{
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return pmuver >= ID_AA64DFR0_EL1_PMUVer_V3P5;
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}
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#endif
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@@ -396,7 +396,7 @@ static const struct attribute_group armv8_pmuv3_caps_attr_group = {
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*/
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static bool armv8pmu_has_long_event(struct arm_pmu *cpu_pmu)
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{
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return (cpu_pmu->pmuver >= ID_AA64DFR0_EL1_PMUVer_V3P5);
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return (is_pmuv3p5(cpu_pmu->pmuver));
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}
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static inline bool armv8pmu_event_has_user_read(struct perf_event *event)
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@@ -1082,8 +1082,7 @@ static void __armv8pmu_probe_pmu(void *info)
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int pmuver;
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pmuver = read_pmuver();
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if (pmuver == ID_AA64DFR0_EL1_PMUVer_IMP_DEF ||
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pmuver == ID_AA64DFR0_EL1_PMUVer_NI)
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if (!pmuv3_implemented(pmuver))
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return;
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cpu_pmu->pmuver = pmuver;
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@@ -1109,7 +1108,7 @@ static void __armv8pmu_probe_pmu(void *info)
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pmceid, ARMV8_PMUV3_MAX_COMMON_EVENTS);
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/* store PMMIR register for sysfs */
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if (pmuver >= ID_AA64DFR0_EL1_PMUVer_V3P4 && (pmceid_raw[1] & BIT(31)))
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if (is_pmuv3p4(pmuver) && (pmceid_raw[1] & BIT(31)))
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cpu_pmu->reg_pmmir = read_pmmir();
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else
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cpu_pmu->reg_pmmir = 0;
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