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UPSTREAM: perf: pmuv3: Abstract PMU version checks

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The current PMU version definitions are available for arm64 only,
As we want to add PMUv3 support to arm (32-bit), abstracts
these definitions by using arch-specific helpers.

Change-Id: I4d487c354c5b1384d2e8c95d097c0d3864907787
Signed-off-by: Zaid Al-Bassam <zalbassam@google.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20230317195027.3746949-4-zalbassam@google.com
Signed-off-by: Will Deacon <will@kernel.org>
(cherry picked from commit 711432770f)
Signed-off-by: Danesh Petigara <danesh.petigara@broadcom.com>
This commit is contained in:
Zaid Al-Bassam
2023-03-17 15:50:22 -04:00
committed by Pierre Couillaud
parent 55cfecdaaa
commit 3e7e6fa4da
2 changed files with 19 additions and 4 deletions
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16
arch/arm64/include/asm/arm_pmuv3.h
View File

@@ -134,4 +134,20 @@ static inline u32 read_pmceid1(void)
return read_sysreg(pmceid1_el0); return read_sysreg(pmceid1_el0);
} }
static inline bool pmuv3_implemented(int pmuver)
{
return !(pmuver == ID_AA64DFR0_EL1_PMUVer_IMP_DEF ||
pmuver == ID_AA64DFR0_EL1_PMUVer_NI);
}
static inline bool is_pmuv3p4(int pmuver)
{
return pmuver >= ID_AA64DFR0_EL1_PMUVer_V3P4;
}
static inline bool is_pmuv3p5(int pmuver)
{
return pmuver >= ID_AA64DFR0_EL1_PMUVer_V3P5;
}
#endif #endif

7
drivers/perf/arm_pmuv3.c
View File

@@ -396,7 +396,7 @@ static const struct attribute_group armv8_pmuv3_caps_attr_group = {
*/ */
static bool armv8pmu_has_long_event(struct arm_pmu *cpu_pmu) static bool armv8pmu_has_long_event(struct arm_pmu *cpu_pmu)
{ {
return (cpu_pmu->pmuver >= ID_AA64DFR0_EL1_PMUVer_V3P5); return (is_pmuv3p5(cpu_pmu->pmuver));
} }
static inline bool armv8pmu_event_has_user_read(struct perf_event *event) static inline bool armv8pmu_event_has_user_read(struct perf_event *event)
@@ -1082,8 +1082,7 @@ static void __armv8pmu_probe_pmu(void *info)
int pmuver; int pmuver;
pmuver = read_pmuver(); pmuver = read_pmuver();
if (pmuver == ID_AA64DFR0_EL1_PMUVer_IMP_DEF || if (!pmuv3_implemented(pmuver))
pmuver == ID_AA64DFR0_EL1_PMUVer_NI)
return; return;
cpu_pmu->pmuver = pmuver; cpu_pmu->pmuver = pmuver;
@@ -1109,7 +1108,7 @@ static void __armv8pmu_probe_pmu(void *info)
pmceid, ARMV8_PMUV3_MAX_COMMON_EVENTS); pmceid, ARMV8_PMUV3_MAX_COMMON_EVENTS);
/* store PMMIR register for sysfs */ /* store PMMIR register for sysfs */
if (pmuver >= ID_AA64DFR0_EL1_PMUVer_V3P4 && (pmceid_raw[1] & BIT(31))) if (is_pmuv3p4(pmuver) && (pmceid_raw[1] & BIT(31)))
cpu_pmu->reg_pmmir = read_pmmir(); cpu_pmu->reg_pmmir = read_pmmir();
else else
cpu_pmu->reg_pmmir = 0; cpu_pmu->reg_pmmir = 0;