From 3fc0de144c09e6f8405ee43933d10d9e10df8d10 Mon Sep 17 00:00:00 2001 From: Algea Cao Date: Tue, 16 Nov 2021 15:19:59 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3588s: Add hdptx hdmi phy0 node Signed-off-by: Algea Cao Change-Id: I99484d5a6c0c74612d40586a76bc946549f333eb --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 3a3cff07ee4c..c29da57d2119 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -2322,10 +2322,12 @@ resets = <&cru SRST_HDMITX0_REF>, <&cru SRST_HDMIHDP0>; reset-names = "ref", "hdp"; power-domains = <&power RK3588_PD_VO1>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda>; reg-io-width = <4>; rockchip,grf = <&sys_grf>; rockchip,vo1_grf = <&vo1_grf>; - phys = <&hdptxphy0>; + phys = <&hdptxphy_hdmi0>; phy-names = "hdmi"; #sound-dai-cells = <0>; status = "disabled"; @@ -3824,6 +3826,22 @@ status = "disabled"; }; + hdptxphy_hdmi0: hdmiphy@fed60000 { + compatible = "rockchip,rk3588-hdptx-phy-hdmi"; + reg = <0x0 0xfed60000 0x0 0x2000>; + clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>, <&cru PCLK_HDPTX0>; + clock-names = "ref", "apb"; + resets = <&cru SRST_HDPTX0>, <&cru SRST_P_HDPTX0>, + <&cru SRST_HDPTX0_INIT>, <&cru SRST_HDPTX0_CMN>, + <&cru SRST_HDPTX0_LANE>, <&cru SRST_HDPTX0_ROPLL>, + <&cru SRST_HDPTX0_LCPLL>; + reset-names = "phy", "apb", "init", "cmn", "lane", "ropll", + "lcpll"; + rockchip,grf = <&hdptxphy0_grf>; + #phy-cells = <0>; + status = "disabled"; + }; + usbdp_phy0: phy@fed80000 { compatible = "rockchip,rk3588-usbdp-phy"; reg = <0x0 0xfed80000 0x0 0x10000>;