From 3ffff820edf60c073c73a0a010efa53b7812b25b Mon Sep 17 00:00:00 2001 From: Zheng Yang Date: Mon, 16 Apr 2018 15:05:05 +0800 Subject: [PATCH] phy: rockchip: inno-hdmi: fix 3229 div zero error in recalc_rate Pre PLL pclk_dividera value range is from 1 to 31, but the default value of register 0xe0 on 3229 is zero. To avoid div zero error, we take the divider value as one. [] (unwind_backtrace) from [] (show_stack+0x20/0x24) [] (show_stack) from [] (dump_stack+0x80/0xa0) [] (dump_stack) from [] (__div0+0x20/0x28) [] (__div0) from [] (Ldiv0_64+0x8/0x18) [] (Ldiv0_64) from [] (inno_hdmi_rk3228_phy_pll_recalc_rate+0x104/0x114) [] (inno_hdmi_rk3228_phy_pll_recalc_rate) from [] (inno_hdmi_phy_clk_recalc_rate+0x30/0x3c) [] (inno_hdmi_phy_clk_recalc_rate) from [] (clk_register+0x438/0x64c) [] (clk_register) from [] (devm_clk_register+0x54/0x94) [] (devm_clk_register) from [] (inno_hdmi_phy_probe+0x24c/0x378) [] (inno_hdmi_phy_probe) from [] (platform_drv_probe+0x60/0xac) [] (platform_drv_probe) from [] (driver_probe_device+0x120/0x2a8) [] (driver_probe_device) from [] (__driver_attach+0x78/0x9c) [] (__driver_attach) from [] (bus_for_each_dev+0x84/0x98) [] (bus_for_each_dev) from [] (driver_attach+0x28/0x30) [] (driver_attach) from [] (bus_add_driver+0xdc/0x1f8) [] (bus_add_driver) from [] (driver_register+0xac/0xf0) [] (driver_register) from [] (__platform_driver_register+0x40/0x54) [] (__platform_driver_register) from [] (inno_hdmi_phy_driver_init+0x18/0x20) [] (inno_hdmi_phy_driver_init) from [] (do_one_initcall+0x114/0x1c8) [] (do_one_initcall) from [] (kernel_init_freeable+0x1ac/0x280) [] (kernel_init_freeable) from [] (kernel_init+0x18/0x11c) [] (kernel_init) from [] (ret_from_fork+0x14/0x24) Change-Id: Ib61fbd87547d3316e9ed5b564e291b6c15d93cdd Signed-off-by: Zheng Yang --- drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c index 0865066ab163..7a991780af88 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi-phy.c @@ -1045,6 +1045,8 @@ inno_hdmi_rk3228_phy_pll_recalc_rate(struct inno_hdmi_phy *inno, do_div(vco, nd * 5); } else { no_a = inno_read(inno, 0xe4) & 0x1f; + if (!no_a) + no_a = 1; no_b = ((inno_read(inno, 0xe4) >> 5) & 0x3) + 2; no_d = inno_read(inno, 0xe5) & 0x1f;