From 400d27416990db83e67aee4ebf1e846127b3aae9 Mon Sep 17 00:00:00 2001 From: Yu Qiaowei Date: Tue, 5 Mar 2024 10:49:00 +0800 Subject: [PATCH] video: rockchip: rga3: fix the memory arrangement of ARGB5551/4444 1. Fixed swap config of ARGB/ABGR 5551/4444. 2. RGA2 removes unsupported RGBA/BGRA 5551/4444 input. Update driver version to 1.3.2 Signed-off-by: Yu Qiaowei Change-Id: I3d2300f07282a256e2950e3400e9a52e9702164d --- drivers/video/rockchip/rga3/include/rga_drv.h | 2 +- drivers/video/rockchip/rga3/rga2_reg_info.c | 44 ------------------- drivers/video/rockchip/rga3/rga_hw_config.c | 16 ------- 3 files changed, 1 insertion(+), 61 deletions(-) diff --git a/drivers/video/rockchip/rga3/include/rga_drv.h b/drivers/video/rockchip/rga3/include/rga_drv.h index 9496e1d928ef..84c6f67a218a 100644 --- a/drivers/video/rockchip/rga3/include/rga_drv.h +++ b/drivers/video/rockchip/rga3/include/rga_drv.h @@ -87,7 +87,7 @@ #define DRIVER_MAJOR_VERISON 1 #define DRIVER_MINOR_VERSION 3 -#define DRIVER_REVISION_VERSION 1 +#define DRIVER_REVISION_VERSION 2 #define DRIVER_PATCH_VERSION #define DRIVER_VERSION (STR(DRIVER_MAJOR_VERISON) "." STR(DRIVER_MINOR_VERSION) \ diff --git a/drivers/video/rockchip/rga3/rga2_reg_info.c b/drivers/video/rockchip/rga3/rga2_reg_info.c index d355e80ab1ba..a991bd35af06 100644 --- a/drivers/video/rockchip/rga3/rga2_reg_info.c +++ b/drivers/video/rockchip/rga3/rga2_reg_info.c @@ -425,30 +425,12 @@ static void RGA2_set_reg_src_info(u8 *base, struct rga2_req *msg) pixel_width = 2; msg->src_trans_mode &= 0x07; break; - case RGA_FORMAT_RGBA_5551: - src0_format = 0x5; - pixel_width = 2; - break; - case RGA_FORMAT_RGBA_4444: - src0_format = 0x6; - pixel_width = 2; - break; case RGA_FORMAT_BGR_565: src0_format = 0x4; pixel_width = 2; msg->src_trans_mode &= 0x07; src0_rb_swp = 0x1; break; - case RGA_FORMAT_BGRA_5551: - src0_format = 0x5; - pixel_width = 2; - src0_rb_swp = 0x1; - break; - case RGA_FORMAT_BGRA_4444: - src0_format = 0x6; - pixel_width = 2; - src0_rb_swp = 0x1; - break; /* ARGB */ /* @@ -482,23 +464,19 @@ static void RGA2_set_reg_src_info(u8 *base, struct rga2_req *msg) case RGA_FORMAT_ARGB_5551: src0_format = 0x5; pixel_width = 2; - src0_alpha_swp = 1; break; case RGA_FORMAT_ABGR_5551: src0_format = 0x5; pixel_width = 2; - src0_alpha_swp = 1; src0_rb_swp = 0x1; break; case RGA_FORMAT_ARGB_4444: src0_format = 0x6; pixel_width = 2; - src0_alpha_swp = 1; break; case RGA_FORMAT_ABGR_4444: src0_format = 0x6; pixel_width = 2; - src0_alpha_swp = 1; src0_rb_swp = 0x1; break; @@ -947,29 +925,11 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg) src1_format = 0x4; spw = 2; break; - case RGA_FORMAT_RGBA_5551: - src1_format = 0x5; - spw = 2; - break; - case RGA_FORMAT_RGBA_4444: - src1_format = 0x6; - spw = 2; - break; case RGA_FORMAT_BGR_565: src1_format = 0x4; spw = 2; src1_rb_swp = 0x1; break; - case RGA_FORMAT_BGRA_5551: - src1_format = 0x5; - spw = 2; - src1_rb_swp = 0x1; - break; - case RGA_FORMAT_BGRA_4444: - src1_format = 0x6; - spw = 2; - src1_rb_swp = 0x1; - break; /* ARGB */ case RGA_FORMAT_ARGB_8888: @@ -997,23 +957,19 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg) case RGA_FORMAT_ARGB_5551: src1_format = 0x5; spw = 2; - src1_alpha_swp = 1; break; case RGA_FORMAT_ABGR_5551: src1_format = 0x5; spw = 2; - src1_alpha_swp = 1; src1_rb_swp = 0x1; break; case RGA_FORMAT_ARGB_4444: src1_format = 0x6; spw = 2; - src1_alpha_swp = 1; break; case RGA_FORMAT_ABGR_4444: src1_format = 0x6; spw = 2; - src1_alpha_swp = 1; src1_rb_swp = 0x1; break; case RGA_FORMAT_RGBA_2BPP: diff --git a/drivers/video/rockchip/rga3/rga_hw_config.c b/drivers/video/rockchip/rga3/rga_hw_config.c index ad52bd3bf3e0..18c4eacd03ac 100644 --- a/drivers/video/rockchip/rga3/rga_hw_config.c +++ b/drivers/video/rockchip/rga3/rga_hw_config.c @@ -109,10 +109,6 @@ const uint32_t rga2e_input_raster_format[] = { RGA_FORMAT_YCbCr_422_SP_10B, RGA_FORMAT_YCrCb_422_SP_10B, RGA_FORMAT_YCbCr_400, - RGA_FORMAT_RGBA_5551, - RGA_FORMAT_BGRA_5551, - RGA_FORMAT_RGBA_4444, - RGA_FORMAT_BGRA_4444, RGA_FORMAT_XRGB_8888, RGA_FORMAT_XBGR_8888, RGA_FORMAT_BPP1, @@ -158,10 +154,6 @@ const uint32_t rga2e_output_raster_format[] = { RGA_FORMAT_YCrCb_422_SP_10B, RGA_FORMAT_Y4, RGA_FORMAT_YCbCr_400, - RGA_FORMAT_RGBA_5551, - RGA_FORMAT_BGRA_5551, - RGA_FORMAT_RGBA_4444, - RGA_FORMAT_BGRA_4444, RGA_FORMAT_XRGB_8888, RGA_FORMAT_XBGR_8888, RGA_FORMAT_ARGB_8888, @@ -198,10 +190,6 @@ const uint32_t rga2p_input_raster_format[] = { RGA_FORMAT_YCbCr_422_SP_10B, RGA_FORMAT_YCrCb_422_SP_10B, RGA_FORMAT_YCbCr_400, - RGA_FORMAT_RGBA_5551, - RGA_FORMAT_BGRA_5551, - RGA_FORMAT_RGBA_4444, - RGA_FORMAT_BGRA_4444, RGA_FORMAT_XRGB_8888, RGA_FORMAT_XBGR_8888, RGA_FORMAT_BPP1, @@ -229,12 +217,8 @@ const uint32_t rga2p_input1_raster_format[] = { RGA_FORMAT_XBGR_8888, RGA_FORMAT_ARGB_8888, RGA_FORMAT_ABGR_8888, - RGA_FORMAT_RGBA_5551, - RGA_FORMAT_BGRA_5551, RGA_FORMAT_ARGB_5551, RGA_FORMAT_ABGR_5551, - RGA_FORMAT_RGBA_4444, - RGA_FORMAT_BGRA_4444, RGA_FORMAT_ARGB_4444, RGA_FORMAT_ABGR_4444, RGA_FORMAT_RGB_888,