From 408db6d88dccdfd5bf59e859321e4db419d49a3c Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Tue, 21 Mar 2023 17:35:39 +0000 Subject: [PATCH] Revert "PCI: loongson: Add more devices that need MRRS quirk" This reverts commit 19c4d6c7b0497750cfbfd9f83dc54ea82821ec87. It breaks the ABI right now, but will be brought back at the next ABI break as it will be needed for Android systems. Bug: 161946584 Change-Id: I0d81c2395d7e4e42c81631040b40e936f2ccdf6a Signed-off-by: Greg Kroah-Hartman --- drivers/pci/controller/pci-loongson.c | 33 ++++++++------------------- 1 file changed, 9 insertions(+), 24 deletions(-) diff --git a/drivers/pci/controller/pci-loongson.c b/drivers/pci/controller/pci-loongson.c index e73e18a73833..dc7b4e4293ce 100644 --- a/drivers/pci/controller/pci-loongson.c +++ b/drivers/pci/controller/pci-loongson.c @@ -13,14 +13,9 @@ #include "../pci.h" /* Device IDs */ -#define DEV_LS2K_PCIE_PORT0 0x1a05 -#define DEV_LS7A_PCIE_PORT0 0x7a09 -#define DEV_LS7A_PCIE_PORT1 0x7a19 -#define DEV_LS7A_PCIE_PORT2 0x7a29 -#define DEV_LS7A_PCIE_PORT3 0x7a39 -#define DEV_LS7A_PCIE_PORT4 0x7a49 -#define DEV_LS7A_PCIE_PORT5 0x7a59 -#define DEV_LS7A_PCIE_PORT6 0x7a69 +#define DEV_PCIE_PORT_0 0x7a09 +#define DEV_PCIE_PORT_1 0x7a19 +#define DEV_PCIE_PORT_2 0x7a29 #define DEV_LS2K_APB 0x7a02 #define DEV_LS7A_CONF 0x7a10 @@ -43,11 +38,11 @@ static void bridge_class_quirk(struct pci_dev *dev) dev->class = PCI_CLASS_BRIDGE_PCI << 8; } DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON, - DEV_LS7A_PCIE_PORT0, bridge_class_quirk); + DEV_PCIE_PORT_0, bridge_class_quirk); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON, - DEV_LS7A_PCIE_PORT1, bridge_class_quirk); + DEV_PCIE_PORT_1, bridge_class_quirk); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON, - DEV_LS7A_PCIE_PORT2, bridge_class_quirk); + DEV_PCIE_PORT_2, bridge_class_quirk); static void system_bus_quirk(struct pci_dev *pdev) { @@ -77,21 +72,11 @@ static void loongson_mrrs_quirk(struct pci_dev *pdev) bridge->no_inc_mrrs = 1; } DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON, - DEV_LS2K_PCIE_PORT0, loongson_mrrs_quirk); + DEV_PCIE_PORT_0, loongson_mrrs_quirk); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON, - DEV_LS7A_PCIE_PORT0, loongson_mrrs_quirk); + DEV_PCIE_PORT_1, loongson_mrrs_quirk); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON, - DEV_LS7A_PCIE_PORT1, loongson_mrrs_quirk); -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON, - DEV_LS7A_PCIE_PORT2, loongson_mrrs_quirk); -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON, - DEV_LS7A_PCIE_PORT3, loongson_mrrs_quirk); -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON, - DEV_LS7A_PCIE_PORT4, loongson_mrrs_quirk); -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON, - DEV_LS7A_PCIE_PORT5, loongson_mrrs_quirk); -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LOONGSON, - DEV_LS7A_PCIE_PORT6, loongson_mrrs_quirk); + DEV_PCIE_PORT_2, loongson_mrrs_quirk); static void __iomem *cfg1_map(struct loongson_pci *priv, int bus, unsigned int devfn, int where)