From 409ff5b0cebcb6da5f3939e4d829f17ae74cc198 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Fri, 29 Oct 2021 08:43:31 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3588s: Add aux clock for dp0

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I4f712f94ec2ab15c30cd9d827513cf778743f000
---
 arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index b02faefc659e..e5f2ab2b72bc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1342,7 +1342,10 @@
 		compatible = "rockchip,rk3588-dp";
 		reg = <0x0 0xfde50000 0x0 0x4000>;
 		interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru PCLK_DP0>;
+		clocks = <&cru PCLK_DP0>, <&cru CLK_AUX16M_0>;
+		clock-names = "apb", "aux";
+		assigned-clocks = <&cru CLK_AUX16M_0>;
+		assigned-clock-rates = <16000000>;
 		resets = <&cru SRST_DP0>;
 		phys = <&usbdp_phy0_dp>;
 		power-domains = <&power RK3588_PD_VO0>;