From 40fb762353e9e10e7d7586ec3458fe70edb74c63 Mon Sep 17 00:00:00 2001
From: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Date: Tue, 24 Nov 2020 09:03:51 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3568-pinctrl: add cif group
 configurations

Signed-off-by: Wang Panzhenzhuan <randy.wang@rock-chips.com>
Change-Id: I22c5661b4e77f6b0c8cdf316e14135e7b1d8b581
---
 .../boot/dts/rockchip/rk3568-pinctrl.dtsi     | 34 +++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi
index 67af8dad6f83..abc18edd46bb 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568-pinctrl.dtsi
@@ -206,6 +206,40 @@
 		};
 	};
 	cif {
+		/omit-if-no-ref/
+		cif_clkout: cif-clkout {
+			rockchip,pins =
+				/* cif_clkout */
+				<4 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;
+		};
+		/omit-if-no-ref/
+		cif_dvp_8bit: cif-dvp-8bit {
+			rockchip,pins =
+				/* cif_d8 */
+				<3 RK_PD6 1 &pcfg_pull_none>,
+				/* cif_d9 */
+				<3 RK_PD7 1 &pcfg_pull_none>,
+				/* cif_d10 */
+				<4 RK_PA0 1 &pcfg_pull_none>,
+				/* cif_d11 */
+				<4 RK_PA1 1 &pcfg_pull_none>,
+				/* cif_d12 */
+				<4 RK_PA2 1 &pcfg_pull_none>,
+				/* cif_d13 */
+				<4 RK_PA3 1 &pcfg_pull_none>,
+				/* cif_d14 */
+				<4 RK_PA4 1 &pcfg_pull_none>,
+				/* cif_d15 */
+				<4 RK_PA5 1 &pcfg_pull_none>,
+				/* cif_href */
+				<4 RK_PB6 1 &pcfg_pull_none>,
+				/* cif_vsync */
+				<4 RK_PB7 1 &pcfg_pull_none>,
+				/* cif_clkin */
+				<4 RK_PC1 1 &pcfg_pull_none>,
+				/* cif_clkout */
+				<4 RK_PC0 1 &pcfg_pull_none>;
+		};
 		/omit-if-no-ref/
 		cif_dvp_ctl: cif-dvp_ctl {
 			rockchip,pins =