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ARM: dts: rockchip: rk322x: dtsi for video codec

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Change-Id: I96428170f3d588225de24e028db42c431817dbd1
Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
This commit is contained in:
Ding Wei
2019-11-20 18:14:27 +08:00
committed by Tao Huang
parent c05dfd186f
commit 41ee9439d0
2 changed files with 46 additions and 17 deletions
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10
arch/arm/boot/dts/rk3229-evb-android.dtsi
View File

@@ -299,6 +299,10 @@
status = "okay"; status = "okay";
}; };
&mpp_srv {
status = "okay";
};
&nandc { &nandc {
status = "okay"; status = "okay";
}; };
@@ -541,7 +545,11 @@
status = "okay"; status = "okay";
}; };
&vpu_service { &vdpu {
status = "okay";
};
&vepu {
status = "okay"; status = "okay";
}; };

53
arch/arm/boot/dts/rk322x.dtsi
View File

@@ -801,20 +801,41 @@
}; };
}; };
vpu_service: vpu-service@20020000 { mpp_srv: mpp-srv {
compatible = "rockchip,vpu_service"; compatible = "rockchip,mpp-service";
reg = <0x20020000 0x800>; rockchip,taskqueue-count = <2>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, status = "disabled";
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; };
interrupt-names = "irq_dec", "irq_enc";
resets = <&cru SRST_VPU_A>, <&cru SRST_VPU_H>; vepu: vepu@20020000 {
reset-names = "video_a", "video_h"; compatible = "rockchip,vpu-encoder-v2";
reg = <0x20020000 0x400>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_enc";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clock-names = "aclk_vcodec", "hclk_vcodec"; clock-names = "aclk_vcodec", "hclk_vcodec";
power-domains = <&power RK3228_PD_VPU>; resets = <&cru SRST_VPU_A>, <&cru SRST_VPU_H>;
rockchip,grf = <&grf>; reset-names = "video_a", "video_h";
iommus = <&vpu_mmu>; iommus = <&vpu_mmu>;
allocator = <1>; power-domains = <&power RK3228_PD_VPU>;
rockchip,srv = <&mpp_srv>;
rockchip,taskqueue-node = <0>;
status = "disabled";
};
vdpu: vdpu@20020400 {
compatible = "rockchip,vpu-decoder-v2";
reg = <0x20020400 0x400>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_dec";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clock-names = "aclk_vcodec", "hclk_vcodec";
resets = <&cru SRST_VPU_A>, <&cru SRST_VPU_H>;
reset-names = "video_a", "video_h";
iommus = <&vpu_mmu>;
power-domains = <&power RK3228_PD_VPU>;
rockchip,srv = <&mpp_srv>;
rockchip,taskqueue-node = <0>;
status = "disabled"; status = "disabled";
}; };
@@ -823,15 +844,15 @@
reg = <0x20020800 0x40>; reg = <0x20020800 0x40>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vpu_mmu"; interrupt-names = "vpu_mmu";
clock-names = "aclk", "iface";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clock-names = "aclk", "iface";
power-domains = <&power RK3228_PD_VPU>; power-domains = <&power RK3228_PD_VPU>;
#iommu-cells = <0>; #iommu-cells = <0>;
status = "disabled"; status = "disabled";
}; };
rkvdec: rkvdec@20030000 { rkvdec: rkvdec@20030000 {
compatible = "rockchip,rkvdec"; compatible = "rockchip,rkv-decoder-v2";
reg = <0x20030000 0x400>; reg = <0x20030000 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_dec"; interrupt-names = "irq_dec";
@@ -844,12 +865,12 @@
<&cru SRST_RKVDEC_CABAC>, <&cru SRST_RKVDEC_CORE>; <&cru SRST_RKVDEC_CABAC>, <&cru SRST_RKVDEC_CORE>;
reset-names = "video_a", "video_h", "niu_a", "niu_h", reset-names = "video_a", "video_h", "niu_a", "niu_h",
"video_cabac", "video_core"; "video_cabac", "video_core";
iommus = <&rkvdec_mmu>;
power-domains = <&power RK3228_PD_RKVDEC>; power-domains = <&power RK3228_PD_RKVDEC>;
rockchip,srv = <&mpp_srv>;
rockchip,taskqueue-node = <1>;
operating-points-v2 = <&rkvdec_opp_table>; operating-points-v2 = <&rkvdec_opp_table>;
#cooling-cells = <2>; #cooling-cells = <2>;
rockchip,grf = <&grf>;
iommus = <&rkvdec_mmu>;
allocator = <1>;
status = "disabled"; status = "disabled";
vcodec_power_model: vcodec_power_model { vcodec_power_model: vcodec_power_model {