From 423ca25117f650f8fcba3808ef56bdfbde92f2e8 Mon Sep 17 00:00:00 2001 From: Tao Huang Date: Fri, 2 Nov 2018 18:37:13 +0800 Subject: [PATCH] ARM: dts: rockchip: remove unused rk312x dts Change-Id: I6d21ce9b30a8023e2b230a5ec40a49ab09ee3c88 Signed-off-by: Tao Huang --- arch/arm/boot/dts/rk3126-86v.dts | 373 ----- arch/arm/boot/dts/rk3126-cif-sensor.dtsi | 78 - arch/arm/boot/dts/rk3126-fpga.dts | 39 - arch/arm/boot/dts/rk3126-sdk.dts | 230 --- arch/arm/boot/dts/rk3128-86v.dts | 297 ---- arch/arm/boot/dts/rk3128-box-ns.dts | 18 - arch/arm/boot/dts/rk3128-box-rk88.dts | 421 ----- arch/arm/boot/dts/rk3128-box.dts | 420 ----- arch/arm/boot/dts/rk3128-cif-sensor.dtsi | 93 -- arch/arm/boot/dts/rk3128-sdk.dts | 189 --- arch/arm/boot/dts/rk312x-clocks.dtsi | 1916 ---------------------- arch/arm/boot/dts/rk312x-pinctrl.dtsi | 895 ---------- arch/arm/boot/dts/rk312x-sdk.dtsi | 691 -------- 13 files changed, 5660 deletions(-) delete mode 100644 arch/arm/boot/dts/rk3126-86v.dts delete mode 100644 arch/arm/boot/dts/rk3126-cif-sensor.dtsi delete mode 100644 arch/arm/boot/dts/rk3126-fpga.dts delete mode 100644 arch/arm/boot/dts/rk3126-sdk.dts delete mode 100644 arch/arm/boot/dts/rk3128-86v.dts delete mode 100644 arch/arm/boot/dts/rk3128-box-ns.dts delete mode 100644 arch/arm/boot/dts/rk3128-box-rk88.dts delete mode 100644 arch/arm/boot/dts/rk3128-box.dts delete mode 100644 arch/arm/boot/dts/rk3128-cif-sensor.dtsi delete mode 100644 arch/arm/boot/dts/rk3128-sdk.dts delete mode 100755 arch/arm/boot/dts/rk312x-clocks.dtsi delete mode 100644 arch/arm/boot/dts/rk312x-pinctrl.dtsi delete mode 100644 arch/arm/boot/dts/rk312x-sdk.dtsi diff --git a/arch/arm/boot/dts/rk3126-86v.dts b/arch/arm/boot/dts/rk3126-86v.dts deleted file mode 100644 index 1a103fe8c7ca..000000000000 --- a/arch/arm/boot/dts/rk3126-86v.dts +++ /dev/null @@ -1,373 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/dts-v1/; - -#include "rk3126.dtsi" -#include "lcd-86v-rgb1024x600.dtsi" -#include "rk3126-cif-sensor.dtsi" -#include "rk312x-sdk.dtsi" -//#include "lcd-y81349.dtsi" - -/ { - compatible = "rockchip,rk3126"; - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm0 0 25000>; - brightness-levels = <255 169 168 168 167 166 166 165 164 164 163 162 162 161 160 160 159 158 158 157 156 156 155 154 154 153 152 152 151 150 150 149 148 148 147 146 146 145 144 144 143 142 142 141 140 140 139 138 138 137 136 136 135 134 134 133 132 132 131 130 130 129 128 128 127 126 126 125 124 124 123 122 122 121 120 120 119 118 118 117 116 116 115 114 114 113 112 112 111 110 110 109 108 108 107 106 106 105 104 104 103 102 102 101 100 100 99 98 98 97 96 96 95 94 94 93 92 92 91 90 90 89 88 88 87 86 86 85 84 84 83 82 82 81 80 80 79 78 78 77 76 76 75 74 74 73 72 72 71 70 70 69 68 68 67 66 66 65 64 64 63 62 62 61 60 60 59 58 58 57 56 56 55 54 54 53 52 52 51 50 50 49 48 48 47 46 46 45 44 44 43 42 42 41 40 40 39 38 38 37 36 36 35 34 34 33 32 32 31 30 30 29 28 28 27 26 26 25 24 24 23 22 22 21 20 20 19 18 18 17 16 16 15 14 14 13 12 12 11 10 10 9 8 8 7 6 6 5 4 4 3 2 2 1 1 1 0 >; - default-brightness-level = <128>; - enable-gpios = <&gpio3 GPIO_C1 GPIO_ACTIVE_HIGH>; - }; - - gpio_poweroff { - compatible = "gpio-poweroff"; - gpios = <&gpio1 GPIO_A2 GPIO_ACTIVE_LOW>; - }; - - usb_control { - compatible = "rockchip,rk3126-usb-control"; - //host_drv_gpio = <&gpio2 GPIO_B4 GPIO_ACTIVE_LOW>; - //otg_drv_gpio = <&gpio2 GPIO_B6 GPIO_ACTIVE_LOW>; - - rockchip,remote_wakeup; - rockchip,usb_irq_wakeup; - }; - - wireless-wlan { - compatible = "wlan-platdata"; - - /* wifi_chip_type - wifi chip define - * ap6210, ap6330, ap6335 - * rtl8188eu, rtl8723bs, rtl8723bu - * esp8089 - */ - wifi_chip_type = "rtl8188eu"; - sdio_vref = <1800>; //1800mv or 3300mv - - //power_ctrl_by_pmu; - // pmu_regulator = "act_ldo3"; - // pmu_enable_level = <1>; //1->HIGH, 0->LOW - - WIFI,poweren_gpio = <&gpio1 GPIO_A1 GPIO_ACTIVE_HIGH>; - // WIFI,host_wake_irq = <&gpio4 GPIO_D6 GPIO_ACTIVE_HIGH>; - //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>; - - status = "okay"; - }; - - rockchip_suspend: rockchip_suspend { - rockchip,ctrbits = < - (0 - |RKPM_CTR_PWR_DMNS - |RKPM_CTR_GTCLKS - |RKPM_CTR_PLLS - |RKPM_CTR_ARMOFF_LPMD - |RKPM_CTR_IDLESRAM_MD - |RKPM_CTR_DDR - |RKPM_CTR_VOLTS - |RKPM_CTR_BUS_IDLE - |RKPM_CTR_VOL_PWM1 - ) - >; - rockchip,pmic-suspend_gpios = <0>; - }; - - chosen { - bootargs = "vmalloc=496M cma=4M rockchip_jtag"; - }; - -}; - -&vd_arm { - pd_ddr { - clk_ddr { - operating-points = < - /* KHz uV */ - 200000 1100000 - 300000 1100000 - 400000 1100000 - 533000 1250000 - >; - - freq-table = < - /*status freq(KHz)*/ - SYS_STATUS_NORMAL 400000 - SYS_STATUS_SUSPEND 200000 - //SYS_STATUS_VIDEO_1080P 240000 - //SYS_STATUS_VIDEO_4K 400000 - SYS_STATUS_PERFORMANCE 528000 - //SYS_STATUS_DUALVIEW 400000 - //SYS_STATUS_BOOST 324000 - //SYS_STATUS_ISP 533000 - >; - auto-freq-table = < - 240000 - 324000 - 396000 - 528000 - >; - auto-freq=<0>; - status="okay"; - }; - }; - pd_gpu { - clk_gpu { - operating-points = < - /* KHz uV */ - 200000 1100000 - 300000 1100000 - 400000 1150000 - //480000 1250000 - >; - status = "okay"; - }; - }; - pd_core { - clk_core { - operating-points = < - /* KHz uV */ - 216000 1000000 - 408000 1000000 - 600000 1100000 - 696000 1150000 - 816000 1200000 - 1008000 1350000 - 1200000 1425000 - >; - virt-temp-limit-1-cpu-busy = < - /* target-temp limit-freq */ - 75 1008000 - 85 1200000 - 95 1200000 - 100 1200000 - >; - virt-temp-limit-2-cpu-busy = < - /* target-temp limit-freq */ - 75 912000 - 85 1008000 - 95 1104000 - 100 1200000 - >; - virt-temp-limit-3-cpu-busy = < - /* target-temp limit-freq */ - 75 816000 - 85 912000 - 95 100800 - 100 110400 - >; - virt-temp-limit-4-cpu-busy = < - /* target-temp limit-freq */ - 75 816000 - 85 912000 - 95 100800 - 100 110400 - >; - temp-limit-enable = <1>; - target-temp = <85>; - status = "okay"; - }; - }; -}; - -&vd_logic { - regulator_name = "vdd_logic"; - status = "disabled"; - - }; - - - -&pwm_regulator1 { - status = "okay"; -}; - -&pwm1 { - status = "okay"; -}; - -&fb { - rockchip,disp-mode = ; - rockchip,uboot-logo-on = <1>; -}; - -&rk_screen { - display-timings = <&disp_timings>; -}; - -&lvds { - status = "okay"; - - pinctrl-names = "lcdc"; - pinctrl-0 = <&lcdc0_lcdc_d>; -}; - -&lcdc { - status = "okay"; - - backlight = <&backlight>; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&lcdc0_lcdc>; - pinctrl-1 = <&lcdc0_gpio>; - - rockchip,fb-win-map = ; - - power_ctr: power_ctr { - rockchip,debug = <0>; - lcd_en: lcd_en { - rockchip,power_type = ; - gpios = <&gpio3 GPIO_B3 GPIO_ACTIVE_HIGH>; - rockchip,delay = <10>; - }; - }; -}; - -&hdmi { - status = "disabled"; -}; - -&adc { - status = "okay"; - - key: key { - compatible = "rockchip,key"; - io-channels = <&adc 2>; - - vol-up-key { - linux,code = <115>; - label = "volume up"; - - rockchip,adc_value = <1>; - - }; - - vol-down-key { - linux,code = <114>; - label = "volume down"; - - rockchip,adc_value = <512>; - - }; - - power-key { - gpios = <&gpio1 GPIO_A4 GPIO_ACTIVE_LOW>; - linux,code = <116>; - label = "power"; - gpio-key,wakeup; - }; - - }; - - adc-battery { - status = "okay"; - compatible = "rk30-adc-battery"; - io-channels = <&adc 0>, <&adc 3>; - dc_det_gpio = <&gpio2 GPIO_B1 GPIO_ACTIVE_LOW>; - auto_calibration = <0>; - ref_voltage = <3300>; - //bat_low_gpio = <&gpio0 GPIO_A7 GPIO_ACTIVE_LOW>; - //chg_ok_gpio = <&gpio0 GPIO_B1 GPIO_ACTIVE_HIGH>; - bat_table = <0 0 0 0 100 100 - 3500 3619 3678 3734 3742 3783 3813 3884 3968 4110 4220 - 3750 3710 3770 3830 3850 3880 3910 3980 4060 4240 4300 - >; - is_dc_charge = <1>; - is_usb_charge = <0>; - - }; - -}; - -&i2c0 { - status = "disabled"; - rk818: rk818@1c { - reg = <0x1c>; - status = "disabled"; - }; -}; - - -&i2c1 { - status = "okay"; - - sensor@4c { - compatible = "gs_mc3230"; - reg = <0x4c>; - type = ; - //irq-gpio = <&gpio2 GPIO_B2 IRQ_TYPE_LEVEL_LOW>; - irq_enable = <0>; - poll_delay_ms = <30>; - layout = <1>; - }; - - rtc@51 { - compatible = "rtc,hym8563"; - reg = <0x51>; - irq_gpio = <&gpio1 GPIO_A5 IRQ_TYPE_EDGE_FALLING>; - }; -}; - -&i2c2 { - status = "okay"; - - ts@76 { - compatible = "zet6221-ts"; - reg = <0x76>; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&i2c0_sda &i2c0_scl>; - pinctrl-1 = <&i2c0_gpio>; - //gpios = <&gpio0 GPIO_A1 GPIO_ACTIVE_LOW>, <&gpio0 GPIO_A0 GPIO_ACTIVE_LOW>; - irq_gpio_number = <&gpio0 GPIO_A1 IRQ_TYPE_LEVEL_LOW>; - rst_gpio_number = <&gpio0 GPIO_A0 GPIO_ACTIVE_HIGH>; - }; - - ts@55 { - compatible = "goodix,gt8xx"; - reg = <0x55>; - touch-gpio = <&gpio1 GPIO_B0 IRQ_TYPE_LEVEL_LOW>; - reset-gpio = <&gpio2 GPIO_C1 GPIO_ACTIVE_LOW>; - //power-gpio = <&gpio0 GPIO_C5 GPIO_ACTIVE_LOW>; - max-x = <1280>; - max-y = <800>; - status = "disabled"; - }; - - -}; - - -&sdmmc { - cd-gpios = <&gpio2 GPIO_A7 GPIO_ACTIVE_HIGH>;/*CD GPIO*/ - status = "disabled"; -}; - -&sdio { - status = "disabled"; -}; - - -&codec { - spk_ctl_io = <&gpio1 GPIO_B0 GPIO_ACTIVE_HIGH>; - spk-mute-delay = <200>; - hp-mute-delay = <100>; - rk312x_for_mid = <1>; - is_rk3128 = <0>; - spk_volume = <25>; - hp_volume = <25>; - capture_volume = <26>; - gpio_debug = <0>; - codec_hp_det = <0>; -}; - - - -&dwc_control_usb { - usb_uart { - status = "disable"; - }; -}; - -&rk3126_cif_sensor{ - status = "okay"; -}; - -&gmac { - status = "disabled"; -}; diff --git a/arch/arm/boot/dts/rk3126-cif-sensor.dtsi b/arch/arm/boot/dts/rk3126-cif-sensor.dtsi deleted file mode 100644 index 28c1bec52cb3..000000000000 --- a/arch/arm/boot/dts/rk3126-cif-sensor.dtsi +++ /dev/null @@ -1,78 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -#include "../../mach-rockchip/rk_camera_sensor_info.h" -/{ - rk3126_cif_sensor: rk3126_cif_sensor{ - compatible = "rockchip,sensor"; - status = "disabled"; - CONFIG_SENSOR_POWER_IOCTL_USR = <1>; - CONFIG_SENSOR_RESET_IOCTL_USR = <0>; - CONFIG_SENSOR_POWERDOWN_IOCTL_USR = <0>; - CONFIG_SENSOR_FLASH_IOCTL_USR = <0>; - CONFIG_SENSOR_AF_IOCTL_USR = <0>; - - gc2035{ - is_front = <0>; - rockchip,power = <&gpio2 GPIO_B2 GPIO_ACTIVE_HIGH>; - rockchip,powerdown = <&gpio1 GPIO_B1 GPIO_ACTIVE_HIGH>; - pwdn_active = ; - pwr_active = ; - mir = <0>; - flash_attach = <0>; - resolution = ; - powerup_sequence = ; - orientation = <0>; - i2c_add = ; - i2c_rata = <100000>; - i2c_chl = <1>; - cif_chl = <0>; - mclk_rate = <24>; - }; - - gc0308{ - is_front = <1>; - rockchip,power = <&gpio2 GPIO_B2 GPIO_ACTIVE_HIGH>; - rockchip,powerdown = <&gpio1 GPIO_B2 GPIO_ACTIVE_HIGH>; - pwdn_active = ; - pwr_active = ; - mir = <0>; - flash_attach = <0>; - resolution = ; - powerup_sequence = ; - orientation = <0>; - i2c_add = ; - i2c_rata = <100000>; - i2c_chl = <1>; - cif_chl = <0>; - mclk_rate = <24>; - }; - - - gc0329{ - is_front = <0>; - //rockchip,power = <&gpio2 GPIO_B2 GPIO_ACTIVE_HIGH>; - //rockchip,power_pmu_name1 = "rk818_ldo4"; - //rockchip,power_pmu_voltage1 = <2800000>; - //rockchip,power_pmu_name2 = "rk818_ldo8"; - //rockchip,power_pmu_voltage2 = <1800000>; - rockchip,powerdown = <&gpio3 GPIO_B3 GPIO_ACTIVE_HIGH>; - //rockchip,powerdown_pmu = ""; - //rockchip,powerdown_pmu_voltage = <3000000>; - pwdn_active = ; - pwr_active = ; - mir = <0>; - flash_attach = <1>; - //rockchip,flash = <>; - flash_active = <1>; - resolution = ; - powerup_sequence = ; - orientation = <0>; - i2c_add = ; - i2c_rata = <100000>; - i2c_chl = <1>; - cif_chl = <0>; - mclk_rate = <24>; - }; - - }; -}; - diff --git a/arch/arm/boot/dts/rk3126-fpga.dts b/arch/arm/boot/dts/rk3126-fpga.dts deleted file mode 100644 index 55bf6e49f77b..000000000000 --- a/arch/arm/boot/dts/rk3126-fpga.dts +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/dts-v1/; -#include "rk312x.dtsi" -#include "rk312x-pinctrl.dtsi" -#include "lcd-td043mgeal.dtsi" - -/ { - compatible = "rockchip,rk3126"; - - memory { - device_type = "memory"; - reg = <0x60000000 0x10000000>; - }; - - chosen { - bootargs = "androidboot.console=ttyFIQ0 initrd=0x62000000,0x00800000"; - }; - - fiq-debugger { - status = "okay"; - }; - -}; - -&fb { - rockchip,disp-mode = ; -}; - -&rk_screen { - display-timings = <&disp_timings>; -}; - -&lvds { - status = "okay"; -}; - -&lcdc { - status = "okay"; -}; diff --git a/arch/arm/boot/dts/rk3126-sdk.dts b/arch/arm/boot/dts/rk3126-sdk.dts deleted file mode 100644 index 7769ba75b600..000000000000 --- a/arch/arm/boot/dts/rk3126-sdk.dts +++ /dev/null @@ -1,230 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/dts-v1/; - -#include "rk3126.dtsi" -#include "lcd-b101ew05.dtsi" -#include "rk3126-cif-sensor.dtsi" -#include "rk312x-sdk.dtsi" - -/ { - compatible = "rockchip,rk3126"; - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm0 0 25000>; - brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255>; - default-brightness-level = <128>; - enable-gpios = <&gpio3 GPIO_C1 GPIO_ACTIVE_HIGH>; - }; - - usb_control { - compatible = "rockchip,rk3126-usb-control"; - host_drv_gpio = <&gpio2 GPIO_B4 GPIO_ACTIVE_LOW>; - otg_drv_gpio = <&gpio2 GPIO_B6 GPIO_ACTIVE_LOW>; - - rockchip,remote_wakeup; - rockchip,usb_irq_wakeup; - }; - - wireless-wlan { - compatible = "wlan-platdata"; - wifi_chip_type = "esp8089"; - sdio_vref = <0>; //1800mv or 3300mv - - power_ctrl_by_pmu; - power_pmu_regulator = "rk818_ldo8"; - power_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - //vref_ctrl_enable; - //vref_pmu_regulator = "rk818_ldo8"; - //vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - satus = "okay"; - }; - - rockchip_suspend: rockchip_suspend { - rockchip,ctrbits = < - (0 - |RKPM_CTR_PWR_DMNS - |RKPM_CTR_GTCLKS - |RKPM_CTR_PLLS - |RKPM_CTR_ARMOFF_LPMD - |RKPM_CTR_DDR - |RKPM_CTR_IDLESRAM_MD - |RKPM_CTR_DDR - |RKPM_CTR_BUS_IDLE - //|RKPM_CTR_VOLTS - //|RKPM_CTR_VOL_PWM1 - //|RKPM_CTR_VOL_PWM2 - ) - >; - rockchip,pmic-suspend_gpios = < - GPIO1_A1 - >; - }; -}; - -&fb { - rockchip,disp-mode = ; - rockchip,uboot-logo-on = <1>; -}; - -&rk_screen { - display-timings = <&disp_timings>; -}; - -&lvds { - status = "okay"; - - pinctrl-names = "lcdc"; - pinctrl-0 = <&lcdc0_lcdc_d>; -}; - -&lcdc { - status = "okay"; - - backlight = <&backlight>; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&lcdc0_lcdc>; - pinctrl-1 = <&lcdc0_gpio>; - - rockchip,fb-win-map = ; - - power_ctr: power_ctr { - rockchip,debug = <0>; - lcd_en: lcd_en { - rockchip,power_type = ; - gpios = <&gpio1 GPIO_B3 GPIO_ACTIVE_HIGH>; - rockchip,delay = <10>; - }; - }; -}; - -&hdmi { - status = "disabled"; -}; - -&key { - io-channels = <&adc 2>; - power-key { - gpios = <&gpio1 GPIO_A4 GPIO_ACTIVE_LOW>; - linux,code = <116>; - label = "power"; - gpio-key,wakeup; - }; -}; -&sdmmc { - cd-gpios = <&gpio2 GPIO_A7 GPIO_ACTIVE_HIGH>;/*CD GPIO*/ -}; - -&codec { - spk_ctl_io = <&gpio1 GPIO_A0 GPIO_ACTIVE_HIGH>; - spk-mute-delay = <200>; - hp-mute-delay = <100>; - rk312x_for_mid = <1>; - is_rk3128 = <0>; - spk_volume = <25>; - hp_volume = <25>; - capture_volume = <26>; - gpio_debug = <1>; - codec_hp_det = <0>; - -}; - -&dwc_control_usb { - usb_uart { - status = "disabled"; - }; -}; - -&i2c1 { - status = "okay"; -}; - -&rk3126_cif_sensor{ - status = "okay"; -}; - -&clk_core_dvfs_table { - operating-points = < - /* KHz uV */ - 216000 950000 - 408000 950000 - 600000 1050000 - 696000 1050000 - 816000 1125000 - 1008000 1275000 - 1200000 1400000 - >; - virt-temp-limit-1-cpu-busy = < - /* target-temp limit-freq */ - 75 1008000 - 85 1200000 - 95 1200000 - 100 1200000 - >; - virt-temp-limit-2-cpu-busy = < - /* target-temp limit-freq */ - 75 912000 - 85 1008000 - 95 1104000 - 100 1200000 - >; - virt-temp-limit-3-cpu-busy = < - /* target-temp limit-freq */ - 75 816000 - 85 912000 - 95 100800 - 100 110400 - >; - virt-temp-limit-4-cpu-busy = < - /* target-temp limit-freq */ - 75 816000 - 85 912000 - 95 100800 - 100 110400 - >; - temp-limit-enable = <1>; - target-temp = <85>; - status="okay"; -}; - -&clk_gpu_dvfs_table { - operating-points = < - /* KHz uV */ - 200000 950000 - 300000 950000 - 400000 1075000 - //480000 1175000 - >; - status="okay"; -}; - -&clk_ddr_dvfs_table { - operating-points = < - /* KHz uV */ - 200000 950000 - 300000 950000 - 400000 1025000 - 533000 1225000 - >; - - freq-table = < - /*status freq(KHz)*/ - SYS_STATUS_NORMAL 400000 - SYS_STATUS_SUSPEND 200000 - SYS_STATUS_VIDEO_1080P 240000 - SYS_STATUS_VIDEO_4K 400000 - SYS_STATUS_PERFORMANCE 528000 - SYS_STATUS_DUALVIEW 400000 - SYS_STATUS_BOOST 324000 - SYS_STATUS_ISP 533000 - >; - auto-freq-table = < - 240000 - 324000 - 396000 - 528000 - >; - auto-freq=<0>; - status="okay"; -}; diff --git a/arch/arm/boot/dts/rk3128-86v.dts b/arch/arm/boot/dts/rk3128-86v.dts deleted file mode 100644 index 46b39971afe3..000000000000 --- a/arch/arm/boot/dts/rk3128-86v.dts +++ /dev/null @@ -1,297 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/dts-v1/; - -#include "rk3128.dtsi" -#include "rk3128-cif-sensor.dtsi" -#include "rk312x-sdk.dtsi" -#include "lcd-rk3128-86v-LVDS1024x600.dtsi" - -/ { - compatible = "rockchip,rk3128"; - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm0 0 25000>; - brightness-levels = <18 18 18 18 19 19 19 19 20 20 20 20 20 20 21 21 21 21 21 21 22 22 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255>; - default-brightness-level = <128>; - enable-gpios = <&gpio0 GPIO_D0 GPIO_ACTIVE_HIGH>; - }; - - usb_control { - compatible = "rockchip,rk3126-usb-control"; - - //host_drv_gpio = <&gpio3 GPIO_C4 GPIO_ACTIVE_LOW>; - //otg_drv_gpio = <&gpio3 GPIO_C1 GPIO_ACTIVE_LOW>; - - rockchip,remote_wakeup; - rockchip,usb_irq_wakeup; - }; - - - wireless-wlan { - compatible = "wlan-platdata"; - - /* wifi_chip_type - wifi chip define - * ap6210, ap6330, ap6335 - * rtl8188eu, rtl8723bs, rtl8723bu - * esp8089 - */ - wifi_chip_type = "rtl8188eu"; - sdio_vref = <1800>; //1800mv or 3300mv - - // power_ctrl_by_pmu; - // pmu_regulator = "act_ldo3"; - // pmu_enable_level = <1>; //1->HIGH, 0->LOW - /* WIFI_HOST_WAKE = GPIO3_C7 */ - WIFI,host_wake_irq = <&gpio3 GPIO_C7 GPIO_ACTIVE_HIGH>; - /* WIFI_REG_ON = GPIO3_D3 */ - WIFI,poweren_gpio = <&gpio3 GPIO_D3 GPIO_ACTIVE_HIGH>; - - status = "okay"; - }; - wireless-bluetooth { - compatible = "bluetooth-platdata"; - - //wifi-bt-power-toggle; - - uart_rts_gpios = <&gpio0 GPIO_C1 GPIO_ACTIVE_LOW>; - pinctrl-names = "default","rts_gpio"; - pinctrl-0 = <&uart0_rts>; - pinctrl-1 = <&uart0_rts_gpio>; - - - /* BT_HOST_WAKE = GPIO3_C6 */ - /* BT_RST = GPIO3_C5 */ - /* BT_WAKE = GPIO3_D2 */ - //BT,power_gpio = <&gpio4 GPIO_D3 GPIO_ACTIVE_HIGH>; - BT,reset_gpio = <&gpio3 GPIO_C5 GPIO_ACTIVE_HIGH>; - BT,wake_gpio = <&gpio3 GPIO_D2 GPIO_ACTIVE_HIGH>; - BT,wake_host_irq = <&gpio3 GPIO_C6 GPIO_ACTIVE_LOW>; - - status = "okay"; - }; - - rockchip_suspend: rockchip_suspend { - rockchip,ctrbits = < - (0 - |RKPM_CTR_PWR_DMNS - |RKPM_CTR_GTCLKS - |RKPM_CTR_PLLS - |RKPM_CTR_ARMOFF_LPMD - |RKPM_CTR_IDLESRAM_MD - |RKPM_CTR_DDR - // |RKPM_CTR_VOLTS - |RKPM_CTR_BUS_IDLE - // |RKPM_CTR_VOL_PWM1 - ) - >; - rockchip,pmic-suspend_gpios = ; - }; - -}; - -&gmac{ - status = "disabled"; -}; - -&uart0 { - status = "okay"; - dma-names = "!tx", "!rx"; - pinctrl-0 = <&uart0_xfer &uart0_cts>; -}; - -&rk818 { /* PMIC_INT == GPIO1_B1 PMIC_SLEEP == GPIO3_C1*/ - gpios =<&gpio1 GPIO_B1 GPIO_ACTIVE_HIGH>,<&gpio3 GPIO_C1 GPIO_ACTIVE_LOW>; -}; -/* -&rk818_dcdc3_reg{ - regulator-name= "vcc_ddr"; -}; - -&rk818_ldo1_reg{ - regulator-name= "vcc_tp"; -}; -*/ - - -&i2c2 { - status = "okay"; - ts@40 { - compatible = "gslX680"; - reg = <0x40>; - touch-gpio = <&gpio1 GPIO_B0 IRQ_TYPE_LEVEL_LOW>; /* TP_INT == GPIO1_B0 */ - reset-gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>; /* TP_RST == GPIO0_D1 */ - //power-gpio = <&gpio0 GPIO_C5 GPIO_ACTIVE_LOW>; - max-x = <1280>; - max-y = <600>; - status = "okay"; - }; - - sensor@4c { - compatible = "gs_mma7660"; - reg = <0x4c>; - type = ; - irq-gpio = <&gpio1 GPIO_B2 IRQ_TYPE_LEVEL_LOW>; /* GSENSOR_INT = GPIO1_B2 */ - irq_enable = <0>; - poll_delay_ms = <30>; - layout = <1>; - }; -}; - -&adc{ - status = "okay"; - key: key { - compatible = "rockchip,key"; - io-channels = <&adc 1>; - - vol-up-key { - linux,code = <115>; - label = "volume up"; - - rockchip,adc_value = <1>; - - }; - - vol-down-key { - linux,code = <114>; - label = "volume down"; - - rockchip,adc_value = <512>; - - }; - /* PWR_KEY == GPIO0_A2 */ - power-key { - gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>; - linux,code = <116>; - label = "power"; - gpio-key,wakeup; - }; - - }; -}; - -&fb { - rockchip,disp-mode = ; - rockchip,uboot-logo-on = <1>; -}; - -&rk_screen { - display-timings = <&disp_timings>; -}; - -&lvds { - status = "okay"; - - pinctrl-names = "lcdc"; - pinctrl-0 = <&lcdc0_lcdc_d>; -}; - -&lcdc { - status = "okay"; - - //backlight = <&backlight>; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&lcdc0_lcdc>; - pinctrl-1 = <&lcdc0_gpio>; - - rockchip,fb-win-map = ; - power_ctr: power_ctr { - rockchip,debug = <0>; - /* - lcd_en: lcd_en { - rockchip,power_type = ; - gpios = <&gpio3 GPIO_C4 GPIO_ACTIVE_HIGH>; - rockchip,delay = <10>; - }; - */ - }; -}; - -&hdmi { - status = "okay"; //"disabled"; -}; - -&sdmmc {/* SDMMC_DET = GPIO1_C1 */ - cd-gpios = <&gpio1 GPIO_C1 GPIO_ACTIVE_HIGH>;/*CD GPIO*/ - status = "disabled"; -}; - -&dwc_control_usb { - usb_uart { - status = "ok"; - }; -}; - -&codec { - spk_ctl_io = <&gpio0 GPIO_D6 GPIO_ACTIVE_HIGH>;/* SPK_CTL == GPIO0_D6 */ - spk-mute-delay = <200>; - hp-mute-delay = <100>; - rk312x_for_mid = <1>; - is_rk3128 = <0>;/* is_rk3128 = <0> */ - spk_volume = <25>; - hp_volume = <25>; - capture_volume = <26>; - gpio_debug = <1>; - codec_hp_det = <0>; -}; - -&rk3128_cif_sensor{ - status = "okay"; -}; - - -&clk_core_dvfs_table { - operating-points = < - /* KHz uV */ - 216000 925000 - 408000 925000 - 600000 950000 - 696000 975000 - 816000 1050000 - 1008000 1175000 - 1200000 1300000 - // 1296000 1350000 - // 1320000 1375000 - >; - status="okay"; -}; - -&clk_gpu_dvfs_table { - operating-points = < - /* KHz uV */ - 200000 1000000 - 300000 1025000 - 400000 1125000 - //480000 1175000 - >; - status="okay"; -}; - -&clk_ddr_dvfs_table { - operating-points = < - /* KHz uV */ - 200000 1000000 - 300000 1000000 - 400000 1075000 - 533000 1250000 - >; - - freq-table = < - /*status freq(KHz)*/ - SYS_STATUS_NORMAL 400000 - SYS_STATUS_SUSPEND 200000 - SYS_STATUS_VIDEO_1080P 240000 - SYS_STATUS_VIDEO_4K 400000 - SYS_STATUS_PERFORMANCE 528000 - SYS_STATUS_DUALVIEW 400000 - SYS_STATUS_BOOST 324000 - SYS_STATUS_ISP 533000 - >; - auto-freq-table = < - 240000 - 324000 - 396000 - 528000 - >; - auto-freq=<0>; - status="okay"; -}; diff --git a/arch/arm/boot/dts/rk3128-box-ns.dts b/arch/arm/boot/dts/rk3128-box-ns.dts deleted file mode 100644 index 5ff15e7949ff..000000000000 --- a/arch/arm/boot/dts/rk3128-box-ns.dts +++ /dev/null @@ -1,18 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -#include "rk3128-box.dts" - -/ { - chosen { - bootargs = "vmalloc=496M rockchip_jtag psci=enable"; - }; - - fiq-debugger { - rockchip,irq-mode-enable = <1>; - status = "okay"; - }; -}; - -&clk_ddr_dvfs_table { - status = "disabled"; -}; - diff --git a/arch/arm/boot/dts/rk3128-box-rk88.dts b/arch/arm/boot/dts/rk3128-box-rk88.dts deleted file mode 100644 index 862275417b88..000000000000 --- a/arch/arm/boot/dts/rk3128-box-rk88.dts +++ /dev/null @@ -1,421 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/dts-v1/; - -#include "rk3128.dtsi" -#include "rk312x-sdk.dtsi" -#include "lcd-box.dtsi" -#include - -/ { - compatible = "rockchip,rk3128"; - - gpio_poweroff { - compatible = "gpio-poweroff"; - gpios = <&gpio1 GPIO_A2 GPIO_ACTIVE_LOW>; - }; - wireless-wlan { - compatible = "wlan-platdata"; - - /* wifi_chip_type - wifi chip define - * bcmwifi ==> like ap6xxx, rk90x, ...; - * rtkwifi ==> like rtl8188xx, rtl8723xx, ...; - * esp8089 ==> esp8089; - * other ==> for other wifi; - */ - wifi_chip_type = "esp8089"; - sdio_vref = <0>; //1800mv or 3300mv - - //keep_wifi_power_on; - //power_ctrl_by_pmu; - //power_pmu_regulator = "act_ldo3"; - //power_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - //vref_ctrl_enable; - //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>; - //vref_pmu_regulator = "act_ldo3"; - //vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - WIFI,poweren_gpio = <&gpio0 GPIO_D6 GPIO_ACTIVE_HIGH>; - WIFI,host_wake_irq = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>; - //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>; - - status = "okay"; - }; - - wireless-bluetooth { - compatible = "bluetooth-platdata"; - - //wifi-bt-power-toggle; - - uart_rts_gpios = <&gpio1 GPIO_B3 GPIO_ACTIVE_LOW>; - pinctrl-names = "default","rts_gpio"; - pinctrl-0 = <&uart1_rts>; - pinctrl-1 = <&uart1_rts_gpio>; - - //BT,power_gpio = <&gpio4 GPIO_D3 GPIO_ACTIVE_HIGH>; - BT,reset_gpio = <&gpio3 GPIO_C5 GPIO_ACTIVE_HIGH>; - BT,wake_gpio = <&gpio1 GPIO_B4 GPIO_ACTIVE_HIGH>; - BT,wake_host_irq = <&gpio0 GPIO_C6 GPIO_ACTIVE_LOW>; - - status = "disabled"; - }; - - power-led { - compatible = "gpio-leds"; - power { - gpios = <&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>; - default-state = "on"; - }; - work { - gpios = <&gpio0 GPIO_D2 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; - }; - - rockchip-spdif-card { - compatible = "rockchip-spdif-card"; - dais { - dai0 { - audio-codec = <&codec_hdmi_spdif>; - audio-controller = <&spdif>; - }; - }; - }; - - usb_control { - compatible = "rockchip,rk3126-usb-control"; - host_drv_gpio = <&gpio3 GPIO_C4 GPIO_ACTIVE_LOW>; - otg_drv_gpio = <&gpio3 GPIO_C1 GPIO_ACTIVE_LOW>; - - rockchip,remote_wakeup; - rockchip,usb_irq_wakeup; - }; - usb0: usb@10180000 { - /*0 - Normal, 1 - Force Host, 2 - Force Device*/ - rockchip,usb-mode = <1>; - }; - - rockchip_suspend: rockchip_suspend { - rockchip,ctrbits = < - (0 - |RKPM_CTR_PWR_DMNS - |RKPM_CTR_GTCLKS - |RKPM_CTR_PLLS - //|RKPM_CTR_ARMOFF_LPMD - |RKPM_CTR_DDR - |RKPM_CTR_IDLESRAM_MD - |RKPM_CTR_DDR - //|RKPM_CTR_BUS_IDLE - //|RKPM_CTR_VOLTS - //|RKPM_CTR_VOL_PWM1 - //|RKPM_CTR_VOL_PWM2 - ) - >; - rockchip,pmic-suspend_gpios = < - 0 - >; - }; - -}; - - - &clk_core_dvfs_table { - operating-points = < - /* KHz uV */ - /*408000 1250000 - 600000 1250000 - 696000 1250000 - */ - 816000 1100000 - 1008000 1200000 - 1200000 1325000 - >; - virt-temp-limit-1-cpu-busy = < - /* target-temp limit-freq */ - 75 1008000 - 85 1200000 - 95 1200000 - 100 1200000 - >; - virt-temp-limit-2-cpu-busy = < - /* target-temp limit-freq */ - 75 912000 - 85 1008000 - 95 1104000 - 100 1200000 - >; - virt-temp-limit-3-cpu-busy = < - /* target-temp limit-freq */ - 75 816000 - 85 912000 - 95 100800 - 100 110400 - >; - virt-temp-limit-4-cpu-busy = < - /* target-temp limit-freq */ - 75 696000 - 85 816000 - 95 912000 - 100 100800 - >; - temp-limit-enable = <1>; - target-temp = <85>; - status="okay"; - }; - - &clk_gpu_dvfs_table { - operating-points = < - /* KHz uV */ - 200000 950000 - 300000 975000 - 400000 1075000 - >; - status="okay"; - }; - - &clk_ddr_dvfs_table { - operating-points = < - /* KHz uV */ - 200000 950000 - 300000 950000 - 400000 1000000 - 533000 1200000 - >; - - freq-table = < - /*status freq(KHz)*/ - SYS_STATUS_NORMAL 533000 - SYS_STATUS_SUSPEND 200000 - /* - SYS_STATUS_VIDEO_1080P 240000 - SYS_STATUS_VIDEO_4K 400000 - SYS_STATUS_PERFORMANCE 528000 - SYS_STATUS_DUALVIEW 400000 - SYS_STATUS_BOOST 324000 - SYS_STATUS_ISP 533000 - */ - >; - auto-freq-table = < - 240000 - 324000 - 396000 - 528000 - >; - auto-freq=<0>; - status="okay"; - }; - - &pwm_regulator1 { - status = "okay"; - }; - - &pwm_regulator2 { - status = "okay"; - }; - - &pwm1 { - status = "okay"; - }; - - &uart1{ - status = "okay"; - dma-names = "!tx", "!rx"; - pinctrl-0 = <&uart1_xfer &uart1_cts>; -}; - -&pwm2 { - status = "okay"; -}; - -&disp_timings { - native-mode = <&timing1>; -}; - -&rk_screen { - display-timings = <&disp_timings>; -}; - -&fb { - rockchip,disp-mode = ; - rockchip,disp-policy = ; - rockchip,uboot-logo-on = <1>; -}; - -&lcdc { - status = "okay"; - rockchip,fb-win-map = ; -}; - -&hdmi { - status = "okay"; -}; - -&tve { - status = "okay"; - test_mode = <0>; -}; - -&i2c2 { - status = "disabled"; -}; - -&spi0 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@00 { - compatible = "rockchip,spi_test_bus0_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - - }; - - spi_test@01 { - compatible = "rockchip,spi_test_bus0_cs1"; - reg = <1>; - spi-max-frequency = <24000000>; - spi-cpha; - spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - */ -}; - -&gmac_clkin { - clock-frequency = <50000000>; -}; -&gmac { - //pmu_regulator = "act_ldo5"; - //pmu_enable_level = <1>; //1->HIGH, 0->LOW - //power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>; - reset-gpio = <&gpio2 GPIO_D0 GPIO_ACTIVE_LOW>; - phy-mode = "rmii"; - clock_in_out = "output"; - tx_delay = <0x30>; - rx_delay = <0x10>; -}; - -&codec { - spk_ctl_io = <&gpio1 GPIO_A3 GPIO_ACTIVE_HIGH>; - spk-mute-delay = <200>; - hp-mute-delay = <100>; - rk312x_for_mid = <0>; - is_rk3128 = <0>; - spk_volume = <25>; - hp_volume = <25>; - capture_volume = <26>; - gpio_debug = <1>; - codec_hp_det = <0>; -}; - -&dwc_control_usb { - usb_uart { - status = "disabled"; - }; -}; - -&sdmmc { - status = "okay"; - cd-gpios = <&gpio1 GPIO_C1 GPIO_ACTIVE_HIGH>;/*CD GPIO*/ -}; - -&remotectl { - handle_cpu_id = <1>; - ir_key1{ - rockchip,usercode = <0x4040>; - rockchip,key_table = - <0xf2 KEY_REPLY>, - <0xba KEY_BACK>, - <0xf4 KEY_UP>, - <0xf1 KEY_DOWN>, - <0xef KEY_LEFT>, - <0xee KEY_RIGHT>, - <0xbd KEY_HOME>, - <0xea KEY_VOLUMEUP>, - <0xe3 KEY_VOLUMEDOWN>, - <0xe2 KEY_SEARCH>, - <0xb2 KEY_POWER>, - <0xbc KEY_MUTE>, - <0xec KEY_MENU>, - <0xbf 0x190>, - <0xe0 0x191>, - <0xe1 0x192>, - <0xe9 183>, - <0xe6 248>, - <0xe8 185>, - <0xe7 186>, - <0xf0 388>, - <0xbe 0x175>; - }; - ir_key2{ - rockchip,usercode = <0xff00>; - rockchip,key_table = - <0xf9 KEY_HOME>, - <0xbf KEY_BACK>, - <0xfb KEY_MENU>, - <0xaa KEY_REPLY>, - <0xb9 KEY_UP>, - <0xe9 KEY_DOWN>, - <0xb8 KEY_LEFT>, - <0xea KEY_RIGHT>, - <0xeb KEY_VOLUMEDOWN>, - <0xef KEY_VOLUMEUP>, - <0xf7 KEY_MUTE>, - <0xe7 KEY_POWER>, - <0xfc KEY_POWER>, - <0xa9 KEY_VOLUMEDOWN>, - <0xa8 KEY_VOLUMEDOWN>, - <0xe0 KEY_VOLUMEDOWN>, - <0xa5 KEY_VOLUMEDOWN>, - <0xab 183>, - <0xb7 388>, - <0xf8 184>, - <0xaf 185>, - <0xed KEY_VOLUMEDOWN>, - <0xee 186>, - <0xb3 KEY_VOLUMEDOWN>, - <0xf1 KEY_VOLUMEDOWN>, - <0xf2 KEY_VOLUMEDOWN>, - <0xf3 KEY_SEARCH>, - <0xb4 KEY_VOLUMEDOWN>, - <0xbe KEY_SEARCH>; - }; - ir_key3{ - rockchip,usercode = <0x1dcc>; - rockchip,key_table = - <0xee KEY_REPLY>, - <0xf0 KEY_BACK>, - <0xf8 KEY_UP>, - <0xbb KEY_DOWN>, - <0xef KEY_LEFT>, - <0xed KEY_RIGHT>, - <0xfc KEY_HOME>, - <0xf1 KEY_VOLUMEUP>, - <0xfd KEY_VOLUMEDOWN>, - <0xb7 KEY_SEARCH>, - <0xff KEY_POWER>, - <0xf3 KEY_MUTE>, - <0xbf KEY_MENU>, - <0xf9 0x191>, - <0xf5 0x192>, - <0xb3 388>, - <0xbe KEY_1>, - <0xba KEY_2>, - <0xb2 KEY_3>, - <0xbd KEY_4>, - <0xf9 KEY_5>, - <0xb1 KEY_6>, - <0xfc KEY_7>, - <0xf8 KEY_8>, - <0xb0 KEY_9>, - <0xb6 KEY_0>, - <0xb5 KEY_BACKSPACE>; - }; -}; diff --git a/arch/arm/boot/dts/rk3128-box.dts b/arch/arm/boot/dts/rk3128-box.dts deleted file mode 100644 index c25628f943d4..000000000000 --- a/arch/arm/boot/dts/rk3128-box.dts +++ /dev/null @@ -1,420 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/dts-v1/; - -#include "rk3128.dtsi" -#include "rk312x-sdk.dtsi" -#include "lcd-box.dtsi" -#include - -/ { - compatible = "rockchip,rk3128"; - gpio_poweroff { - compatible = "gpio-poweroff"; - gpios = <&gpio1 GPIO_A2 GPIO_ACTIVE_LOW>; - }; - wireless-wlan { - compatible = "wlan-platdata"; - - /* wifi_chip_type - wifi chip define - * bcmwifi ==> like ap6xxx, rk90, ...x; - * rtkwifi ==> like rtl8188xx, rtl8723xx, ...; - * esp8089 ==> esp8089; - * other ==> for other wifi; - */ - wifi_chip_type = "esp8089"; - sdio_vref = <0>; //1800mv or 3300mv - - //keep_wifi_power_on; - //power_ctrl_by_pmu; - //power_pmu_regulator = "act_ldo3"; - //power_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - //vref_ctrl_enable; - //vref_ctrl_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>; - //vref_pmu_regulator = "act_ldo3"; - //vref_pmu_enable_level = <1>; //1->HIGH, 0->LOW - - WIFI,poweren_gpio = <&gpio0 GPIO_D6 GPIO_ACTIVE_HIGH>; - WIFI,host_wake_irq = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>; - //WIFI,reset_gpio = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>; - - status = "okay"; - }; - - wireless-bluetooth { - compatible = "bluetooth-platdata"; - - //wifi-bt-power-toggle; - - uart_rts_gpios = <&gpio1 GPIO_B3 GPIO_ACTIVE_LOW>; - pinctrl-names = "default","rts_gpio"; - pinctrl-0 = <&uart1_rts>; - pinctrl-1 = <&uart1_rts_gpio>; - - //BT,power_gpio = <&gpio4 GPIO_D3 GPIO_ACTIVE_HIGH>; - BT,reset_gpio = <&gpio3 GPIO_C5 GPIO_ACTIVE_HIGH>; - BT,wake_gpio = <&gpio1 GPIO_B4 GPIO_ACTIVE_HIGH>; - BT,wake_host_irq = <&gpio0 GPIO_C6 GPIO_ACTIVE_LOW>; - - status = "okay"; - }; - - rockchip-spdif-card { - compatible = "rockchip-spdif-card"; - dais { - dai0 { - audio-codec = <&codec_hdmi_spdif>; - audio-controller = <&spdif>; - }; - }; - }; - power-led { - compatible = "gpio-leds"; - power { - gpios = <&gpio0 GPIO_B0 GPIO_ACTIVE_LOW>; - default-state = "on"; - }; - work { - gpios = <&gpio0 GPIO_D2 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; - }; - usb_control { - compatible = "rockchip,rk3126-usb-control"; - host_drv_gpio = <&gpio3 GPIO_C4 GPIO_ACTIVE_LOW>; - otg_drv_gpio = <&gpio3 GPIO_C1 GPIO_ACTIVE_LOW>; - - rockchip,remote_wakeup; - rockchip,usb_irq_wakeup; - }; - usb0: usb@10180000 { - /*0 - Normal, 1 - Force Host, 2 - Force Device*/ -// rockchip,usb-mode = <1>; - }; - - rockchip_suspend: rockchip_suspend { - rockchip,ctrbits = < - (0 - |RKPM_CTR_PWR_DMNS - |RKPM_CTR_GTCLKS - |RKPM_CTR_PLLS - //|RKPM_CTR_ARMOFF_LPMD - |RKPM_CTR_DDR - |RKPM_CTR_IDLESRAM_MD - |RKPM_CTR_DDR - //|RKPM_CTR_BUS_IDLE - //|RKPM_CTR_VOLTS - //|RKPM_CTR_VOL_PWM1 - //|RKPM_CTR_VOL_PWM2 - ) - >; - rockchip,pmic-suspend_gpios = < - 0 - >; - }; -}; - - - &clk_core_dvfs_table { - operating-points = < - /* KHz uV */ - /*408000 1250000 - 600000 1250000 - 696000 1250000 - */ - 816000 1100000 - 1008000 1200000 - 1200000 1325000 - >; - - virt-temp-limit-1-cpu-busy = < - /* target-temp limit-freq */ - 75 1008000 - 85 1200000 - 95 1200000 - 100 1200000 - >; - virt-temp-limit-2-cpu-busy = < - /* target-temp limit-freq */ - 75 912000 - 85 1008000 - 95 1104000 - 100 1200000 - >; - virt-temp-limit-3-cpu-busy = < - /* target-temp limit-freq */ - 75 816000 - 85 912000 - 95 100800 - 100 110400 - >; - virt-temp-limit-4-cpu-busy = < - /* target-temp limit-freq */ - 75 696000 - 85 816000 - 95 912000 - 100 100800 - >; - temp-limit-enable = <1>; - target-temp = <85>; - status="okay"; - }; - - &clk_gpu_dvfs_table { - operating-points = < - /* KHz uV */ - 200000 950000 - 300000 975000 - 400000 1075000 - >; - status="okay"; - }; - - &clk_ddr_dvfs_table { - operating-points = < - /* KHz uV */ - 200000 950000 - 300000 950000 - 400000 1000000 - 533000 1200000 - >; - - freq-table = < - /*status freq(KHz)*/ - SYS_STATUS_NORMAL 533000 - SYS_STATUS_SUSPEND 200000 - /* - SYS_STATUS_VIDEO_1080P 240000 - SYS_STATUS_VIDEO_4K 400000 - SYS_STATUS_PERFORMANCE 528000 - SYS_STATUS_DUALVIEW 400000 - SYS_STATUS_BOOST 324000 - SYS_STATUS_ISP 533000 - */ - >; - auto-freq-table = < - 240000 - 324000 - 396000 - 528000 - >; - auto-freq=<0>; - status="okay"; - }; - - &pwm_regulator1 { - status = "okay"; - }; - - &pwm_regulator2 { - status = "okay"; - }; - - &pwm1 { - status = "okay"; - }; - - &uart1{ - status = "okay"; - dma-names = "!tx", "!rx"; - pinctrl-0 = <&uart1_xfer &uart1_cts>; -}; - -&pwm2 { - status = "okay"; -}; - -&disp_timings { - native-mode = <&timing1>; -}; - -&rk_screen { - display-timings = <&disp_timings>; -}; - -&fb { - rockchip,disp-mode = ; - rockchip,disp-policy = ; - rockchip,uboot-logo-on = <1>; -}; - -&lcdc { - status = "okay"; - rockchip,fb-win-map = ; -}; - -&hdmi { - status = "okay"; -}; - -&tve { - status = "okay"; - test_mode = <0>; -}; - -&i2c2 { - status = "disabled"; -}; - -&spi0 { - status = "disabled"; - max-freq = <48000000>; - /* - spi_test@00 { - compatible = "rockchip,spi_test_bus0_cs0"; - reg = <0>; - spi-max-frequency = <24000000>; - //spi-cpha; - //spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - - }; - - spi_test@01 { - compatible = "rockchip,spi_test_bus0_cs1"; - reg = <1>; - spi-max-frequency = <24000000>; - spi-cpha; - spi-cpol; - poll_mode = <0>; - type = <0>; - enable_dma = <0>; - }; - */ -}; - -&gmac_clkin { - clock-frequency = <125000000>; -}; - -&gmac { - //pmu_regulator = "act_ldo5"; - //pmu_enable_level = <1>; //1->HIGH, 0->LOW - //power-gpio = <&gpio0 GPIO_A6 GPIO_ACTIVE_HIGH>; - reset-gpio = <&gpio2 GPIO_D0 GPIO_ACTIVE_LOW>; - phyirq-gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>; - phy-mode = "rgmii"; - clock_in_out = "input"; - tx_delay = <0x30>; - rx_delay = <0x10>; -}; - -&codec { - spk_ctl_io = <&gpio1 GPIO_A3 GPIO_ACTIVE_HIGH>; - spk-mute-delay = <200>; - hp-mute-delay = <100>; - rk312x_for_mid = <0>; - is_rk3128 = <0>; - spk_volume = <25>; - hp_volume = <25>; - capture_volume = <26>; - gpio_debug = <1>; - codec_hp_det = <0>; -}; - -&dwc_control_usb { - usb_uart { - status = "disabled"; - }; -}; - -&sdmmc { - status = "okay"; - cd-gpios = <&gpio1 GPIO_C1 GPIO_ACTIVE_HIGH>;/*CD GPIO*/ -}; - -&remotectl { - handle_cpu_id = <1>; - ir_key1{ - rockchip,usercode = <0x4040>; - rockchip,key_table = - <0xf2 KEY_REPLY>, - <0xba KEY_BACK>, - <0xf4 KEY_UP>, - <0xf1 KEY_DOWN>, - <0xef KEY_LEFT>, - <0xee KEY_RIGHT>, - <0xbd KEY_HOME>, - <0xea KEY_VOLUMEUP>, - <0xe3 KEY_VOLUMEDOWN>, - <0xe2 KEY_SEARCH>, - <0xb2 KEY_POWER>, - <0xbc KEY_MUTE>, - <0xec KEY_MENU>, - <0xbf 0x190>, - <0xe0 0x191>, - <0xe1 0x192>, - <0xe9 183>, - <0xe6 248>, - <0xe8 185>, - <0xe7 186>, - <0xf0 388>, - <0xbe 0x175>; - }; - ir_key2{ - rockchip,usercode = <0xff00>; - rockchip,key_table = - <0xf9 KEY_HOME>, - <0xbf KEY_BACK>, - <0xfb KEY_MENU>, - <0xaa KEY_REPLY>, - <0xb9 KEY_UP>, - <0xe9 KEY_DOWN>, - <0xb8 KEY_LEFT>, - <0xea KEY_RIGHT>, - <0xeb KEY_VOLUMEDOWN>, - <0xef KEY_VOLUMEUP>, - <0xf7 KEY_MUTE>, - <0xe7 KEY_POWER>, - <0xfc KEY_POWER>, - <0xa9 KEY_VOLUMEDOWN>, - <0xa8 KEY_VOLUMEDOWN>, - <0xe0 KEY_VOLUMEDOWN>, - <0xa5 KEY_VOLUMEDOWN>, - <0xab 183>, - <0xb7 388>, - <0xf8 184>, - <0xaf 185>, - <0xed KEY_VOLUMEDOWN>, - <0xee 186>, - <0xb3 KEY_VOLUMEDOWN>, - <0xf1 KEY_VOLUMEDOWN>, - <0xf2 KEY_VOLUMEDOWN>, - <0xf3 KEY_SEARCH>, - <0xb4 KEY_VOLUMEDOWN>, - <0xbe KEY_SEARCH>; - }; - ir_key3{ - rockchip,usercode = <0x1dcc>; - rockchip,key_table = - <0xee KEY_REPLY>, - <0xf0 KEY_BACK>, - <0xf8 KEY_UP>, - <0xbb KEY_DOWN>, - <0xef KEY_LEFT>, - <0xed KEY_RIGHT>, - <0xfc KEY_HOME>, - <0xf1 KEY_VOLUMEUP>, - <0xfd KEY_VOLUMEDOWN>, - <0xb7 KEY_SEARCH>, - <0xff KEY_POWER>, - <0xf3 KEY_MUTE>, - <0xbf KEY_MENU>, - <0xf9 0x191>, - <0xf5 0x192>, - <0xb3 388>, - <0xbe KEY_1>, - <0xba KEY_2>, - <0xb2 KEY_3>, - <0xbd KEY_4>, - <0xf9 KEY_5>, - <0xb1 KEY_6>, - <0xfc KEY_7>, - <0xf8 KEY_8>, - <0xb0 KEY_9>, - <0xb6 KEY_0>, - <0xb5 KEY_BACKSPACE>; - }; -}; diff --git a/arch/arm/boot/dts/rk3128-cif-sensor.dtsi b/arch/arm/boot/dts/rk3128-cif-sensor.dtsi deleted file mode 100644 index 7f6b5cbecd95..000000000000 --- a/arch/arm/boot/dts/rk3128-cif-sensor.dtsi +++ /dev/null @@ -1,93 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -#include "../../mach-rockchip/rk_camera_sensor_info.h" -/{ - rk3128_cif_sensor: rk3128_cif_sensor{ - compatible = "rockchip,sensor"; - status = "disabled"; - CONFIG_SENSOR_POWER_IOCTL_USR = <1>; - CONFIG_SENSOR_RESET_IOCTL_USR = <0>; - CONFIG_SENSOR_POWERDOWN_IOCTL_USR = <0>; - CONFIG_SENSOR_FLASH_IOCTL_USR = <0>; - CONFIG_SENSOR_AF_IOCTL_USR = <0>; - - ov2659{ - is_front = <1>; - rockchip,powerdown = <&gpio3 GPIO_D7 GPIO_ACTIVE_HIGH>; - pwdn_active = ; - #rockchip,power = <>; - pwr_active = ; - #rockchip,reset = <>; - #rst_active = <>; - #rockchip,flash = <>; - #rockchip,af = <>; - mir = <0>; - flash_attach = <0>; - resolution = ; - powerup_sequence = ; - orientation = <0>; - i2c_add = ; - i2c_rata = <100000>; - i2c_chl = <0>; - cif_chl = <0>; - mclk_rate = <24>; - }; - gc0329{ - is_front = <1>; - rockchip,powerdown = <&gpio3 GPIO_D7 GPIO_ACTIVE_HIGH>; - pwdn_active = ; - #rockchip,power = <>; - pwr_active = ; - #rockchip,reset = <>; - #rst_active = <>; - #rockchip,flash = <>; - #rockchip,af = <>; - mir = <0>; - flash_attach = <0>; - resolution = ; - powerup_sequence = ; - orientation = <0>; - i2c_add = ; - i2c_rata = <100000>; - i2c_chl = <0>; - cif_chl = <0>; - mclk_rate = <24>; - }; - - gc2035{ - is_front = <0>; - rockchip,power = <&gpio2 GPIO_B2 GPIO_ACTIVE_HIGH>; - rockchip,powerdown = <&gpio3 GPIO_B3 GPIO_ACTIVE_HIGH>; - pwdn_active = ; - pwr_active = ; - mir = <0>; - flash_attach = <0>; - resolution = ; - powerup_sequence = ; - orientation = <180>; - i2c_add = ; - i2c_rata = <100000>; - i2c_chl = <2>; - cif_chl = <0>; - mclk_rate = <24>; - }; - gc0308{ - is_front = <1>; - rockchip,power = <&gpio2 GPIO_B2 GPIO_ACTIVE_HIGH>; - rockchip,powerdown = <&gpio3 GPIO_D7 GPIO_ACTIVE_HIGH>; - pwdn_active = ; - pwr_active = ; - mir = <0>; - flash_attach = <0>; - resolution = ; - powerup_sequence = ; - orientation = <180>; - i2c_add = ; - i2c_rata = <100000>; - i2c_chl = <2>; - cif_chl = <0>; - mclk_rate = <24>; - }; - - }; -}; - diff --git a/arch/arm/boot/dts/rk3128-sdk.dts b/arch/arm/boot/dts/rk3128-sdk.dts deleted file mode 100644 index 77c3778a1dd6..000000000000 --- a/arch/arm/boot/dts/rk3128-sdk.dts +++ /dev/null @@ -1,189 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/dts-v1/; - -#include "rk3128.dtsi" -#include "rk3128-cif-sensor.dtsi" -#include "rk312x-sdk.dtsi" -#include "lcd-b101ew05.dtsi" - -/ { - compatible = "rockchip,rk3128"; - backlight: backlight { - compatible = "pwm-backlight"; - pwms = <&pwm0 0 25000>; - brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255>; - default-brightness-level = <128>; - enable-gpios = <&gpio0 GPIO_D3 GPIO_ACTIVE_HIGH>; - }; - - usb_control { - compatible = "rockchip,rk3126-usb-control"; - - host_drv_gpio = <&gpio3 GPIO_C4 GPIO_ACTIVE_LOW>; - otg_drv_gpio = <&gpio3 GPIO_C1 GPIO_ACTIVE_LOW>; - - rockchip,remote_wakeup; - rockchip,usb_irq_wakeup; - }; -}; - -&fb { - rockchip,disp-mode = ; - rockchip,uboot-logo-on = <1>; -}; - -&rk_screen { - display-timings = <&disp_timings>; -}; - -&lvds { - status = "okay"; - - pinctrl-names = "lcdc"; - pinctrl-0 = <&lcdc0_lcdc_d>; -}; - -&lcdc { - status = "okay"; - - backlight = <&backlight>; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&lcdc0_lcdc>; - pinctrl-1 = <&lcdc0_gpio>; - - rockchip,fb-win-map = ; - power_ctr: power_ctr { - rockchip,debug = <0>; - lcd_cs: lcd_cs { - rockchip,power_type = ; - gpios = <&gpio0 GPIO_D0 GPIO_ACTIVE_HIGH>; - rockchip,delay = <10>; - }; - }; -}; - -&hdmi { - status = "okay"; -}; - -&sdmmc { - cd-gpios = <&gpio1 GPIO_C1 GPIO_ACTIVE_HIGH>;/*CD GPIO*/ -}; -&key { - power-key { - gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_LOW>; - linux,code = <116>; - label = "power"; - gpio-key,wakeup; - }; -}; - -&dwc_control_usb { - usb_uart { - status = "ok"; - }; -}; -&codec { - spk_ctl_io = <&gpio1 GPIO_B3 GPIO_ACTIVE_HIGH>; - spk-mute-delay = <200>; - hp-mute-delay = <100>; - rk312x_for_mid = <1>; - is_rk3128 = <0>; - spk_volume = <25>; - hp_volume = <25>; - capture_volume = <26>; - gpio_debug = <1>; - codec_hp_det = <1>; -}; - -&rk3128_cif_sensor{ - status = "okay"; -}; - - -&clk_core_dvfs_table { - operating-points = < - /* KHz uV */ - 216000 925000 - 408000 925000 - 600000 950000 - 696000 975000 - 816000 1050000 - 1008000 1175000 - 1200000 1300000 - 1296000 1350000 - 1320000 1375000 - >; - virt-temp-limit-1-cpu-busy = < - /* target-temp limit-freq */ - 75 1008000 - 85 1200000 - 95 1200000 - 100 1200000 - >; - virt-temp-limit-2-cpu-busy = < - /* target-temp limit-freq */ - 75 912000 - 85 1008000 - 95 1104000 - 100 1200000 - >; - virt-temp-limit-3-cpu-busy = < - /* target-temp limit-freq */ - 75 816000 - 85 912000 - 95 100800 - 100 110400 - >; - virt-temp-limit-4-cpu-busy = < - /* target-temp limit-freq */ - 75 816000 - 85 912000 - 95 100800 - 100 110400 - >; - temp-limit-enable = <1>; - target-temp = <85>; - status="okay"; -}; - -&clk_gpu_dvfs_table { - operating-points = < - /* KHz uV */ - 200000 950000 - 300000 975000 - 400000 1075000 - //480000 1175000 - >; - status="okay"; -}; - -&clk_ddr_dvfs_table { - operating-points = < - /* KHz uV */ - //200000 950000 - //300000 950000 - 400000 1000000 - //533000 1200000 - >; - - freq-table = < - /*status freq(KHz)*/ - SYS_STATUS_NORMAL 400000 - SYS_STATUS_SUSPEND 400000 - SYS_STATUS_VIDEO_1080P 400000 - SYS_STATUS_VIDEO_4K 400000 - SYS_STATUS_PERFORMANCE 400000 - SYS_STATUS_DUALVIEW 400000 - SYS_STATUS_BOOST 400000 - SYS_STATUS_ISP 400000 - >; - auto-freq-table = < - //240000 - //324000 - 396000 - //528000 - >; - auto-freq=<0>; - status="okay"; -}; diff --git a/arch/arm/boot/dts/rk312x-clocks.dtsi b/arch/arm/boot/dts/rk312x-clocks.dtsi deleted file mode 100755 index 1cdc3b63317f..000000000000 --- a/arch/arm/boot/dts/rk312x-clocks.dtsi +++ /dev/null @@ -1,1916 +0,0 @@ -/* - * Copyright (C) 2014 ROCKCHIP, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#include - -/{ - - clocks { - compatible = "rockchip,rk-clocks"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x20000000 0x1f0>; - - fixed_rate_cons { - compatible = "rockchip,rk-fixed-rate-cons"; - - xin24m: xin24m { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "xin24m"; - clock-frequency = <24000000>; - #clock-cells = <0>; - }; - - xin12m: xin12m { - compatible = "rockchip,rk-fixed-clock"; - clocks = <&xin24m>; - clock-output-names = "xin12m"; - clock-frequency = <12000000>; - #clock-cells = <0>; - }; - - gmac_clkin: gmac_clkin { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "gmac_clkin"; - clock-frequency = <125000000>; - #clock-cells = <0>; - }; - - usb480m: usb480m { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "usb480m"; - clock-frequency = <480000000>; - #clock-cells = <0>; - }; - - i2s_clkin: i2s_clkin { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "i2s_clkin"; - clock-frequency = <0>; - #clock-cells = <0>; - }; - - jtag_tck: jtag_tck { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "jtag_tck"; - clock-frequency = <0>; - #clock-cells = <0>; - }; - - pclkin_cif: pclkin_cif { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "pclkin_cif"; - clock-frequency = <0>; - #clock-cells = <0>; - }; - - clk_tsp_in: clk_tsp_in { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "clk_tsp_in"; - clock-frequency = <0>; - #clock-cells = <0>; - }; - - - dummy: dummy { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "dummy"; - clock-frequency = <0>; - #clock-cells = <0>; - }; - - dummy_cpll: dummy_cpll { - compatible = "rockchip,rk-fixed-clock"; - clock-output-names = "dummy_cpll"; - clock-frequency = <0>; - #clock-cells = <0>; - }; - - }; - - fixed_factor_cons { - compatible = "rockchip,rk-fixed-factor-cons"; - - clk_gpll_div2: clk_gpll_div2 { - compatible = "rockchip,rk-fixed-factor-clock"; - clocks = <&clk_gpll>; - clock-output-names = "clk_gpll_div2"; - clock-div = <2>; - clock-mult = <1>; - #clock-cells = <0>; - }; - - clk_gpll_div3: clk_gpll_div3 { - compatible = "rockchip,rk-fixed-factor-clock"; - clocks = <&clk_gpll>; - clock-output-names = "clk_gpll_div3"; - clock-div = <3>; - clock-mult = <1>; - #clock-cells = <0>; - }; - - g_clk_pvtm_func: g_clk_pvtm_func { - compatible = "rockchip,rk-fixed-factor-clock"; - clocks = <&xin24m>; - clock-output-names = "g_clk_pvtm_func"; - clock-div = <1>; - clock-mult = <1>; - #clock-cells = <0>; - }; - - hclk_vepu: hclk_vepu { - compatible = "rockchip,rk-fixed-factor-clock"; - clocks = <&clk_vepu>; - clock-output-names = "hclk_vepu"; - clock-div = <4>; - clock-mult = <1>; - #clock-cells = <0>; - }; - - hclk_vdpu: hclk_vdpu { - compatible = "rockchip,rk-fixed-factor-clock"; - clocks = <&clk_vdpu>; - clock-output-names = "hclk_vdpu"; - clock-div = <4>; - clock-mult = <1>; - #clock-cells = <0>; - }; - - pclkin_cif_inv: pclkin_cif_inv { - compatible = "rockchip,rk-fixed-factor-clock"; - clocks = <&clk_gates3 3>; - clock-output-names = "pclkin_cif_inv"; - clock-div = <1>; - clock-mult = <1>; - #clock-cells = <0>; - }; - - hclk_vio_niu: hclk_vio_niu { - compatible = "rockchip,rk-fixed-factor-clock"; - clocks = <&hclk_vio_pre>; - clock-output-names = "hclk_vio_niu"; - clock-div = <1>; - clock-mult = <1>; - #clock-cells = <0>; - }; - - aclk_vio0_niu: aclk_vio0_niu { - compatible = "rockchip,rk-fixed-factor-clock"; - clocks = <&aclk_vio0_pre>; - clock-output-names = "aclk_vio0_niu"; - clock-div = <1>; - clock-mult = <1>; - #clock-cells = <0>; - }; - - aclk_vio1_niu: aclk_vio1_niu { - compatible = "rockchip,rk-fixed-factor-clock"; - clocks = <&aclk_vio1_pre>; - clock-output-names = "aclk_vio1_niu"; - clock-div = <1>; - clock-mult = <1>; - #clock-cells = <0>; - }; - - }; - - pd_cons { - compatible = "rockchip,rk-pd-cons"; - - pd_gpu: pd_gpu { - compatible = "rockchip,rk-pd-clock"; - clock-output-names = "pd_gpu"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_video: pd_video { - compatible = "rockchip,rk-pd-clock"; - clock-output-names = "pd_video"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_vio: pd_vio { - compatible = "rockchip,rk-pd-clock"; - clock-output-names = "pd_vio"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_vop: pd_vop { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_vio>; - clock-output-names = "pd_vop"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_vip: pd_vip { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_vio>; - clock-output-names = "pd_vip"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_iep: pd_iep { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_vio>; - clock-output-names = "pd_iep"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_rga: pd_rga { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_vio>; - clock-output-names = "pd_rga"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_ebc: pd_ebc { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_vio>; - clock-output-names = "pd_ebc"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_mipidsi: pd_mipidsi { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_vio>; - clock-output-names = "pd_mipidsi"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - pd_hdmi: pd_hdmi { - compatible = "rockchip,rk-pd-clock"; - clocks = <&pd_vio>; - clock-output-names = "pd_hdmi"; - rockchip,pd-id = ; - #clock-cells = <0>; - }; - - }; - - - clock_regs { - compatible = "rockchip,rk-clock-regs"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x0000 0x01f0>; - ranges; - - /* PLL control regs */ - pll_cons { - compatible = "rockchip,rk-pll-cons"; - #address-cells = <1>; - #size-cells = <1>; - ranges ; - - clk_apll: pll-clk@0000 { - compatible = "rockchip,rk3188-pll-clk"; - reg = <0x0000 0x10>; - mode-reg = <0x0040 0>; - status-reg = <0x0004 10>; - clocks = <&xin24m>; - clock-output-names = "clk_apll"; - rockchip,pll-type = ; - #clock-cells = <0>; - }; - - clk_dpll: pll-clk@0010 { - compatible = "rockchip,rk3188-pll-clk"; - reg = <0x0010 0x10>; - mode-reg = <0x0040 4>; - status-reg = <0x0014 10>; - clocks = <&xin24m>; - clock-output-names = "clk_dpll"; - rockchip,pll-type = ; - #clock-cells = <0>; - }; - - clk_cpll: pll-clk@0020 { - compatible = "rockchip,rk3188-pll-clk"; - reg = <0x0020 0x10>; - mode-reg = <0x0040 8>; - status-reg = <0x0024 10>; - clocks = <&xin24m>; - clock-output-names = "clk_cpll"; - rockchip,pll-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - clk_gpll: pll-clk@0030 { - compatible = "rockchip,rk3188-pll-clk"; - reg = <0x0030 0x10>; - mode-reg = <0x0040 12>; - status-reg = <0x0034 10>; - clocks = <&xin24m>; - clock-output-names = "clk_gpll"; - rockchip,pll-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - }; - - /* Select control regs */ - clk_sel_cons { - compatible = "rockchip,rk-sel-cons"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - clk_sel_con0: sel-con@0044 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0044 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_core_div: clk_core_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_core>; - clock-output-names = "clk_core"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - rockchip,flags = <(CLK_GET_RATE_NOCACHE | - CLK_SET_RATE_NO_REPARENT)>; - }; - - /* reg[6:5]: reserved */ - - clk_core: clk_core_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <7 1>; - clocks = <&clk_apll>, <&clk_gpll_div2>; - clock-output-names = "clk_core"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - aclk_cpu_div: aclk_cpu_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&aclk_cpu>; - clock-output-names = "aclk_cpu"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - aclk_cpu: aclk_cpu_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <13 2>; - clocks = <&clk_apll>, <&clk_gpll>,<&clk_gpll_div2>,<&clk_gpll_div3>; - clock-output-names = "aclk_cpu"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* reg[15]: reserved */ - - }; - - clk_sel_con1: sel-con@0048 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0048 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - pclk_dbg_div: pclk_dbg_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 4>; - clocks = <&clk_core>; - clock-output-names = "pclk_dbg"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - aclk_core_pre: aclk_core_pre_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <4 3>; - clocks = <&clk_core>; - clock-output-names = "aclk_core_pre"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = ; - }; - - /* reg[7]: reserved */ - - hclk_cpu_pre: hclk_cpu_pre_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 2>; - clocks = <&aclk_cpu>; - clock-output-names = "hclk_cpu_pre"; - rockchip,div-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* reg[11:10]: reserved */ - - pclk_cpu_pre: pclk_cpu_pre_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <12 3>; - clocks = <&aclk_cpu>; - clock-output-names = "pclk_cpu_pre"; - rockchip,div-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* reg[15]: reserved */ - }; - - clk_sel_con2: sel-con@004c { - compatible = "rockchip,rk3188-selcon"; - reg = <0x004c 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_pvtm_div: clk_pvtm_div { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <0 7>; - clocks = <&g_clk_pvtm_func>; - clock-output-names = "clk_pvtm"; - rockchip,div-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* reg[7]: reserved */ - - clk_nandc_div: clk_nandc_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&clk_nandc>; - clock-output-names = "clk_nandc"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - }; - - /* reg[13]: reserved */ - - clk_nandc: clk_nandc_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <14 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_gpll_div2>; - clock-output-names = "clk_nandc"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - }; - - clk_sel_con3: sel-con@0050 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0050 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_i2s_2ch_pll_div: clk_i2s_2ch_pll_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&clk_i2s_2ch_pll>; - clock-output-names = "clk_i2s_2ch_pll"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* reg[7]: reserved */ - - clk_i2s_2ch: clk_i2s_2ch_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&clk_i2s_2ch_pll_div>, <&i2s_2ch_frac>, <&i2s_clkin>, <&xin12m>; - clock-output-names = "clk_i2s_2ch"; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* reg[11:10]: reserved */ - - clk_i2s_2ch_out: clk_i2s_2ch_out_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <12 1>; - clocks = <&clk_i2s_2ch>, <&xin12m>; - clock-output-names = "i2s_clkout"; - #clock-cells = <0>; - }; - - /* reg[13]: reserved */ - - clk_i2s_2ch_pll: i2s_2ch_pll_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <14 2>; - clocks = <&clk_cpll>,<&clk_gpll>, <&clk_gpll_div2>; - clock-output-names = "clk_i2s_2ch_pll"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - }; - - clk_sel_con4: sel-con@0054 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0054 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_tsp_div: clk_tsp_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_tsp>; - clock-output-names = "clk_tsp"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - }; - - /* reg[5]: reserved */ - - clk_tsp: clk_tsp_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_gpll_div2>; - clock-output-names = "clk_tsp"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - clk_24m_div: clk_24m_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&xin24m>; - clock-output-names = "clk_24m"; - rockchip,div-type = ; - #clock-cells = <0>; - }; - - /* reg[15:13]: reserved */ - - }; - - - clk_sel_con5: sel-con@0058 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0058 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_mac_pll_div: clk_mac_pll_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_mac_pll>; - clock-output-names = "clk_mac_pll"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - #clock-init-cells = <1>; - }; - - /* reg[5]: reserved */ - - clk_mac_pll: clk_mac_pll_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_gpll_div2>; - clock-output-names = "clk_mac_pll"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* reg[14:8]: reserved */ - - clk_mac_ref: clk_mac_ref_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <15 1>; - clocks = <&clk_mac_pll_div>, <&gmac_clkin>; - clock-output-names = "clk_mac_ref"; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - #clock-init-cells = <1>; - }; - - }; - - - clk_sel_con6: sel-con@005c { - compatible = "rockchip,rk3188-selcon"; - reg = <0x005c 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - spdif_div: spdif_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&clk_spdif_pll>; - clock-output-names = "clk_spdif_pll"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* reg[7]: reserved */ - - clk_spdif: spdif_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&spdif_div>, <&spdif_frac>, <&xin12m>; - clock-output-names = "clk_spdif"; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* reg[13:10]: reserved */ - - clk_spdif_pll: spdif_pll_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <14 2>; - clocks = <&clk_cpll>,<&clk_gpll>, <&clk_gpll_div2>; - clock-output-names = "clk_spdif_pll"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - }; - - clk_sel_con7: sel-con@0060 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0060 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - i2s_2ch_frac: i2s_2ch_frac { - compatible = "rockchip,rk3188-frac-con"; - clocks = <&clk_i2s_2ch_pll>; - clock-output-names = "i2s_2ch_frac"; - /* numerator denominator */ - rockchip,bits = <0 32>; - rockchip,clkops-idx = - ; - #clock-cells = <0>; - }; - }; - - clk_sel_con8: sel-con@0064 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0064 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - i2s_8ch_frac: i2s_8ch_frac { - compatible = "rockchip,rk3188-frac-con"; - clocks = <&clk_i2s_8ch_pll>; - clock-output-names = "i2s_8ch_frac"; - /* numerator denominator */ - rockchip,bits = <0 32>; - rockchip,clkops-idx = - ; - #clock-cells = <0>; - }; - }; - - clk_sel_con9: sel-con@0068 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0068 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_i2s_8ch_pll_div: clk_i2s_8ch_pll_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&clk_i2s_8ch_pll>; - clock-output-names = "clk_i2s_8ch_pll"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* reg[7]: reserved */ - - clk_i2s_8ch: clk_i2s_8ch_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&clk_i2s_8ch_pll_div>, <&i2s_8ch_frac>, <&i2s_clkin>, <&xin12m>; - clock-output-names = "clk_i2s_8ch"; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* reg[13:10]: reserved */ - - clk_i2s_8ch_pll: i2s_8ch_pll_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <14 2>; - clocks = <&clk_cpll>,<&clk_gpll>, <&clk_gpll_div2>; - clock-output-names = "clk_i2s_8ch_pll"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - }; - - clk_sel_con10: sel-con@006c { - compatible = "rockchip,rk3188-selcon"; - reg = <0x006c 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - aclk_peri_div: aclk_peri_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&aclk_peri>; - clock-output-names = "aclk_peri"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* reg[7:5]: reserved */ - - hclk_peri_pre: hclk_peri_pre_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 2>; - clocks = <&aclk_peri>; - clock-output-names = "hclk_peri_pre"; - rockchip,div-type = ; - rockchip,div-relations = - <0x0 1 - 0x1 2 - 0x2 4>; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* reg[11:10]: reserved */ - - pclk_peri_pre: pclk_peri_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <12 2>; - clocks = <&aclk_peri>; - clock-output-names = "pclk_peri_pre"; - rockchip,div-type = ; - rockchip,div-relations = - <0x0 1 - 0x1 2 - 0x2 4 - 0x3 8>; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - aclk_peri: aclk_peri_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <14 2>; - clocks = <&clk_gpll>,<&clk_cpll>,<&clk_gpll_div2>,<&clk_gpll_div3>; - clock-output-names = "aclk_peri"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - }; - - clk_sel_con11: sel-con@0070 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0070 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_sdmmc0_div: clk_sdmmc0_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 6>; - clocks = <&clk_sdmmc0>; - clock-output-names = "clk_sdmmc0"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - }; - - clk_sdmmc0: clk_sdmmc0_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 2>; - clocks = <&clk_cpll>,<&clk_gpll>,<&clk_gpll_div2>,<&xin24m>; - clock-output-names = "clk_sdmmc0"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - clk_sfc_div: clk_sfc_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&clk_sfc>; - clock-output-names = "clk_sfc"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - }; - - /* reg[13]: reserved */ - - clk_sfc: clk_sfc_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <14 2>; - clocks = <&clk_cpll>,<&clk_gpll>,<&clk_gpll_div2>,<&xin24m>; - clock-output-names = "clk_sfc"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - }; - - clk_sel_con12: sel-con@0074 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0074 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_sdio_div: clk_sdio_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 6>; - clocks = <&clk_sdio>; - clock-output-names = "clk_sdio"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - }; - - clk_sdio: clk_sdio_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <6 2>; - clocks = <&clk_cpll>,<&clk_gpll>, <&clk_gpll_div2>, <&xin24m>; - clock-output-names = "clk_sdio"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - clk_emmc_div: clk_emmc_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 6>; - clocks = <&clk_emmc>; - clock-output-names = "clk_emmc"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - }; - - clk_emmc: clk_emmc_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <14 2>; - clocks = <&clk_cpll>,<&clk_gpll>, <&clk_gpll_div2>, <&xin24m>; - clock-output-names = "clk_emmc"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - }; - - clk_sel_con13: sel-con@0078 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0078 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_uart0_pll_div: clk_uart0_pll_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&clk_uart0_pll>; - clock-output-names = "clk_uart0_pll"; - rockchip,div-type = ; - #clock-cells = <0>; - }; - - /* reg[7]: reserved */ - - clk_uart0: clk_uart0_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&clk_uart0_pll>, <&uart0_frac>, <&xin24m>; - clock-output-names = "clk_uart0"; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* reg[11:10]: reserved */ - - clk_uart0_pll: clk_uart0_pll_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <12 2>; - clocks = <&clk_cpll>,<&clk_gpll>, <&clk_gpll_div2>, <&usb480m>; - clock-output-names = "clk_uart0_pll"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - clk_uart2_pll: clk_uart2_pll_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <14 2>; - clocks = <&clk_cpll>,<&clk_gpll>, <&clk_gpll_div2>, <&usb480m>; - clock-output-names = "clk_uart2_pll"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - }; - - clk_sel_con14: sel-con@007c { - compatible = "rockchip,rk3188-selcon"; - reg = <0x007c 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_uart1_div: clk_uart1_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&clk_uart2_pll>; - clock-output-names = "clk_uart1_div"; - rockchip,div-type = ; - #clock-cells = <0>; - }; - - /* reg[7]: reserved */ - - clk_uart1: clk_uart1_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&clk_uart1_div>, <&uart1_frac>, <&xin24m>; - clock-output-names = "clk_uart1"; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* reg[15:10]: reserved */ - }; - - clk_sel_con15: sel-con@0080 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0080 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_uart2_div: clk_uart2_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&clk_uart2_pll>; - clock-output-names = "clk_uart2_div"; - rockchip,div-type = ; - #clock-cells = <0>; - }; - - /* reg[7]: reserved */ - - clk_uart2: clk_uart2_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&clk_uart2_div>, <&uart2_frac>, <&xin24m>; - clock-output-names = "clk_uart2"; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* reg[15:10]: reserved */ - }; - - clk_sel_con17: sel-con@0088 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0088 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - uart0_frac: uart0_frac { - compatible = "rockchip,rk3188-frac-con"; - clocks = <&clk_uart0_pll>; - clock-output-names = "uart0_frac"; - /* numerator denominator */ - rockchip,bits = <0 32>; - rockchip,clkops-idx = - ; - #clock-cells = <0>; - }; - }; - - clk_sel_con18: sel-con@008c { - compatible = "rockchip,rk3188-selcon"; - reg = <0x008c 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - uart1_frac: uart1_frac { - compatible = "rockchip,rk3188-frac-con"; - clocks = <&clk_uart1_div>; - clock-output-names = "uart1_frac"; - /* numerator denominator */ - rockchip,bits = <0 32>; - rockchip,clkops-idx = - ; - #clock-cells = <0>; - }; - }; - - clk_sel_con19: sel-con@0090 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0090 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - uart2_frac: uart2_frac { - compatible = "rockchip,rk3188-frac-con"; - clocks = <&clk_uart2_div>; - clock-output-names = "uart2_frac"; - /* numerator denominator */ - rockchip,bits = <0 32>; - rockchip,clkops-idx = - ; - #clock-cells = <0>; - }; - - }; - - clk_sel_con20: sel-con@0094 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x0094 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - spdif_frac: spdif_frac { - compatible = "rockchip,rk3188-frac-con"; - clocks = <&spdif_div>; - clock-output-names = "spdif_frac"; - /* numerator denominator */ - rockchip,bits = <0 32>; - rockchip,clkops-idx = - ; - #clock-cells = <0>; - }; - - }; - - clk_sel_con23: sel-con@00a0 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x00a0 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - dclk_ebc: dclk_ebc_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <0 2>; - clocks = <&clk_cpll>,<&clk_gpll>, <&clk_gpll_div2>; - clock-output-names = "dclk_ebc"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* reg[7:2]: reserved */ - - dclk_ebc_div: dclk_ebc_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 8>; - clocks = <&dclk_ebc>; - clock-output-names = "dclk_ebc"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - }; - - }; - - clk_sel_con24: sel-con@00a4 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x00a4 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_crypto_div: clk_crypto_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 2>; - clocks = <&aclk_cpu>; - clock-output-names = "clk_crypto"; - rockchip,div-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* reg[7:2]: reserved */ - - clk_saradc: clk_saradc_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 8>; - clocks = <&xin24m>; - clock-output-names = "clk_saradc"; - rockchip,div-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - }; - - clk_sel_con25: sel-con@00a8 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x00a8 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_spi0_div: clk_spi0_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 7>; - clocks = <&clk_spi0>; - clock-output-names = "clk_spi0"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - }; - - /* reg[7]: reserved */ - - clk_spi0: clk_spi0_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 2>; - clocks = <&clk_cpll>, <&clk_gpll>,<&clk_gpll_div2>; - clock-output-names = "clk_spi0"; - #clock-cells = <0>; - }; - - /* reg[15:10]: reserved */ - - }; - - clk_sel_con26: sel-con@00ac { - compatible = "rockchip,rk3188-selcon"; - reg = <0x00ac 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - ddr_div: ddr_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 2>; - clocks = <&clk_ddr>; - clock-output-names = "clk_ddr"; - rockchip,div-type = ; - rockchip,div-relations = - <0x0 1 - 0x1 2 - 0x3 4>; - #clock-cells = <0>; - rockchip,flags = <(CLK_GET_RATE_NOCACHE | - CLK_SET_RATE_NO_REPARENT)>; - rockchip,clkops-idx = ; - }; - - /* reg[7:2]: reserved */ - - clk_ddr: ddr_clk_pll_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <8 1>; - clocks = <&clk_dpll>, <&dummy>; - clock-output-names = "clk_ddr"; - #clock-cells = <0>; - }; - - /* reg[15:9]: reserved */ - }; - - clk_sel_con27: sel-con@00b0 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x00b0 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - dclk_lcdc0: dclk_lcdc0_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <0 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_gpll_div2>, <&clk_gpll_div3>; - clock-output-names = "dclk_lcdc0"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* reg[7:2]: reserved */ - - dclk_lcdc0_div: dclk_lcdc0_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 8>; - clocks = <&dclk_lcdc0>; - clock-output-names = "dclk_lcdc0"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - }; - - clk_sel_con28: sel-con@00b4 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x00b4 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - sclk_lcdc0: sclk_lcdc0_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <0 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_gpll_div2>, <&clk_gpll_div3>; - clock-output-names = "sclk_lcdc0"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* reg[7:2]: reserved */ - - sclk_lcdc0_div: sclk_lcdc0_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 8>; - clocks = <&sclk_lcdc0>; - clock-output-names = "sclk_lcdc0"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - }; - - clk_sel_con29: sel-con@00b8 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x00b8 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_cif_pll: clk_cif_pll_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <0 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_gpll_div2>, <&usb480m>; - clock-output-names = "clk_cif_pll"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - clk_cif_out_div: clk_cif_out_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <2 5>; - clocks = <&clk_cif_out>; - clock-output-names = "clk_cif_out"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - }; - - clk_cif_out: clk_cif_out_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <7 1>; - clocks = <&clk_cif_pll>, <&xin24m>; - clock-output-names = "clk_cif_out"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - pclk_pmu_pre: pclk_pmu_pre_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 6>; - clocks = <&clk_cpll>; - clock-output-names = "pclk_pmu_pre"; - rockchip,div-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* reg[15:14]: reserved */ - }; - - clk_sel_con30: sel-con@00bc { - compatible = "rockchip,rk3188-selcon"; - reg = <0x00bc 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_testout_div: clk_testout_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&dummy>; - clock-output-names = "clk_testout"; - rockchip,div-type = ; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - /* reg[6:5]: reserved */ - - clk_cif0_in: clk_cif0_in_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <7 1>; - clocks = <&pclkin_cif>, <&pclkin_cif_inv>; - clock-output-names = "clk_cif0_in"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - hclk_vio_pre_div: hclk_vio_pre_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&hclk_vio_pre>; - clock-output-names = "hclk_vio_pre"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - /* reg[13]: reserved */ - - hclk_vio_pre: hclk_vio_pre_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <14 2>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_gpll_div2>, <&usb480m>; - clock-output-names = "hclk_vio_pre"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - }; - - clk_sel_con31: sel-con@00c0 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x00c0 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - aclk_vio0_pre_div: aclk_vio0_pre_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&aclk_vio0_pre>; - clock-output-names = "aclk_vio0_pre"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - aclk_vio0_pre: aclk_vio0_pre_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <5 3>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_gpll_div2>, <&clk_gpll_div3>, <&usb480m>; - clock-output-names = "aclk_vio0_pre"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - aclk_vio1_pre_div: aclk_vio1_pre_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&aclk_vio1_pre>; - clock-output-names = "aclk_vio1_pre"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - aclk_vio1_pre: aclk_vio1_pre_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <13 3>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_gpll_div2>, <&clk_gpll_div3>, <&usb480m>; - clock-output-names = "aclk_vio1_pre"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - }; - - clk_sel_con32: sel-con@00c4 { - compatible = "rockchip,rk3188-selcon"; - reg = <0x00c4 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_vepu_div: clk_vepu_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_vepu>; - clock-output-names = "clk_vepu"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - clk_vepu: clk_vepu_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <5 3>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_gpll_div2>, <&clk_gpll_div3>, <&usb480m>; - clock-output-names = "clk_vepu"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - clk_vdpu_div: clk_vdpu_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&clk_vdpu>; - clock-output-names = "clk_vdpu"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - clk_vdpu: clk_vdpu_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <13 3>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_gpll_div2>, <&clk_gpll_div3>, <&usb480m>; - clock-output-names = "clk_vdpu"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - }; - - clk_sel_con34: sel-con@00cc { - compatible = "rockchip,rk3188-selcon"; - reg = <0x00cc 0x4>; - #address-cells = <1>; - #size-cells = <1>; - - clk_gpu_div: clk_gpu_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <0 5>; - clocks = <&clk_gpu>; - clock-output-names = "clk_gpu"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - clk_gpu: clk_gpu_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <5 3>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_gpll_div2>, <&clk_gpll_div3>, <&usb480m>; - clock-output-names = "clk_gpu"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - clk_hevc_core_div: clk_hevc_core_div { - compatible = "rockchip,rk3188-div-con"; - rockchip,bits = <8 5>; - clocks = <&clk_hevc_core>; - clock-output-names = "clk_hevc_core"; - rockchip,div-type = ; - #clock-cells = <0>; - rockchip,clkops-idx = - ; - rockchip,flags = ; - }; - - clk_hevc_core: clk_hevc_core_mux { - compatible = "rockchip,rk3188-mux-con"; - rockchip,bits = <13 3>; - clocks = <&clk_cpll>, <&clk_gpll>, <&clk_gpll_div2>, <&clk_gpll_div3>, <&usb480m>; - clock-output-names = "clk_hevc_core"; - #clock-cells = <0>; - #clock-init-cells = <1>; - }; - - }; - - }; - - - /* Gate control regs */ - clk_gate_cons { - compatible = "rockchip,rk-gate-cons"; - #address-cells = <1>; - #size-cells = <1>; - ranges ; - - clk_gates0: gate-clk@00d0{ - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x00d0 0x4>; - clocks = - <&clk_core>, <&dummy>, - <&dummy>, <&aclk_cpu>, - - <&aclk_cpu>, <&aclk_cpu>, - <&dummy>, <&clk_core>, - - <&dummy>, <&clk_i2s_2ch_pll>, - <&i2s_2ch_frac>, <&hclk_vio_pre>, - - <&aclk_cpu>, <&clk_i2s_2ch_out>, - <&clk_i2s_2ch>, <&dummy>; - - clock-output-names = - "pclk_dbg", "aclk_cpu", /*clk_cpu_cpll*/ - "reserved", "aclk_cpu_pre", - - "hclk_cpu_pre", "pclk_cpu_pre", - "clk_core", "aclk_core_pre", - - "reserved", "clk_i2s_2ch_pll", - "i2s_2ch_frac", "hclk_vio_pre", - - "clk_crypto", "clk_i2s_2ch_out", - "clk_i2s_2ch", "clk_testout"; - rockchip,suspend-clkgating-setting=<0x11ff 0x0>; - - #clock-cells = <1>; - }; - - clk_gates1: gate-clk@00d4{ - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x00d4 0x4>; - clocks = - <&clk_cpll>, <&dummy>, - <&dummy>, <&jtag_tck>, - - <&aclk_vio1_pre>, <&xin12m>, - <&xin12m>, <&clk_mac_pll>, - - <&clk_uart0_pll>, <&uart0_frac>, - <&clk_uart1_div>, <&uart1_frac>, - - <&clk_uart2_div>, <&uart2_frac>, - <&clk_tsp>, <&dummy>; - - clock-output-names = - "pclk_pmu_pre", "reserved", - "reserved", "clk_jtag", - - "aclk_vio1_pre", "clk_otgphy0", - "clk_otgphy1", "clk_mac_pll", - - "clk_uart0_pll", "uart0_frac", - "clk_uart1_div", "uart1_frac", - - "clk_uart2_div", "uart2_frac", - "clk_tsp", "reserved"; - - rockchip,suspend-clkgating-setting=<0x000f 0x0>; - #clock-cells = <1>; - }; - - clk_gates2: gate-clk@00d8 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x00d8 0x4>; - clocks = - <&aclk_peri>, <&aclk_peri>, - <&aclk_peri>, <&aclk_peri>, - - <&clk_mac_ref>, <&clk_mac_ref>, - <&clk_mac_ref>, <&clk_mac_ref>, - - <&clk_saradc>, <&clk_spi0>, - <&clk_spdif_pll>, <&clk_sdmmc0>, - - <&spdif_frac>, <&clk_sdio>, - <&clk_emmc>, <&xin24m>; - clock-output-names = - "aclk_peri", "aclk_peri_pre", - "hclk_peri_pre", "pclk_peri_pre", - - "clk_mac_ref", "clk_mac_refout", - "clk_mac_rx", "clk_mac_tx", - - "clk_saradc", "clk_spi0", - "clk_spdif_pll", "clk_sdmmc0", - - "spdif_frac", "clk_sdio", - "clk_emmc", "clk_mipi_24m"; - rockchip,suspend-clkgating-setting=<0x000f 0x0>; - - #clock-cells = <1>; - }; - - clk_gates3: gate-clk@00dc { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x00dc 0x4>; - clocks = - <&aclk_vio0_pre>, <&dclk_lcdc0>, - <&sclk_lcdc0>, <&pclkin_cif>, - - <&dclk_ebc>, <&hclk_cpu_pre>, - <&hclk_peri_pre>, <&clk_cif_pll>, - - <&pclk_cpu_pre>, <&clk_vepu>, - <&clk_hevc_core>, <&clk_vdpu>, - - <&hclk_vdpu>, <&clk_gpu>, - <&aclk_peri>, <&clk_sfc>; - - clock-output-names = - "aclk_vio0_pre", "dclk_lcdc0", - "sclk_lcdc0", "pclkin_cif", - - "dclk_ebc", "g_hclk_crypto", - "g_hclk_em_peri", "clk_cif_pll", - - "g_pclk_hdmi", "clk_vepu", - "clk_hevc_core", "clk_vdpu", - - "hclk_vdpu", "clk_gpu", - "g_hclk_gps", "clk_sfc"; - rockchip,suspend-clkgating-setting=<0x0060 0x0000>; - - #clock-cells = <1>; - }; - - clk_gates4: gate-clk@00e0{ - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x00e0 0x4>; - clocks = - <&hclk_peri_pre>, <&pclk_peri_pre>, - <&aclk_peri>, <&aclk_peri>, - - <&clk_i2s_8ch_pll>, <&i2s_8ch_frac>, - <&clk_i2s_8ch>, <&dummy>, - - <&dummy>, <&dummy>, - <&aclk_cpu>, <&dummy>, - - <&aclk_cpu>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "g_hp_axi_matrix", "g_pp_axi_matrix", - "g_aclk_cpu_peri", "g_ap_axi_matrix", - - "clk_i2s_8ch_pll", "i2s_8ch_frac", - "clk_i2s_8ch", "reserved", - - "reserved", "reserved", - "g_aclk_strc_sys", "reserved", - - /* Not use these ddr gates */ - "g_aclk_intmem", "reserved", - "reserved", "reserved"; - - rockchip,suspend-clkgating-setting = <0xff8f 0x0000>; - #clock-cells = <1>; - }; - - clk_gates5: gate-clk@00e4 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x00e4 0x4>; - clocks = - <&pclk_cpu_pre>, <&aclk_peri>, - <&pclk_peri_pre>, <&dummy>, - - <&pclk_cpu_pre>, <&dummy>, - <&hclk_cpu_pre>, <&pclk_cpu_pre>, - - <&dummy>, <&hclk_peri_pre>, - <&hclk_peri_pre>, <&hclk_peri_pre>, - - <&dummy>, <&hclk_peri_pre>, - <&pclk_cpu_pre>, <&dummy>; - - clock-output-names = - "g_pclk_mipiphy", "g_aclk_dmac", - "g_pclk_efuse", "reserved", - - "g_pclk_grf", "reserved", - "g_hclk_rom", "g_pclk_ddrupctl", - - "reserved", "g_hclk_nandc", - "g_hclk_sdmmc0", "g_hclk_sdio", - - "reserved", "g_hclk_otg0", - "g_pclk_acodec", "reserved"; - - rockchip,suspend-clkgating-setting = <0x00f0 0x0000>; - - #clock-cells = <1>; - }; - - clk_gates6: gate-clk@00e8 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x00e8 0x4>; - clocks = - <&aclk_vio0_niu>, <&hclk_vio_niu>, - <&dummy>, <&dummy>, - - <&hclk_vio_niu>, <&aclk_vio0_niu>, - <&dummy>, <&dummy>, - - <&dummy>, <&dummy>, - <&hclk_vio_niu>, <&aclk_vio0_niu>, - - <&hclk_vio_pre>, <&aclk_vio0_pre>, - <&dummy>, <&dummy>; - - clock-output-names = - "g_aclk_lcdc0", "g_hclk_lcdc0", - "reserved", "reserved", - - "g_hclk_cif", "g_aclk_cif", - "reserved", "reserved", - - "reserved", "reserved", - "g_hclk_rga", "g_aclk_rga", - - "hclk_vio_niu", "aclk_vio0_niu", - "reserved", "reserved"; - - rockchip,suspend-clkgating-setting = <0x0000 0x0000>; - - #clock-cells = <1>; - }; - - clk_gates7: gate-clk@00ec { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x00ec 0x4>; - clocks = - <&hclk_peri_pre>, <&hclk_peri_pre>, - <&hclk_peri_pre>, <&hclk_peri_pre>, - - <&hclk_peri_pre>, <&dummy>, - <&dummy>, <&pclk_peri_pre>, - - <&dummy>, <&dummy>, - <&pclk_peri_pre>, <&dummy>, - - <&pclk_peri_pre>, <&dummy>, - <&pclk_peri_pre>, <&pclk_peri_pre>; - - clock-output-names = - "g_hclk_emmc", "g_hclk_sfc", - "g_hclk_i2s_2ch", "g_hclk_host", - - "g_hclk_i2s_8ch", "reserved", - "reserved", "g_pclk_timer", - - "reserved", "reserved", - "g_pclk_pwm", "reserved", - - "g_pclk_spi0", "reserved", - "g_pclk_saradc", "g_pclk_wdt"; - - rockchip,suspend-clkgating-setting = <0x8480 0x0000>; - - #clock-cells = <1>; - }; - - clk_gates8: gate-clk@00f0 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x00f0 0x4>; - clocks = - <&pclk_peri_pre>, <&pclk_peri_pre>, - <&pclk_peri_pre>, <&dummy>, - - <&pclk_peri_pre>, <&pclk_peri_pre>, - <&pclk_peri_pre>, <&pclk_peri_pre>, - - <&dummy>, <&pclk_peri_pre>, - <&pclk_peri_pre>, <&pclk_peri_pre>, - - <&pclk_peri_pre>, <&dummy>, - <&dummy>, <&dummy>; - - clock-output-names = - "g_pclk_uart0", "g_pclk_uart1", - "g_pclk_uart2", "reserved", - - "g_pclk_i2c0", "g_pclk_i2c1", - "g_pclk_i2c2", "g_pclk_i2c3", - - "reserved", "g_pclk_gpio0", - "g_pclk_gpio1", "g_pclk_gpio2", - - "g_pclk_gpio3", "reserved", - "reserved", "reserved"; - - rockchip,suspend-clkgating-setting=<0xff0f 0x0000>; - #clock-cells = <1>; - }; - - clk_gates9: gate-clk@00f4 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x00f4 0x4>; - clocks = - <&dummy>, <&dummy>, - <&pclk_pmu_pre>, <&pclk_pmu_pre>, - - <&dummy>, <&hclk_vio_niu>, - <&hclk_vio_niu>, <&hclk_vio_niu>, - - <&aclk_vio1_niu>, <&hclk_vio_niu>, - <&aclk_vio1_pre>, <&dummy>, - - <&pclk_peri_pre>, <&hclk_peri_pre>, - <&hclk_peri_pre>, <&aclk_peri>; - - clock-output-names = - "reserved", "reserved", - "g_pclk_pmu", "g_pclk_pmu_noc", - - "reserved", "g_hclk_vio_h2p", - "g_pclk_mipi", "g_hclk_iep", - - "g_aclk_iep", "g_hclk_ebc", - "aclk_vio1_niu", "reserved", - - "g_pclk_sim_card", "g_hclk_usb_peri", - "g_hclk_pe_arbi", "g_aclk_peri_niu"; - - rockchip,suspend-clkgating-setting=<0xf00f 0x0>; - - #clock-cells = <1>; - }; - - clk_gates10: gate-clk@00f8 { - compatible = "rockchip,rk3188-gate-clk"; - reg = <0x00f8 0x4>; - clocks = - <&xin24m>, <&xin24m>, - <&xin24m>, <&xin24m>, - - <&xin24m>, <&xin24m>, - <&xin24m>, <&xin24m>, - - <&xin24m>, <&hclk_peri_pre>, - <&aclk_peri>, <&pclk_peri_pre>, - - <&hclk_peri_pre>, <&clk_tsp_in>, - <&hclk_peri_pre>, <&clk_nandc>; - - clock-output-names = - "g_clk_pvtm_core", "g_clk_pvtm_gpu", - "g_clk_pvtm_func", "clk_timer0", - - "clk_timer1", "clk_timer2", - "clk_timer3", "clk_timer4", - - "clk_timer5", "g_hclk_spdif", - "g_aclk_gmac", "g_pclk_gmac", - - "g_hclk_tsp", "g_clkin0_tsp", - "g_hclk_usbhost", "clk_nandc"; - - rockchip,suspend-clkgating-setting = <0x0000 0x0>; /* pwm logic vol */ - - #clock-cells = <1>; - }; - - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/rk312x-pinctrl.dtsi b/arch/arm/boot/dts/rk312x-pinctrl.dtsi deleted file mode 100644 index 6a8ca01dfab7..000000000000 --- a/arch/arm/boot/dts/rk312x-pinctrl.dtsi +++ /dev/null @@ -1,895 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -#include -#include -#include -#include - -/ { - pinctrl: pinctrl@20008000 { - compatible = "rockchip,rk312x-pinctrl"; - reg = <0x20008000 0xA8>, - <0x200080A8 0x4C>, - <0x20008118 0x20>, - <0x20008100 0x04>; - reg-names = "base", "mux", "pull", "drv"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - gpio0: gpio0@2007c000 { - compatible = "rockchip,gpio-bank"; - reg = <0x2007c000 0x100>; - interrupts = ; - clocks = <&clk_gates8 9>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio1@20080000 { - compatible = "rockchip,gpio-bank"; - reg = <0x20080000 0x100>; - interrupts = ; - clocks = <&clk_gates8 10>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio2@20084000 { - compatible = "rockchip,gpio-bank"; - reg = <0x20084000 0x100>; - interrupts = ; - clocks = <&clk_gates8 11>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio3@20088000 { - compatible = "rockchip,gpio-bank"; - reg = <0x20088000 0x100>; - interrupts = ; - clocks = <&clk_gates8 12>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio15: gpio15@2008A000 { - compatible = "rockchip,gpio-bank"; - reg = <0x20086000 0x100>; - interrupts = ;//127 = 160-32-1 - clocks = <&clk_gates8 12>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - pcfg_pull_up: pcfg_pull_up { - bias-pull-up; - }; - - pcfg_pull_down: pcfg_pull_down { - bias-pull-down; - }; - - pcfg_pull_none: pcfg_pull_none { - bias-disable; - }; - - gpio0_uart0 { - uart0_xfer: uart0-xfer { - rockchip,pins = , - ; - rockchip,pull = ; - - - }; - - uart0_cts: uart0-cts { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - uart0_rts: uart0-rts { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - uart0_rts_gpio: uart0-rts-gpio { - rockchip,pins = ; - rockchip,pull = ; - - }; - }; - - gpio1_uart1 { - uart1_xfer: uart1-xfer { - rockchip,pins = , - ; - rockchip,pull = ; - - - }; - - uart1_cts: uart1-cts { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - uart1_rts: uart1-rts { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - uart1_rts_gpio: uart1-rts-gpio { - rockchip,pins = ; - rockchip,pull = ; - - }; - }; - - gpio1_uart2 { - uart2_xfer: uart2-xfer { - rockchip,pins = , - ; - rockchip,pull = ; - - - }; - - uart2_cts: uart2-cts { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - uart2_rts: uart2-rts { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - uart2_rts_gpio: uart2-rts-gpio { - rockchip,pins = ; - rockchip,pull = ; - - }; - }; - - - gpio0_i2c0 { - i2c0_sda:i2c0-sda { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - i2c0_scl:i2c0-scl { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - i2c0_gpio: i2c0-gpio { - rockchip,pins = , ; - rockchip,pull = ; - - }; - }; - - gpio0_i2c1 { - i2c1_sda:i2c1-sda { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - i2c1_scl:i2c1-scl { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - i2c1_gpio: i2c1-gpio { - rockchip,pins = , ; - rockchip,pull = ; - - }; - }; - - gpio1_i2c2 { - i2c2_sda:i2c2-sda { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - i2c2_scl:i2c2-scl { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - i2c2_gpio: i2c2-gpio { - rockchip,pins = , ; - rockchip,pull = ; - - }; - }; - - - gpio0_i2c3 { - i2c3_sda:i2c3-sda { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - i2c3_scl:i2c3-scl { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - i2c3_gpio: i2c3-gpio { - rockchip,pins = , ; - rockchip,pull = ; - - }; - }; - - - - gpio1_spi0 { - spi0_txd_mux0:spi0-txd-mux0 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - spi0_rxd_mux0:spi0-rxd-mux0 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - spi0_clk_mux0:spi0-clk-mux0 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - spi0_cs0_mux0:spi0-cs0-mux0 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - spi0_cs1_mux0:spi0-cs1-mux0 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - - - spi0_txd_mux1:spi0-txd-mux1 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - spi0_rxd_mux1:spi0-rxd-mux1 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - spi0_clk_mux1:spi0-clk-mux1 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - spi0_cs0_mux1:spi0-cs0-mux1 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - spi0_cs1_mux1:spi0-cs1-mux1 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - - - spi0_txd_mux2:spi0-txd-mux2 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - spi0_rxd_mux2:spi0-rxd-mux2 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - spi0_clk_mux2:spi0-clk-mux2 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - spi0_cs0_mux2:spi0-cs0-mux2 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - }; - - gpio1_hdmi { - hdmi_cec:hdmi-cec { - rockchip,pins = ; - rockchip,pull = ; - //rockchip,drive = ; - }; - - hdmi_sda:hdmi-sda { - rockchip,pins = ; - rockchip,pull = ; - //rockchip,drive = ; - }; - - hdmi_scl:hdmi-scl { - rockchip,pins = ; - rockchip,pull = ; - //rockchip,drive = ; - }; - - hdmi_hpd:hdmi-hpd { - rockchip,pins = ; - rockchip,pull = ; - //rockchip,drive = ; - - }; - - hdmi_gpio: hdmi-gpio { - rockchip,pins = , , , ; - rockchip,pull = ; - //rockchip,drive = ; - }; - }; - - gpio1_i2s0 { - i2s0_mclk_mux0:i2s0-mclk-mux0 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - i2s0_sclk_mux0:i2s0-sclk-mux0 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - i2s0_lrckrx_mux0:i2s0-lrckrx-mux0 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - i2s0_lrcktx_mux0:i2s0-lrcktx-mux0 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - i2s0_sdo_mux0:i2s0-sdo-mux0 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - i2s0_sdi_mux0:i2s0-sdi-mux0 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - i2s0_gpio_mux0: i2s0-gpio-mux0 { - rockchip,pins = , - , - , - , - , - ; - rockchip,pull = ; - - }; - - - i2s0_mclk_mux1:i2s0-mclk-mux1 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - i2s0_sclk_mux1:i2s0-sclk-mux1 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - i2s0_lrckrx_mux1:i2s0-lrckrx-mux1 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - i2s0_lrcktx_mux1:i2s0-lrcktx-mux1 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - i2s0_sdo_mux1:i2s0-sdo-mux1 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - i2s0_sdi_mux1:i2s0-sdi-mux1 { - rockchip,pins = ; - rockchip,pull = ; - - }; - - i2s0_gpio_mux1: i2s0-gpio-mux1 { - rockchip,pins = , - , - , - , - , - ; - rockchip,pull = ; - - }; - - }; - - gpio0_spdif { - spdif_tx: spdif-tx { - rockchip,pins = ; - rockchip,pull = ; - - }; - }; - - gpio0_emmc0 { - emmc0_clk: emmc0-clk { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - emmc0_cmd_mux0: emmc0-cmd-mux0 { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - emmc0_cmd_mux1: emmc0-cmd-mux1 { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - - emmc0_bus1: emmc0-bus-width1 { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - emmc0_bus4: emmc0-bus-width4 { - rockchip,pins = , - , - , - ; - rockchip,pull = ; - - - }; - }; - - gpio1_sdmmc0 { - sdmmc0_clk: sdmmc0-clk { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - sdmmc0_cmd: sdmmc0-cmd { - rockchip,pins = ; - rockchip,pull = ; - - }; - - sdmmc0_dectn: sdmmc0-dectn{ - rockchip,pins = ; - rockchip,pull = ; - - - }; - - sdmmc0_pwren: sdmmc0-pwren{ - rockchip,pins = ; - rockchip,pull = ; - }; - - sdmmc0_bus1: sdmmc0-bus-width1 { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - sdmmc0_bus4: sdmmc0-bus-width4 { - rockchip,pins = , - , - , - ; - rockchip,pull = ; - - - }; - - sdmmc0_gpio: sdmmc0_gpio{ - rockchip,pins = - , //CMD - , //CLK - , //DET - , //PWREN - , //D0 - , //D1 - , //D2 - ; //D3 - rockchip,pull = ; - - - }; - - }; - - gpio2_nandc { - nandc_ale:nandc-ale { - rockchip,pins = ; - rockchip,pull = ; - }; - - nandc_cle:nandc-cle { - rockchip,pins = ; - rockchip,pull = ; - }; - - nandc_wrn:nandc-wrn { - rockchip,pins = ; - rockchip,pull = ; - }; - - nandc_rdn:nandc-rdn { - rockchip,pins = ; - rockchip,pull = ; - }; - - nandc_rdy:nandc-rdy { - rockchip,pins = ; - rockchip,pull = ; - }; - - nandc_cs0:nandc-cs0 { - rockchip,pins = ; - rockchip,pull = ; - }; - - - nandc_data: nandc-data { - rockchip,pins = , - , - , - , - , - , - , - ; - rockchip,pull = ; - - }; - - }; - - gpio0_sdio0 { - sdio0_pwren: sdio0_pwren { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - sdio0_cmd: sdio0_cmd { - rockchip,pins = ; - rockchip,pull = ; - }; - sdio0_clk: sdio0_clk { - rockchip,pins = ; - rockchip,pull = ; - }; - sdio0_bus1: sdio0-bus-width1 { - rockchip,pins = ; - rockchip,pull = ; - }; - sdio0_bus4: sdio0-bus-width4 { - rockchip,pins = , - , - , - ; - rockchip,pull = ; - }; - - sdio0_gpio: sdio0_gpio{ - rockchip,pins = , //pwren - , //cmd - , //clk - , //data0 - , //data1 - , //data2 - ; //data3 - rockchip,pull = ; - }; - - }; - - gpio0_pwm{ - pwm0_pin:pwm0 { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - pwm1_pin:pwm1 { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - pwm2_pin:pwm2 { - rockchip,pins = ; - rockchip,pull = ; - - - }; - - pwm3_pin:pwm3 { - rockchip,pins = ; - rockchip,pull = ; - - - }; - }; - - gpio2_gmac { - gmac_rxdv:gmac-rxdv { - rockchip,pins = ; - rockchip,pull = ; - }; - - gmac_txclk:gmac-txclk { - rockchip,pins = ; - rockchip,pull = ; - }; - - gmac_crs:gmac-crs { - rockchip,pins = ; - rockchip,pull = ; - }; - - gmac_rxclk:gmac-rxclk { - rockchip,pins = ; - rockchip,pull = ; - }; - - gmac_mdio:gmac-mdio { - rockchip,pins = ; - rockchip,pull = ; - }; - - gmac_txen:gmac-txen { - rockchip,pins = ; - rockchip,pull = ; - }; - - gmac_clk:gmac-clk { - rockchip,pins = ; - rockchip,pull = ; - }; - gmac_rxer:gmac-rxer { - rockchip,pins = ; - rockchip,pull = ; - }; - - gmac_rxd1:gmac-rxd1 { - rockchip,pins = ; - rockchip,pull = ; - }; - - gmac_rxd0:gmac-rxd0 { - rockchip,pins = ; - rockchip,pull = ; - }; - - gmac_txd1:gmac-txd1 { - rockchip,pins = ; - rockchip,pull = ; - }; - - gmac_txd0:gmac-txd0 { - rockchip,pins = ; - rockchip,pull = ; - }; - gmac_rxd3:gmac-rxd3 { - rockchip,pins = ; - rockchip,pull = ; - }; - - gmac_rxd2:gmac-rxd2 { - rockchip,pins = ; - rockchip,pull = ; - }; - - gmac_txd2:gmac-txd2 { - rockchip,pins = ; - rockchip,pull = ; - }; - - gmac_txd3:gmac-txd3 { - rockchip,pins = ; - rockchip,pull = ; - }; - - gmac_col:gmac-col { - rockchip,pins = ; - rockchip,pull = ; - }; - - gmac_col_gpio:gmac-col-gpio { - rockchip,pins = ; - rockchip,pull = ; - }; - - gmac_mdc:gmac-mdc { - rockchip,pins = ; - rockchip,pull = ; - }; - - - }; - - gpio2_lcdc0 { - lcdc0_lcdc:lcdc0-lcdc { - rockchip,pins = - , - , - , - ; - rockchip,pull = ; - }; - - lcdc0_gpio:lcdc0-gpio { - rockchip,pins = - , - , - , - ; - rockchip,pull = ; - }; - - }; - - gpio2_lcdc0_d { - lcdc0_lcdc_d: lcdc0-lcdc_d { - rockchip,pins = - , - , - , - , - , - , - , - ; - /* - , - , - , - , - , - ; - */ - rockchip,pull = ; - }; - - lcdc0_lcdc_gpio: lcdc0-lcdc_gpio { - rockchip,pins = - , - , - , - , - , - , - , - ; - /* - , - , - , - , - , - ; - */ - rockchip,pull = ; - }; - - }; - - //to add - - - }; - -}; diff --git a/arch/arm/boot/dts/rk312x-sdk.dtsi b/arch/arm/boot/dts/rk312x-sdk.dtsi deleted file mode 100644 index 880c71bd4f0f..000000000000 --- a/arch/arm/boot/dts/rk312x-sdk.dtsi +++ /dev/null @@ -1,691 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) - -/ { - fiq-debugger { - status = "okay"; - }; - - chosen { - bootargs = "vmalloc=496M rockchip_jtag"; - }; - - pwm_regulator1:pwm-regulator1 { - compatible = "rockchip_pwm_regulator"; - pwms = <&pwm1 0 25000>; - rockchip,pwm_id= <1>; - rockchip,pwm_voltage_map= <950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000 1425000 1450000>; - rockchip,pwm_voltage= <1250000>; - rockchip,pwm_min_voltage= <950000>; - rockchip,pwm_max_voltage= <1450000>; - rockchip,pwm_suspend_voltage= <1250000>; - rockchip,pwm_coefficient= <550>; - status = "disabled"; - regulators { - #address-cells = <1>; - #size-cells = <0>; - pwm_reg0: regulator@0 { - regulator-compatible = "pwm_dcdc1"; - regulator-name= "vdd_arm"; - regulator-min-microvolt = <950000>; - regulator-max-microvolt = <1450000>; - regulator-always-on; - regulator-boot-on; - }; - }; - }; - - pwm_regulator2:pwm-regulator2 { - compatible = "rockchip_pwm_regulator"; - pwms = <&pwm2 0 25000>; - rockchip,pwm_id= <2>; - rockchip,pwm_voltage_map= <950000 975000 1000000 1025000 1050000 1075000 1100000 1125000 1150000 1175000 1200000 1225000 1250000 1275000 1300000 1325000 1350000 1375000 1400000 1425000 1450000>; - rockchip,pwm_voltage= <1200000>; - rockchip,pwm_min_voltage= <950000>; - rockchip,pwm_max_voltage= <1450000>; - rockchip,pwm_suspend_voltage= <1250000>; - rockchip,pwm_coefficient= <550>; - status = "disabled"; - regulators { - #address-cells = <1>; - #size-cells = <0>; - pwm_reg1: regulator@1 { - regulator-compatible = "pwm_dcdc2"; - regulator-name= "vdd_logic"; - regulator-min-microvolt = <950000>; - regulator-max-microvolt = <1450000>; - regulator-always-on; - regulator-boot-on; - }; - }; - }; - -}; - -&nandc { - status = "okay"; // used nand set "okay" ,used emmc set "disabled" -}; - -&nandc0reg { - status = "disabled"; // used nand set "disabled" ,used emmc set "okay" -}; - -&emmc { - clock-frequency = <50000000>; - clock-freq-min-max = <400000 50000000>; - supports-highspeed; - supports-emmc; - bootpart-no-access; - supports-DDR_MODE; - ignore-pm-notify; - keep-power-in-suspend; - //poll-hw-reset - status = "okay"; -}; - -&sdmmc { - clock-frequency = <37500000>; - clock-freq-min-max = <400000 37500000>; - supports-highspeed; - supports-sd; - broken-cd; - card-detect-delay = <200>; - ignore-pm-notify; - keep-power-in-suspend; - vmmc-supply = <&rk818_ldo9_reg>; - status = "disabled"; -}; - -&sdio { - clock-frequency = <37500000>; - clock-freq-min-max = <200000 37500000>; - supports-highspeed; - supports-sdio; - ignore-pm-notify; - keep-power-in-suspend; - cap-sdio-irq; - status = "okay"; -}; - -&adc { - status = "okay"; - - key: key { - compatible = "rockchip,key"; - io-channels = <&adc 1>; - - vol-up-key { - linux,code = <115>; - label = "volume up"; - rockchip,adc_value = <523>; - }; - - vol-down-key { - linux,code = <114>; - label = "volume down"; - rockchip,adc_value = <727>; - }; - - power-key { - gpios = <&gpio0 GPIO_A5 GPIO_ACTIVE_LOW>; - linux,code = <116>; - label = "power"; - gpio-key,wakeup; - }; - - menu-key { - linux,code = <59>; - label = "menu"; - rockchip,adc_value = <1>; - }; - - home-key { - linux,code = <102>; - label = "home"; - rockchip,adc_value = <318>; - }; - - back-key { - linux,code = <158>; - label = "back"; - rockchip,adc_value = <146>; - }; - - camera-key { - linux,code = <212>; - label = "camera"; - rockchip,adc_value = <450>; - }; - }; -}; - - -&i2c0 { - status = "okay"; - rk818: rk818@1c { - reg = <0x1c>; - status = "okay"; - }; - act8931: act8931@5b { - reg = <0x5b>; - status = "okay"; - }; - rt5025: rt5025@35 { - compatible = "rt,rt5025"; - reg = <0x35>; - status = "disabled"; - }; - rt5036: rt5036@38 { - compatible = "rt,rt5036"; - reg = <0x38>; - status = "disabled"; - }; -}; - -&i2c2 { - status = "okay"; - ts@55 { - compatible = "goodix,gt8xx"; - reg = <0x55>; - touch-gpio = <&gpio1 GPIO_B0 IRQ_TYPE_LEVEL_LOW>; - reset-gpio = <&gpio2 GPIO_C1 GPIO_ACTIVE_LOW>; - //power-gpio = <&gpio0 GPIO_C5 GPIO_ACTIVE_LOW>; - max-x = <1280>; - max-y = <800>; - }; - /* - ts@01 { - compatible = "ct,vtl_ts"; - reg = <0x01>; - screen_max_x = <1280>; - screen_max_y = <800>; - irq_gpio_number = <&gpio1 GPIO_B0 IRQ_TYPE_LEVEL_LOW>; - rst_gpio_number = <&gpio2 GPIO_C1 GPIO_ACTIVE_HIGH>; - }; - */ -}; - -&fb { - rockchip,disp-mode = ; - rockchip,uboot-logo-on = <0>; -}; - - -/include/ "rt5025.dtsi" -&rt5025 { - - rt5025_dcdc1: regulator_0 { - regulator-name = "vdd_arm"; - regulator-min-microvolt = < 700000>; - regulator-max-microvolt = <1500000>; - qcom,comsumer-supplies = "vdd_arm", ""; - regulator-always-on; - regulator-boot-on; - - }; - - rt5025_dcdc2: regulator_1 { - regulator-name = "vdd_logic"; - regulator-min-microvolt = < 700000>; - regulator-max-microvolt = <1500000>; - qcom,comsumer-supplies = "vdd_logic", ""; - regulator-always-on; - regulator-boot-on; - }; - - rt5025_dcdc3: regulator_2 { - regulator-name = "rt5025-dcdc3"; - regulator-min-microvolt = < 1800000>; - regulator-max-microvolt = <3300000>; - qcom,comsumer-supplies = "rt5025-dcdc3", ""; - regulator-always-on; - regulator-boot-on; - }; - - rt5025_dcdc4: regulator_3 { - regulator-name = "rt5025-dcdc4"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - qcom,comsumer-supplies = "rt5025-dcdc4", ""; - regulator-always-on; - regulator-boot-on; - }; - - rt5025_ldo1: regulator_4 { - regulator-name = "rt5025-ldo1"; - regulator-min-microvolt = < 1800000>; - regulator-max-microvolt = <1800000>; - qcom,comsumer-supplies = "rt5025-ldo1", ""; - regulator-always-on; - regulator-boot-on; - }; - - rt5025_ldo2: regulator_5 { - regulator-name = "rt5025-ldo2"; - regulator-min-microvolt = < 1200000>; - regulator-max-microvolt = <1200000>; - qcom,comsumer-supplies = "rt5025-ldo2", ""; - regulator-always-on; - regulator-boot-on; - }; - - rt5025_ldo3: regulator_6 { - regulator-name = "rt5025-ldo3"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - qcom,comsumer-supplies = "rt5025-ldo3", ""; - regulator-always-on; - regulator-boot-on; - }; - - rt5025_ldo4: regulator_7 { - regulator-name = "rt5025-ldo4"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - qcom,comsumer-supplies = "rt5025-ldo4", ""; - regulator-always-on; - regulator-boot-on; - }; - - rt5025_ldo5: regulator_8 { - regulator-name = "rt5025-ldo5"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - qcom,comsumer-supplies = "rt5025-ldo5", ""; - regulator-always-on; - regulator-boot-on; - }; - - rt5025_ldo6: regulator_9 { - regulator-name = "rt5025-ldo6"; - regulator-min-microvolt = <330000>; - regulator-max-microvolt = <3300000>; - qcom,comsumer-supplies = "rt5025-ldo6", ""; - regulator-always-on; - regulator-boot-on; - }; - - rt5025-irq { - compatible = "rt,rt5025-irq"; - rt,irq-gpio = <&gpio1 GPIO_B1 GPIO_ACTIVE_HIGH>; - }; -}; - -/include/ "rt5036.dtsi" -&rt5036 { - - rt5036_dcdc1: regulator_0 { - regulator-name = "vdd_arm"; - regulator-min-microvolt = < 800000>; - regulator-max-microvolt = <3300000>; - qcom,comsumer-supplies = "vdd_arm", ""; - regulator-always-on; - regulator-boot-on; - rt,standby_enabled; - rt,standby_vol = <950000>; - }; - - rt5036_dcdc2: regulator_1 { - regulator-name = "vdd_logic"; - regulator-min-microvolt = < 800000>; - regulator-max-microvolt = <3300000>; - qcom,comsumer-supplies = "vdd_logic", ""; - regulator-always-on; - regulator-boot-on; - rt,standby_enabled; - rt,standby_vol = <950000>; - }; - - rt5036_dcdc3: regulator_2 { - regulator-name = "rt5036-dcdc3"; - regulator-min-microvolt = < 800000>; - regulator-max-microvolt = <3300000>; - qcom,comsumer-supplies = "rt5036-dcdc3", ""; - regulator-always-on; - regulator-boot-on; - rt,standby_enabled; - rt,standby_vol = <2800000>; - }; - - rt5036_dcdc4: regulator_3 { - regulator-name = "rt5036-dcdc4"; - regulator-min-microvolt = < 800000>; - regulator-max-microvolt = <3300000>; - qcom,comsumer-supplies = "rt5036-dcdc4", ""; - regulator-always-on; - regulator-boot-on; - rt,standby_enabled; - rt,standby_vol = <1200000>; - }; - - rt5036_ldo1: regulator_4 { - regulator-name = "rt5036-ldo1"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - qcom,comsumer-supplies = "rt5036-ldo1", ""; - regulator-always-on; - regulator-boot-on; - rt,standby_enabled; - rt,standby_vol = <1200000>; - }; - - rt5036_ldo2: regulator_5 { - regulator-name = "rt5036-ldo2"; - regulator-min-microvolt = < 1100000>; - regulator-max-microvolt = <1100000>; - qcom,comsumer-supplies = "rt5036-ldo2", ""; - regulator-always-on; - regulator-boot-on; - rt,standby_enabled; - rt,standby_vol = <1100000>; - }; - - rt5036_ldo3: regulator_6 { - regulator-name = "rt5036-ldo3"; - regulator-min-microvolt = < 1800000>; - regulator-max-microvolt = <1800000>; - qcom,comsumer-supplies = "rt5036-ldo3", ""; - regulator-always-on; - regulator-boot-on; - rt,standby_enabled; - rt,standby_vol = <1800000>; - }; - - rt5036_ldo4: regulator_7 { - regulator-name = "rt5036-ldo4"; - regulator-min-microvolt = < 1800000>; - regulator-max-microvolt = <1800000>; - qcom,comsumer-supplies = "rt5036-ldo4", ""; - regulator-always-on; - regulator-boot-on; - rt,standby_enabled; - rt,standby_vol = <1800000>; - }; - - rt5036_ldo5: regulator_8 { - regulator-name = "rt5036-ldo5"; - qcom,comsumer-supplies = "rt5036-ldo5", ""; - regulator-always-on; - regulator-boot-on; - rt,standby_enabled; - }; - - rt5036_ldo6: regulator_9 { - regulator-name = "rt5036-ldo6"; - qcom,comsumer-supplies = "rt5036-ldo6", ""; - regulator-always-on; - regulator-boot-on; - rt,standby_enabled; - }; - - rt5036-irq { - compatible = "rt,rt5036-irq"; - rt,irq-gpio = <&gpio1 GPIO_B1 GPIO_ACTIVE_HIGH>; - }; - - rt5036-charger { - compatible = "rt,rt5036-charger"; - rt,te_en; - rt,iprec = <0x2>; - rt,ieoc = <0x3>; - rt,vprec = <0xA>; - rt,batlv = <0x4>; - rt,vrechg = <1>; - rt,chg_volt = <4200>; - rt,otg_volt = <5025>; - rt,acchg_icc = <2000>; - rt,usbtachg_icc = <2000>; - rt,usbchg_icc = <900>; - /*rt,acdet_gpio = <&gpio1 GPIO_B1 GPIO_ACTIVE_HIGH>;*/ - /*rt,usbdet_gpio = <&gpio1 GPIO_B1 GPIO_ACTIVE_HIGH>;*/ - }; -}; - -/include/ "rk818.dtsi" -&rk818 { - gpios =<&gpio1 GPIO_B1 GPIO_ACTIVE_HIGH>,<&gpio1 GPIO_A1 GPIO_ACTIVE_LOW>; - rk818,system-power-controller; - rk818,support_dc_chg = <1>;/*1: dc chg; 0:usb chg*/ - - regulators { - - rk818_dcdc1_reg: regulator@0{ - regulator-name= "vdd_arm"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1500000>; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-disabled; - regulator-state-uv = <900000>; - }; - }; - - rk818_dcdc2_reg: regulator@1 { - regulator-name= "vdd_logic"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1500000>; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <900000>; - }; - }; - - rk818_dcdc3_reg: regulator@2 { - regulator-name= "rk818_dcdc3"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <1200000>; - }; - }; - - rk818_dcdc4_reg: regulator@3 { - regulator-name= "vccio"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-initial-mode = <0x2>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-mode = <0x2>; - regulator-state-enabled; - regulator-state-uv = <2800000>; - }; - }; - - rk818_ldo1_reg: regulator@4 { - regulator-name= "rk818_ldo1"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3300000>; - }; - }; - - rk818_ldo2_reg: regulator@5 { - regulator-name= "rk818_ldo2"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3000000>; - }; - }; - - rk818_ldo3_reg: regulator@6 { - regulator-name= "rk818_ldo3"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1100000>; - }; - }; - - rk818_ldo4_reg:regulator@7 { - regulator-name= "rk818_ldo4"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <2500000>; - }; - }; - - rk818_ldo5_reg: regulator@8 { - regulator-name= "rk818_ldo5"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3000000>; - }; - }; - - rk818_ldo6_reg: regulator@9 { - regulator-name= "rk818_ldo6"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1200000>; - }; - }; - - rk818_ldo7_reg: regulator@10 { - regulator-name= "rk818_ldo7"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1800000>; - }; - }; - - rk818_ldo8_reg: regulator@11 { - regulator-name= "rk818_ldo8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <1800000>; - }; - }; - rk818_ldo9_reg: regulator@12 { - regulator-name= "vcc_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-initial-state = <3>; - regulator-state-mem { - regulator-state-enabled; - regulator-state-uv = <3000000>; - }; - }; - rk818_ldo10_reg: regulator@13 { - regulator-name= "rk818_ldo10"; - regulator-state-mem { - regulator-state-disabled; - }; - }; - }; - battery { - ocv_table = <3350 3677 3693 3719 3752 3770 3775 3778 3785 3796 3812 3839 3881 3907 3933 3958 3978 4033 4087 4123 4174>; - design_capacity = <2100>; - design_qmax = <2200>; - max_overcharge = <100>; - bat_res = <80>; - max_input_currentmA = <2000>; - max_chrg_currentmA = <1800>; - max_charge_voltagemV = <4200>; - max_bat_voltagemV = <4200>; - sleep_enter_current = <300>; - sleep_exit_current = <300>; - power_off_thresd = <3400>; - chrg_diff_voltagemV = <0>; - virtual_power = <0>; - support_usb_adp = <0>; - support_dc_adp = <0>; - power_dc2otg = <0>; - }; - test-power{ - status = "okay"; - }; - -}; - -/include/ "act8931.dtsi" -&act8931 { - /* gpio: 0-irq, 1-pwr_hold */ - gpios = <&gpio2 GPIO_B1 GPIO_ACTIVE_HIGH>, <&gpio1 GPIO_A2 GPIO_ACTIVE_HIGH>; - act8931,system-power-controller; - - regulators { - - act8931_dcdc1_reg: regulator@0{ - regulator-name= "vccio"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-initial-mode = <0x2>; - }; - - act8931_dcdc2_reg: regulator@1 { - regulator-name= "act_dcdc2"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-initial-mode = <0x2>; - }; - - act8931_dcdc3_reg: regulator@2 { - regulator-name= "vdd_arm"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1500000>; - regulator-initial-mode = <0x2>; - }; - - act8931_ldo1_reg:regulator@3 { - regulator-name= "act_ldo1"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - }; - - act8931_ldo2_reg: regulator@4 { - regulator-name= "act_ldo2"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - act8931_ldo3_reg: regulator@5 { - regulator-name= "act_ldo3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - act8931_ldo4_reg: regulator@6 { - regulator-name= "act_ldo4"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - }; - -}; - -&pwm0 { - status = "okay"; -}; -