From 423cb6516491f5439980790eb31261cb0211fa93 Mon Sep 17 00:00:00 2001
From: Damon Ding <damon.ding@rock-chips.com>
Date: Wed, 9 Apr 2025 11:19:47 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3588: Add LCD module NE160QAM-NX1 eDP
 display board

The module NE160QAM-NX1 support eDP v1.4b with the following
features:

- Support resolutions 3840x2400p60 and 3840x2400p120
- 4 lanes eDP interface with 8.1Gbps link rates
- DPCD v1.4
- PSR(Panel self Refresh)
- DSC(Display Stream Compression)

Change-Id: I41361dc5500cd35234bfdc8436a50e3117c6fba2
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/Makefile         |   1 +
 .../rk3588-evb1-lp4-v10-edp-NE160QAM-NX1.dts  | 137 ++++++++++++++++++
 2 files changed, 138 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4-v10-edp-NE160QAM-NX1.dts

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 6687cd10f9c8..d966c8675cda 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -303,6 +303,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576s-tablet-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-lp4-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-lp4-v10-dsi-dsc-MV2100UZ1.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-lp4-v10-edp-8lanes-M280DCA.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-lp4-v10-edp-NE160QAM-NX1.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-lp4-v10-edp-NV140QUM-N61.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-lp4-v10-hdmi2dp.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-lp4-v10-ipc-6x-linux.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4-v10-edp-NE160QAM-NX1.dts b/arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4-v10-edp-NE160QAM-NX1.dts
new file mode 100644
index 000000000000..b548a6a3e1d3
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4-v10-edp-NE160QAM-NX1.dts
@@ -0,0 +1,137 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2025 Rockchip Electronics Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "rk3588-evb1-lp4.dtsi"
+#include "rk3588-evb1-imx415.dtsi"
+#include "rk3588-android.dtsi"
+
+/ {
+	model = "Rockchip RK3588 EVB1 LP4 V10 Board + RK Ext HDMImale to eDP V10";
+	compatible = "rockchip,rk3588-evb1-lp4-v10-edp-NE160QAM-NX1", "rockchip,rk3588";
+
+	panel-edp {
+		compatible = "simple-panel";
+		backlight = <&backlight>;
+		prepare-delay-ms = <120>;
+		enable-delay-ms = <120>;
+		unprepare-delay-ms = <120>;
+		disable-delay-ms = <120>;
+
+		display-timings {
+			native-mode = <&timing_4kp60>;
+			timing_4kp60: timing0 {
+				clock-frequency = <587520000>;
+				hactive = <3840>;
+				vactive = <2400>;
+				hfront-porch = <48>;
+				hsync-len = <32>;
+				hback-porch = <80>;
+				vfront-porch = <3>;
+				vsync-len = <5>;
+				vback-porch = <40>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+
+			timing_4kp120: timing1 {
+				clock-frequency = <1175040000>;
+				hactive = <3840>;
+				vactive = <2400>;
+				hfront-porch = <48>;
+				hsync-len = <32>;
+				hback-porch = <80>;
+				vfront-porch = <3>;
+				vsync-len = <5>;
+				vback-porch = <40>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+
+		port {
+			panel_in_edp0: endpoint {
+				remote-endpoint = <&edp0_out_panel>;
+			};
+		};
+	};
+};
+
+&bt_sco {
+	status = "okay";
+};
+
+&bt_sound {
+	status = "okay";
+};
+
+&edp0 {
+	force-hpd;
+	support-psr;
+	status = "okay";
+
+	ports {
+		port@1 {
+			reg = <1>;
+
+			edp0_out_panel: endpoint {
+				remote-endpoint = <&panel_in_edp0>;
+			};
+		};
+	};
+};
+
+&edp0_in_vp0 {
+	status = "okay";
+};
+
+&hdmi0 {
+	status = "disabled";
+};
+
+&hdmi0_in_vp0 {
+	status = "disabled";
+};
+
+&hdmi0_sound {
+	status = "disabled";
+};
+
+&hdptxphy0 {
+	status = "okay";
+};
+
+&hdptxphy_hdmi0 {
+	status = "disabled";
+};
+
+&i2s2_2ch {
+	status = "okay";
+};
+
+&route_edp0 {
+	status = "okay";
+	connect = <&vp0_out_edp0>;
+};
+
+&route_hdmi0 {
+	status = "disabled";
+};
+
+&vp0 {
+	assigned-clocks = <&cru DCLK_VOP0_SRC>;
+	assigned-clock-parents = <&cru PLL_V0PLL>;
+};
+
+&vp2 {
+	/delete-property/ assigned-clocks;
+	/delete-property/ assigned-clock-parents;
+};