From 42b3b26f7556c6ca7bc2db28105d1839261663a2 Mon Sep 17 00:00:00 2001
From: Zhang Yubing <yubing.zhang@rock-chips.com>
Date: Fri, 27 May 2022 11:28:48 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3588-nvr: support dynamic switch dclk

It need enable the hdmi phy pll clock function node when the hdmi
phy pll want be used.

For support dynamic switch dclk with hdmi phy pll, the hdmi phy pll
need config in display subsystem node.

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: I740b6154b37c1e5d9491fafd33c0b6c0c9ffd149
---
 arch/arm64/boot/dts/rockchip/rk3588-nvr.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nvr.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-nvr.dtsi
index 16b06a4bf8fc..6c1e6083a953 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-nvr.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nvr.dtsi
@@ -115,6 +115,11 @@
 	mem-supply = <&vdd_cpu_big1_mem_s0>;
 };
 
+&display_subsystem {
+	clocks = <&hdptxphy_hdmi_clk0>, <&hdptxphy_hdmi_clk1>;
+	clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
+};
+
 &gpu_opp_table {
 	/delete-node/ opp-198000000;
 	/delete-node/ opp-297000000;
@@ -130,6 +135,14 @@
 	status = "okay";
 };
 
+&hdptxphy_hdmi_clk0 {
+	status = "okay";
+};
+
+&hdptxphy_hdmi_clk1 {
+	status = "okay";
+};
+
 &iep {
 	status = "okay";
 };