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use steady frequence right now, not change anytime

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root
2010-07-23 17:00:50 +08:00
parent b92004ff57
commit 4318594d32
2 changed files with 11 additions and 6 deletions
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11
.config
View File

@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.32.9
# Thu Jul 15 03:02:03 2010
# Fri Jul 23 11:30:51 2010
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -705,6 +705,8 @@ CONFIG_INPUT_TOUCHSCREEN=y
# CONFIG_TOUCHSCREEN_AD7877 is not set
CONFIG_TOUCHSCREEN_XPT2046_SPI=y
# CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI is not set
# CONFIG_TOUCHSCREEN_XPT2046_320X480_SPI is not set
# CONFIG_TOUCHSCREEN_XPT2046_320X480_CBN_SPI is not set
# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
# CONFIG_TOUCHSCREEN_AD7879 is not set
@@ -736,6 +738,7 @@ CONFIG_INPUT_KEYCHORD=y
CONFIG_INPUT_UINPUT=y
# CONFIG_INPUT_GPIO is not set
# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
# CONFIG_G_SENSOR_DEVICE is not set
#
# Hardware I/O ports
@@ -820,6 +823,7 @@ CONFIG_SPIM_RK2818=y
#
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_TLE62X0 is not set
# CONFIG_SPI_FPGA is not set
#
# PPS support
@@ -973,6 +977,7 @@ CONFIG_DISPLAY_SUPPORT=y
#
# CONFIG_LCD_NULL is not set
CONFIG_LCD_TD043MGEA1=y
# CONFIG_LCD_HX8357 is not set
# CONFIG_LCD_TJ048NC01CA is not set
# CONFIG_LCD_HL070VM4AU is not set
# CONFIG_LCD_HSD070IDW1 is not set
@@ -1035,8 +1040,8 @@ CONFIG_SND_ROCKCHIP_SOC=y
CONFIG_SND_ROCKCHIP_SOC_I2S=y
# CONFIG_SND_ROCKCHIP_SOC_WM8988 is not set
CONFIG_SND_ROCKCHIP_SOC_WM8994=y
CONFIG_SND_CODEC_SOC_MASTER=y
# CONFIG_SND_CODEC_SOC_SLAVE is not set
# CONFIG_SND_CODEC_SOC_MASTER is not set
CONFIG_SND_CODEC_SOC_SLAVE=y
CONFIG_SND_SOC_I2C_AND_SPI=y
# CONFIG_SND_SOC_ALL_CODECS is not set
CONFIG_SND_SOC_WM8994=y

6
arch/arm/mach-rk2818/clock.c
View File

@@ -1302,15 +1302,15 @@ static struct rk2818_freq_info rk2818_freqs[] = {
// OP(720, 350, 720, 24, 1, 15, 41, 21),
// OP(672, 350, 672, 24, 1, 14, 41, 21),
// OP(624, 350, 624, 24, 1, 13, 41, 21),
// OP(600, 350, 600, 24, 1, 12, 41, 21),
OP(600, 350, 600, 24, 1, 12, 41, 21),
// OP(576, 350, 576, 24, 1, 12, 41, 21),
OP(528, 350, 528, 24, 1, 11, 41, 21),
// OP(528, 350, 528, 24, 1, 11, 41, 21),
// OP(480, 350, 480, 24, 1, 10, 41, 21),
// OP(450, 350, 432, 24, 1, 9, 31, 21),
// OP(432, 350, 432, 24, 1, 9, 31, 21),
// OP(384, 350, 384, 24, 1, 8, 31, 21),
// OP(336, 350, 336, 24, 1, 7, 31, 21),
OP(288, 350, 288, 24, 1, 6, 41, 21),
// OP(288, 350, 288, 24, 1, 6, 41, 21),
};
/* CPU_APB_REG5 */