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drm/i915/display: add intel_fdi_link_train wrapper.

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This wraps the fdi link training vfunc to make it clearer.

Suggested by Jani.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1bb978bcb6f16fbdaf08f2800a179b774525b59e.1632869550.git.jani.nikula@intel.com
This commit is contained in:
Dave Airlie
2021-09-29 01:57:50 +03:00
committed by Jani Nikula
parent 44892ffafa
commit 4360a2b54f
3 changed files with 11 additions and 1 deletions
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2
drivers/gpu/drm/i915/display/intel_display.c
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@@ -2165,7 +2165,7 @@ static void ilk_pch_enable(const struct intel_atomic_state *state,
assert_pch_transcoder_disabled(dev_priv, pipe);
/* For PCH output, training FDI link */
dev_priv->display.fdi_link_train(crtc, crtc_state);
intel_fdi_link_train(crtc, crtc_state);
/* We need to program the right clock selection before writing the pixel
* mutliplier into the DPLL. */

8
drivers/gpu/drm/i915/display/intel_fdi.c
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@@ -10,6 +10,14 @@
#include "intel_fdi.h"
#include "intel_sideband.h"
void intel_fdi_link_train(struct intel_crtc *crtc,
const struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
dev_priv->display.fdi_link_train(crtc, crtc_state);
}
/* units of 100MHz */
static int pipe_required_fdi_lanes(struct intel_crtc_state *crtc_state)
{

2
drivers/gpu/drm/i915/display/intel_fdi.h
View File

@@ -26,4 +26,6 @@ void hsw_fdi_link_train(struct intel_encoder *encoder,
void intel_fdi_pll_freq_update(struct drm_i915_private *i915);
void lpt_fdi_program_mphy(struct drm_i915_private *i915);
void intel_fdi_link_train(struct intel_crtc *crtc,
const struct intel_crtc_state *crtc_state);
#endif