From 44822b10317558fc14d41962a7781d4267cd1592 Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Thu, 22 Mar 2018 22:22:41 +0800 Subject: [PATCH] clk: rockchip: rk3399: Fix clk_cifout and clk_cifout_src Change-Id: I1480615b8f8cfaab2b318e6b8438ead2232a238d Signed-off-by: Finley Xiao --- drivers/clk/rockchip/clk-rk3399.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c index c6d65bf067f7..8a31d5523475 100644 --- a/drivers/clk/rockchip/clk-rk3399.c +++ b/drivers/clk/rockchip/clk-rk3399.c @@ -1361,12 +1361,12 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = { RK3399_CLKGATE_CON(27), 6, GFLAGS), /* cif */ - COMPOSITE_NODIV(0, "clk_cifout_src", mux_pll_src_cpll_gpll_npll_p, 0, - RK3399_CLKSEL_CON(56), 6, 2, MFLAGS, + COMPOSITE(0, "clk_cifout_src", mux_pll_src_cpll_gpll_npll_p, 0, + RK3399_CLKSEL_CON(56), 6, 2, MFLAGS, 0, 5, DFLAGS, RK3399_CLKGATE_CON(10), 7, GFLAGS), - COMPOSITE_NOGATE(SCLK_CIF_OUT, "clk_cifout", mux_clk_cif_p, 0, - RK3399_CLKSEL_CON(56), 5, 1, MFLAGS, 0, 5, DFLAGS), + MUX(SCLK_CIF_OUT, "clk_cifout", mux_clk_cif_p, CLK_SET_RATE_PARENT, + RK3399_CLKSEL_CON(56), 5, 1, MFLAGS), /* gic */ COMPOSITE(ACLK_GIC_PRE, "aclk_gic_pre", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,