From 44a8de7d98120bc2dff41444ab4c54dafb779a2d Mon Sep 17 00:00:00 2001 From: Liang Chen Date: Sat, 12 Apr 2025 11:22:24 +0800 Subject: [PATCH] clk: rockchip: clk-pvtpll: calibrate pvtpll init frequency of enc/aiisp for rv1126b Change-Id: I1da682ade0ce83d8fdebb769368512f54edbb188 Signed-off-by: Liang Chen --- drivers/clk/rockchip/clk-pvtpll.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/clk/rockchip/clk-pvtpll.c b/drivers/clk/rockchip/clk-pvtpll.c index d340623a8c3b..8fb1136757e6 100644 --- a/drivers/clk/rockchip/clk-pvtpll.c +++ b/drivers/clk/rockchip/clk-pvtpll.c @@ -147,7 +147,7 @@ static struct pvtpll_table rv1103b_npu_pvtpll_table[] = { static struct pvtpll_table rv1126b_aisp_pvtpll_table[] = { /* rate_hz, ring_se, length */ - ROCKCHIP_PVTPLL(775000000, 0, 28), + ROCKCHIP_PVTPLL(775000000, 0, 8), }; static struct pvtpll_table rv1126b_core_pvtpll_table[] = { @@ -163,7 +163,7 @@ static struct pvtpll_table rv1126b_core_pvtpll_table[] = { static struct pvtpll_table rv1126b_enc_pvtpll_table[] = { /* rate_hz, ring_se, length */ - ROCKCHIP_PVTPLL(550000000, 0, 110), + ROCKCHIP_PVTPLL(550000000, 0, 72), }; static struct pvtpll_table rv1126b_npu_pvtpll_table[] = { @@ -648,6 +648,9 @@ static const struct rockchip_clock_pvtpll_info rv1126b_aisp_pvtpll_data = { .config = rv1103b_pvtpll_configs, .table_size = ARRAY_SIZE(rv1126b_aisp_pvtpll_table), .table = rv1126b_aisp_pvtpll_table, + .calibrate_length_step = 4, + .calibrate_freq_per_step = 20, + .pvtpll_calibrate = rv1103b_pvtpll_calibrate, }; static const struct rockchip_clock_pvtpll_info rv1126b_core_pvtpll_data = { @@ -662,6 +665,9 @@ static const struct rockchip_clock_pvtpll_info rv1126b_enc_pvtpll_data = { .config = rv1103b_pvtpll_configs, .table_size = ARRAY_SIZE(rv1126b_enc_pvtpll_table), .table = rv1126b_enc_pvtpll_table, + .calibrate_length_step = 8, + .calibrate_freq_per_step = 20, + .pvtpll_calibrate = rv1103b_pvtpll_calibrate, }; static const struct rockchip_clock_pvtpll_info rv1126b_npu_pvtpll_data = {