From 4520fd6283aa6199d92bcad51156080b83d502b1 Mon Sep 17 00:00:00 2001
From: Zhen Chen <chenzhen@rock-chips.com>
Date: Mon, 1 Nov 2021 20:25:17 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3588s: add GPU dts node

Signed-off-by: Zhen Chen <chenzhen@rock-chips.com>
Change-Id: Ifc8a1a95f5f0fd69e8a3013bb1c7f0deafd2133e
---
 arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 53c49573ae6b..06e919542322 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -292,6 +292,21 @@
 		};
 	};
 
+	gpu: gpu@fb000000 {
+		compatible = "arm,mali-bifrost";
+		reg = <0x0 0xfb000000 0x0 0x80000>;
+		interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "GPU", "MMU", "JOB";
+
+		clocks = <&cru CLK_GPU_COREGROUP>, <&cru CLK_GPU_STACKS>, <&cru CLK_GPU>;
+		clock-names = "clk_gpu_coregroup", "clk_gpu_stacks", "clk_gpu";
+		power-domains = <&power RK3588_PD_GPU>;
+
+		status = "disabled";
+	};
+
 	usbdrd3_0: usbdrd3_0 {
 		compatible = "rockchip,rk3588-dwc3", "rockchip,rk3399-dwc3";
 		clocks = <&cru REF_CLK_USB3OTG0>, <&cru SUSPEND_CLK_USB3OTG0>,