From e0e0124cd92d74e6a3f8fc72a79baab0bba333c6 Mon Sep 17 00:00:00 2001
From: Zhaoyifeng <zyf@rock-chips.com>
Date: Sat, 12 Jul 2014 09:42:18 +0800
Subject: [PATCH 1/3] nand driver: enable nand config in dts.

---
 arch/arm/boot/dts/rk3036-sdk.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/rk3036-sdk.dts b/arch/arm/boot/dts/rk3036-sdk.dts
index 6a64e8cb879a..20f6df47752e 100755
--- a/arch/arm/boot/dts/rk3036-sdk.dts
+++ b/arch/arm/boot/dts/rk3036-sdk.dts
@@ -85,7 +85,7 @@
 };
 
 &nandc {
-	status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
+	status = "okay"; // used nand set "disabled" ,used emmc set "okay"
 };  
 
 &emmc {

From 3543ddb737056f638ab8be394c32a3266f01f0c3 Mon Sep 17 00:00:00 2001
From: Zhaoyifeng <zyf@rock-chips.com>
Date: Sat, 12 Jul 2014 10:09:58 +0800
Subject: [PATCH 2/3]     nand driver:     add nand reg config for emmc read sn
 and verdor info.

---
 arch/arm/boot/dts/rk3036-sdk.dts | 6 +++++-
 arch/arm/boot/dts/rk3036.dtsi    | 5 +++++
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/rk3036-sdk.dts b/arch/arm/boot/dts/rk3036-sdk.dts
index 20f6df47752e..cf9eb8e0f38c 100755
--- a/arch/arm/boot/dts/rk3036-sdk.dts
+++ b/arch/arm/boot/dts/rk3036-sdk.dts
@@ -85,9 +85,13 @@
 };
 
 &nandc {
-	status = "okay"; // used nand set "disabled" ,used emmc set "okay"
+	status = "okay"; // used nand set "okay" ,used emmc set "disabled"
 };  
 
+&nandc0reg {
+	status = "disabled"; // used nand set "disabled" ,used emmc set "okay"
+};
+
 &emmc {
 	clock-frequency = <100000000>;
 	clock-freq-min-max = <400000 100000000>;
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index ab609658bd3b..851d2060bc20 100755
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -107,6 +107,11 @@
 		clocks = <&clk_nandc>, <&clk_gates5 9>, <&clk_gates10 4>;
 		clock-names = "clk_nandc", "g_clk_nandc", "hclk_nandc";
 	};
+	
+	nandc0reg: nandc0@10500000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x10500000 0x4000>;
+	};
 
 	spi0: spi@20074000 {
 		compatible = "rockchip,rockchip-spi";

From 2a5ade78e8b3b91be337eee25f3fe33171332fbc Mon Sep 17 00:00:00 2001
From: luowei <lw@rock-chips.com>
Date: Sat, 12 Jul 2014 10:16:30 +0800
Subject: [PATCH 3/3] pinctrl:add dts definition for nandc

---
 arch/arm/boot/dts/rk3036-pinctrl.dtsi | 47 +++++++++++++++++++++++++++
 arch/arm/boot/dts/rk3036.dtsi         |  2 ++
 2 files changed, 49 insertions(+)

diff --git a/arch/arm/boot/dts/rk3036-pinctrl.dtsi b/arch/arm/boot/dts/rk3036-pinctrl.dtsi
index 55249f0a73c8..d5225b100b8a 100755
--- a/arch/arm/boot/dts/rk3036-pinctrl.dtsi
+++ b/arch/arm/boot/dts/rk3036-pinctrl.dtsi
@@ -415,6 +415,53 @@
 
 		};
 
+		gpio1_nandc {
+			nandc_ale:nandc-ale {
+				rockchip,pins = <NAND_ALE>;
+				rockchip,pull = <VALUE_PULL_DEFAULT>;
+			};
+
+			nandc_cle:nandc-cle {
+				rockchip,pins = <NAND_CLE>;
+				rockchip,pull = <VALUE_PULL_DEFAULT>;
+			};
+
+			nandc_wrn:nandc-wrn {
+				rockchip,pins = <NAND_WRN>;
+				rockchip,pull = <VALUE_PULL_DEFAULT>;
+			};
+
+			nandc_rdn:nandc-rdn {
+				rockchip,pins = <NAND_RDN>;
+				rockchip,pull = <VALUE_PULL_DEFAULT>;
+			};
+
+			nandc_rdy:nandc-rdy {
+				rockchip,pins = <NAND_RDY>;
+				rockchip,pull = <VALUE_PULL_DEFAULT>;
+			};
+
+			nandc_cs0:nandc-cs0 {
+				rockchip,pins = <NAND_CS0>;
+				rockchip,pull = <VALUE_PULL_DEFAULT>;
+			};
+
+
+			nandc_data: nandc-data {
+				rockchip,pins = <NAND_D0>,
+						<NAND_D1>,
+						<NAND_D2>,
+						<NAND_D3>,
+						<NAND_D4>,
+						<NAND_D5>,
+						<NAND_D6>,
+						<NAND_D7>;
+				rockchip,pull = <VALUE_PULL_DEFAULT>;	
+
+			};
+
+		};
+
 		gpio0_sdio0 {
 			sdio0_clk: sdio0_clk {
 				rockchip,pins = <MMC1_CLKOUT>;
diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 851d2060bc20..69bb9781e908 100755
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -103,6 +103,8 @@
 		compatible = "rockchip,rk-nandc";
 		reg = <0x10500000 0x4000>;
 		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+		//pinctrl-names = "default";
+		//pinctrl-0 = <&nandc_ale &nandc_cle &nandc_wrn &nandc_rdn &nandc_rdy &nandc_cs0 &nandc_data>;
 		nandc_id = <0>;
 		clocks = <&clk_nandc>, <&clk_gates5 9>, <&clk_gates10 4>;
 		clock-names = "clk_nandc", "g_clk_nandc", "hclk_nandc";