From 45845922e5fd425a95ae69ce7599d365a1bdcefe Mon Sep 17 00:00:00 2001 From: "shaochan.liu" Date: Thu, 28 Mar 2019 20:10:48 +0800 Subject: [PATCH] lcd: add lcd_driver support for tm2 [2/2] PD#SWPL-6398 Problem: add lcd_driver support Solution: add lcd_chip_tm2 and panel.dtsi Verify: ab301 Change-Id: I3cb5b67826ea2612e69b206168497771d5ced4b2 Signed-off-by: shaochan.liu Conflicts: MAINTAINERS arch/arm64/boot/dts/amlogic/tm2_t962x3_ab301.dts drivers/amlogic/media/vout/lcd/lcd_debug.c drivers/amlogic/media/vout/lcd/lcd_phy_config.c drivers/amlogic/media/vout/lcd/lcd_tablet/lcd_drv.c drivers/amlogic/media/vout/lcd/lcd_tcon.c drivers/amlogic/media/vout/lcd/lcd_tv/lcd_drv.c --- MAINTAINERS | 12 +- .../amlogic/mesontm2_t962x3_ab301-panel.dtsi | 1066 +++++++++++++++++ .../amlogic/mesontm2_t962x3_ab309-panel.dtsi | 589 +++++++++ .../arm/boot/dts/amlogic/tm2_t962x3_ab301.dts | 5 + .../arm/boot/dts/amlogic/tm2_t962x3_ab309.dts | 1 + .../amlogic/mesontm2_t962x3_ab301-panel.dtsi | 1066 +++++++++++++++++ .../amlogic/mesontm2_t962x3_ab309-panel.dtsi | 589 +++++++++ .../boot/dts/amlogic/tm2_t962x3_ab301.dts | 22 + .../boot/dts/amlogic/tm2_t962x3_ab309.dts | 3 +- drivers/amlogic/media/vout/backlight/aml_bl.c | 10 + .../media/vout/backlight/aml_ldim/ldim_drv.c | 1 + .../amlogic/media/vout/lcd/lcd_clk_config.c | 1 + drivers/amlogic/media/vout/lcd/lcd_debug.c | 30 + .../amlogic/media/vout/lcd/lcd_phy_config.c | 566 +++++++++ .../media/vout/lcd/lcd_tablet/lcd_drv.c | 84 +- drivers/amlogic/media/vout/lcd/lcd_tcon.c | 2 +- .../amlogic/media/vout/lcd/lcd_tv/lcd_drv.c | 19 +- drivers/amlogic/media/vout/lcd/lcd_vout.c | 10 + include/linux/amlogic/media/vout/lcd/aml_bl.h | 1 + .../linux/amlogic/media/vout/lcd/lcd_vout.h | 1 + 20 files changed, 4058 insertions(+), 20 deletions(-) create mode 100644 arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi create mode 100644 arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi create mode 100644 arch/arm64/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi create mode 100644 arch/arm64/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi create mode 100644 drivers/amlogic/media/vout/lcd/lcd_phy_config.c diff --git a/MAINTAINERS b/MAINTAINERS index b00b95ef06db..5fcd9917cdf1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14834,10 +14834,16 @@ M: Qianggui Song F: drivers/amlogic/pinctrl/pinctrl-meson-tm2.c F: include/dt-bindings/gpio/meson-tm2-gpio.h +AMLOGIC MESON TM2 CLOCK DRIVER +M: Jian Hu +F: driver/amlogic/clk/tm2/* -AMLOGIC TL1 VAD -M: Wenbiao Zhang -F: include/linux/amlogic/vad_api.h +AMLOGIC MESON TM2 LCD DTS +M: Shaochan Liu +F: arch/arm64/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi +F: arch/arm64/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi +F: arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi +F: arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi AMLOGIC SM1 S905X3 DTS M: Xiaoliang Wang diff --git a/arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi b/arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi new file mode 100644 index 000000000000..e190a8a91098 --- /dev/null +++ b/arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi @@ -0,0 +1,1066 @@ +/* + * arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi + * + * Copyright (C) 2016 Amlogic, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +/ { + lcd { + compatible = "amlogic, lcd-tm2"; + status = "okay"; + mode = "tv"; + fr_auto_policy = <1>; /* 0=disable, 1=60/50hz, 2=60/50/48hz */ + key_valid = <0>; + clocks = <&clkc CLKID_VCLK2_ENCL + &clkc CLKID_VCLK2_VENCL + &clkc CLKID_TCON + &clkc CLKID_FCLK_DIV5 + &clkc CLKID_TCON_PLL_COMP>; + clock-names = "encl_top_gate", + "encl_int_gate", + "tcon_gate", + "fclk_div5", + "clk_tcon"; + reg = <0xff660000 0x8100 + 0xff634400 0x300>; + interrupts = <0 3 1 + 0 78 1 + 0 88 1>; + interrupt-names = "vsync","vbyone","tcon"; + pinctrl-names = "vbyone","vbyone_off","tcon","tcon_off"; + pinctrl-0 = <&lcd_vbyone_pins>; + pinctrl-1 = <&lcd_vbyone_off_pins>; + pinctrl-2 = <&lcd_tcon_pins>; + pinctrl-3 = <&lcd_tcon_off_pins>; + pinctrl_version = <2>; /* for uboot */ + memory-region = <&lcd_tcon_reserved>; + + /* power type:(0=cpu_gpio, 2=signal, 3=extern, 0xff=ending) */ + /* power index:(gpios_index, or extern_index, 0xff=invalid) */ + /* power value:(0=output low, 1=output high, 2=input) */ + /* power delay:(unit in ms) */ + lcd_cpu-gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH + &gpio GPIOH_2 GPIO_ACTIVE_HIGH + &gpio GPIOH_3 GPIO_ACTIVE_HIGH + &gpio GPIOH_12 GPIO_ACTIVE_HIGH + &gpio GPIOH_8 GPIO_ACTIVE_HIGH + &gpio GPIOH_10 GPIO_ACTIVE_HIGH + &gpio GPIOH_11 GPIO_ACTIVE_HIGH + &gpio GPIOH_14 GPIO_ACTIVE_HIGH>; + lcd_cpu_gpio_names = "GPIOAO_4","GPIOH_2","GPIOH_3","GPIOH_12", + "GPIOH_8","GPIOH_10","GPIOH_11","GPIOH_14"; + + lvds_0{ + model_name = "1080p-vfreq"; + interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2060 2650 /*h_period_min,max*/ + 1100 1480 /*v_period_min,max*/ + 120000000 160000000>; /*pclk_min,max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 15 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + lvds_attr = < + 1 /*lvds_repack*/ + 1 /*dual_port*/ + 0 /*pn_swap*/ + 0 /*port_swap*/ + 0>; /*lane_reverse*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 0 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0>; + }; + + lvds_1{ + model_name = "1080p-hfreq_hdmi"; + interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2080 2720 /*h_period min, max*/ + 1100 1380 /*v_period min, max*/ + 133940000 156000000>; /*pclk_min, max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 4 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level */ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + lvds_attr = < + 1 /*lvds_repack*/ + 1 /*dual_port*/ + 0 /*pn_swap*/ + 0 /*port_swap*/ + 0>; /*lane_reverse*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 0 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0>; + }; + lvds_2{ + model_name = "768p-vfreq"; + interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 1366 768 /*h_active, v_active*/ + 1560 806 /*h_period, v_period*/ + 8 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 1460 2000 /*h_period_min, max */ + 784 1015 /*v_period_min, max */ + 50000000 85000000>; /*pclk_min, max*/ + lcd_timing = < + 56 64 0 /*hs_width, hs_bp, hs_pol*/ + 3 28 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 15 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + lvds_attr = < + 1 /*lvds_repack*/ + 0 /*dual_port*/ + 0 /*pn_swap*/ + 0 /*port_swap*/ + 0>; /*lane_reverse*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 0 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0>; + }; + vbyone_0{ + model_name = "public_2region"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 33 477 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 2 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable */ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = <0 0 1 50 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = <2 0 0 10 /*signal disable*/ + 0 0 0 200 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <2>; + }; + vbyone_1{ + model_name = "public_1region"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min, max*/ + 2200 2790 /*v_period_min, max*/ + 552000000 632000000>; /*pclk_min,max*/ + lcd_timing = < + 33 477 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 1 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable*/ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 50 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 200 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <2>; + }; + vbyone_2{ + model_name = "public_2region_hdmi"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*v_period_min, max*/ + lcd_timing = < + 33 477 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 4 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 2 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable*/ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 50 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 200 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <2>; + }; + vbyone_3{ + model_name = "BOE_HV550QU2"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 560000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 33 477 1 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 2 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable*/ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 0 3 0 10 /*3d_disable*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 3 2 0 /*3d_disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <2>; + }; + vbyone_4{ + model_name = "BOE_HV550QU2_1region"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min,max*/ + 2200 2760 /*v_period_min,max*/ + 560000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 33 477 1 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 1 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable*/ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 0 3 0 10 /*3d_disable*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 3 2 0 /*3d_disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <2>; + }; + p2p_0{ + model_name = "p2p_ceds"; + interface = "p2p"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 5000 2250 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 5100 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 16 29 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + p2p_attr = < + 0x0 /* p2p_teyp: + * 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi, + * 0x10=chpi, 0x11=cspi, 0x12=usit + */ + 12 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 3 2 0 200 /* extern init voltage */ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + p2p_1{ + model_name = "p2p_ceds"; + interface = "p2p"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 5000 2250 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 5100 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 16 29 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + p2p_attr = < + 0x0 /* p2p_teyp: + * 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi, + * 0x10=chpi, 0x11=cspi, 0x12=usit + */ + 6 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + p2p_2{ + model_name = "p2p_chpi"; + interface = "p2p"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 5100 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 16 29 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + p2p_attr = < + 0x10 /* p2p_teyp: + * 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi, + * 0x10=chpi, 0x11=cspi, 0x12=usit + */ + 6 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + p2p_3{ + model_name = "p2p_chpi"; + interface = "p2p"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 5100 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 16 29 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + p2p_attr = < + 0x10 /* p2p_teyp: + * 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi, + * 0x10=chpi, 0x11=cspi, 0x12=usit + */ + 12 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_0{ + model_name = "mlvds_1080p"; + interface = "minilvds"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2080 2720 /*h_period_min, max*/ + 2200 1125 /*v_period_min, max*/ + 133940000 156000000>; /*pclk_min, max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0x660 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_1{ + model_name = "mlvds_768p"; + interface = "minilvds";/*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1366 768 /*h_active, v_active*/ + 1560 806 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 1460 2000 /*h_period_min, max*/ + 784 1015 /*v_period_min, max*/ + 50000000 85000000>; /*pclk_min, max*/ + lcd_timing = < + 56 64 0 /*hs_width, hs_bp, hs_pol*/ + 3 28 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0x660 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + }; + + lcd_extern{ + compatible = "amlogic, lcd_extern"; + status = "okay"; + key_valid = <0>; + i2c_bus = "i2c_bus_1"; + + extern_0{ + index = <0>; + extern_name = "ext_default"; + status = "disabled"; + type = <0>; /*0=i2c, 1=spi, 2=mipi*/ + i2c_address = <0x1c>; /*7bit i2c_addr*/ + i2c_address2 = <0xff>; + cmd_size = <0xff>; /*dynamic cmd_size*/ + + /* init on/off: + * fixed cmd_size: (type, value...); + * cmd_size include all data. + * dynamic cmd_size: (type, cmd_size, value...); + * cmd_size include value. + */ + /* type: 0x00=cmd with delay(bit[3:0]=1 for address2), + * 0xc0=cmd(bit[3:0]=1 for address2), + * 0xf0=gpio, + * 0xfd=delay, + * 0xff=ending + */ + /* value: i2c or spi cmd, or gpio index & level */ + /* delay: unit ms */ + init_on = < + 0xc0 7 0x20 0x01 0x02 0x00 0x40 0xFF 0x00 + 0xc0 7 0x80 0x02 0x00 0x40 0x62 0x51 0x73 + 0xc0 7 0x61 0x06 0x00 0x00 0x00 0x00 0x00 + 0xc0 7 0xC1 0x05 0x0F 0x00 0x08 0x70 0x00 + 0xc0 7 0x13 0x01 0x00 0x00 0x00 0x00 0x00 + 0xc0 7 0x3D 0x02 0x01 0x00 0x00 0x00 0x00 + 0xc0 7 0xED 0x0D 0x01 0x00 0x00 0x00 0x00 + 0xc0 7 0x23 0x02 0x00 0x00 0x00 0x00 0x00 + 0xfd 1 10 /* delay 10ms */ + 0xff 0>; /*ending*/ + init_off = <0xff 0>; /*ending*/ + }; + extern_1{ + index = <1>; + extern_name = "i2c_T5800Q"; + status = "disabled"; + type = <0>; /* 0=i2c, 1=spi, 2=mipi */ + i2c_address = <0x1c>; /* 7bit i2c address */ + }; + extern_2{ + index = <2>; + extern_name = "i2c_ANX6862_7911"; + status = "okay"; + type = <0>; /* 0=i2c, 1=spi, 2=mipi */ + i2c_address = <0x20>; /* 7bit i2c address */ + i2c_address2 = <0x74>; /* 7bit i2c address */ + cmd_size = <0xff>; + + init_on = < + 0xc0 2 0x01 0x2b + 0xc0 2 0x02 0x05 + 0xc0 2 0x03 0x00 + 0xc0 2 0x04 0x00 + 0xc0 2 0x05 0x0c + 0xc0 2 0x06 0x04 + 0xc0 2 0x07 0x21 + 0xc0 2 0x08 0x0f + 0xc0 2 0x09 0x04 + 0xc0 2 0x0a 0x00 + 0xc0 2 0x0b 0x04 + 0xc0 2 0xff 0x00 + 0xfd 1 100 /* delay 100ms */ + + 0xc1 2 0x01 0xca + 0xc1 2 0x02 0x3b + 0xc1 2 0x03 0x33 + 0xc1 2 0x04 0x05 + 0xc1 2 0x05 0x2c + 0xc1 2 0x06 0xf2 + 0xc1 2 0x07 0x9c + 0xc1 2 0x08 0x1b + 0xc1 2 0x09 0x82 + 0xc1 2 0x0a 0x3d + 0xc1 2 0x0b 0x20 + 0xc1 2 0x0c 0x11 + 0xc1 2 0x0d 0xc4 + 0xc1 2 0x0e 0x1a + 0xc1 2 0x0f 0x31 + 0xc1 2 0x10 0x4c + 0xc1 2 0x11 0x12 + 0xc1 2 0x12 0x90 + 0xc1 2 0x13 0xf7 + 0xc1 2 0x14 0x0c + 0xc1 2 0x15 0x20 + 0xc1 2 0x16 0x13 + 0xff 0>; /*ending*/ + init_off = <0xff 0>; /*ending*/ + }; + }; + + backlight{ + compatible = "amlogic, backlight-tm2"; + status = "okay"; + key_valid = <0>; + pinctrl-names = "pwm_on","pwm_vs_on", + "pwm_combo_0_1_on", + "pwm_combo_0_vs_1_on", + "pwm_combo_0_1_vs_on", + "pwm_off", + "pwm_combo_off"; + pinctrl-0 = <&pwm_c_pins3>; + pinctrl-1 = <&bl_pwm_vs_on_pins>; + pinctrl-2 = <&pwm_c_pins3 &pwm_d_pins2>; + pinctrl-3 = <&bl_pwm_combo_0_vs_on_pins &pwm_d_pins2>; + pinctrl-4 = <&pwm_c_pins3 &bl_pwm_combo_1_vs_on_pins>; + pinctrl-5 = <&bl_pwm_off_pins>; + pinctrl-6 = <&bl_pwm_combo_off_pins>; + pinctrl_version = <2>; /* for uboot */ + interrupts = <0 3 1>; + interrupt-names = "ldim_vsync"; + bl_pwm_config = <&bl_pwm_conf>; + + /* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/ + /* power index:(point gpios_index, 0xff=invalid) */ + /* power value:(0=output low, 1=output high, 2=input) */ + /* power delay:(unit in ms) */ + bl-gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH + &gpio GPIOZ_5 GPIO_ACTIVE_HIGH + &gpio GPIOZ_6 GPIO_ACTIVE_HIGH>; + bl_gpio_names = "GPIOAO_11","GPIOZ_5","GPIOZ_6"; + + backlight_0{ + index = <0>; + bl_name = "backlight_pwm"; + bl_level_default_uboot_kernel = <100 100>; + bl_level_attr = <255 10 /*max, min*/ + 128 128>; /*mid, mid_mapping*/ + bl_ctrl_method = <1>; /*1=pwm,2=pwm_combo,3=ldim*/ + bl_power_attr = <0 /*en_gpio_index*/ + 1 0 /*on_value, off_value*/ + 200 200>; /*on_delay(ms), off_delay(ms)*/ + bl_pwm_port = "PWM_C"; + bl_pwm_attr = <1 /*pwm_method(0=negative, 1=positvie)*/ + 180 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 100 25>; /*duty_max(%), duty_min(%)*/ + bl_pwm_power = <1 0 /*pwm_gpio_index, pwm_gpio_off*/ + 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/ + bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */ + }; + backlight_1{ + index = <1>; + bl_name = "backlight_pwm_vs"; + bl_level_default_uboot_kernel = <100 100>; + bl_level_attr = <255 10 /*max, min*/ + 128 128>; /*mid, mid_mapping*/ + bl_ctrl_method = <1>; /*1=pwm,2=pwm_combo,3=ldim*/ + bl_power_attr = <0 /*en_gpio_index*/ + 1 0 /*on_value, off_value*/ + 200 200>; /* on_delay(ms), off_delay(ms)*/ + bl_pwm_port = "PWM_VS"; + bl_pwm_attr = <1 /*pwm_method(0=negative, 1=positvie)*/ + 2 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 100 25>; /*duty_max(%), duty_min(%)*/ + bl_pwm_power = <1 0 /*pwm_gpio_index, pwm_gpio_off*/ + 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/ + bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */ + }; + backlight_2{ + index = <2>; + bl_name = "backlight_pwm_combo"; + bl_level_default_uboot_kernel = <31 100>; + bl_level_attr = <255 10 /*max, min*/ + 128 128>; /*mid, mid_mapping*/ + bl_ctrl_method = <2>; /*1=pwm,2=pwm_combo,3=ldim*/ + bl_power_attr = <0 /*en_gpio_index*/ + 1 0 /*on_value, off_value*/ + 410 110>; /*on_delay(ms), off_delay(ms)*/ + bl_pwm_combo_level_mapping = <255 10 /*pwm_0 range*/ + 0 0>; /*pwm_1 range*/ + bl_pwm_combo_port = "PWM_C","PWM_D"; + bl_pwm_combo_attr = <1 /*pwm0 method*/ + 180 /*pwm0 freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 100 25 /*pwm0 duty_max(%), duty_min(%)*/ + 1 /*pwm1 method*/ + 18000 /*pwm1 freq(pwm:Hz, pwm_vs:multi of vs)*/ + 80 80>; /*pwm1 duty_max(%), duty_min(%)*/ + bl_pwm_combo_power = <1 0 /*pwm0 gpio_index, gpio_off*/ + 2 0 /*pwm1 gpio_index, gpio_off*/ + 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/ + }; + backlight_3{ + index = <3>; + bl_name = "pwm_combo_ldim_test"; + bl_level_default_uboot_kernel = <31 100>; + bl_level_attr = <255 10 /*max, min*/ + 128 128>; /*mid, mid_mapping*/ + bl_ctrl_method = <2>; /*1=pwm,2=pwm_combo,3=ldim*/ + bl_power_attr = <0 /*en_gpio_index*/ + 1 0 /*on_value, off_value*/ + 410 110>; /*on_delay(ms), off_delay(ms)*/ + bl_pwm_combo_level_mapping = <255 10 /*pwm_0 range*/ + 0 0>; /*pwm_1 range*/ + bl_pwm_combo_port = "PWM_C","PWM_D"; + bl_pwm_combo_attr = <1 /*pwm0 method*/ + 180 /*pwm0 freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 100 25 /*pwm0 duty_max(%), duty_min(%)*/ + 1 /*pwm1 method*/ + 18000 /*pwm1 freq(pwm:Hz, pwm_vs:multi of vs)*/ + 80 80>; /*pwm1 duty_max(%), duty_min(%)*/ + bl_pwm_combo_power = <1 0 /*pwm0 gpio_index, gpio_off*/ + 2 0 /*pwm1 gpio_index, gpio_off*/ + 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/ + bl_ldim_region_row_col = <2 10>; + }; + backlight_4{ + index = <4>; + bl_name = "ldim_global"; + bl_level_default_uboot_kernel = <100 100>; + bl_level_attr = <255 10 /*max, min*/ + 128 128>; /*mid, mid_mapping*/ + bl_ctrl_method = <3>; /*1=pwm,2=pwm_combo,3=ldim*/ + bl_power_attr = <0xff /*en_gpio_index*/ + 1 0 /*on_value, off_value*/ + 200 200>; /*on_delay(ms), off_delay(ms)*/ + bl_ldim_region_row_col = <1 1>; + bl_ldim_mode = <1>; /*0=left/right side + *1=top/bottom side + *2=direct + */ + ldim_dev_index = <1>; + }; + backlight_5{ + index = <5>; + bl_name = "ldim_iw7027"; + bl_level_default_uboot_kernel = <100 100>; + bl_level_attr = <255 10 /*max, min*/ + 128 128>; /*mid, mid_mapping*/ + bl_ctrl_method = <3>; /*1=pwm,2=pwm_combo,3=ldim*/ + bl_power_attr = <0 /*en_gpio_index*/ + 1 0 /*on_value, off_value*/ + 200 200>; /*on_delay(ms), off_delay(ms)*/ + bl_ldim_region_row_col = <1 10>; + bl_ldim_mode = <1>; /*0=left/right side + *1=top/bottom side + *2=direct + */ + ldim_dev_index = <2>; + }; + }; + + bl_pwm_conf:bl_pwm_conf{ + pwm_channel_0 { + pwm_port_index = <2>; + pwms = <&pwm_cd MESON_PWM_0 30040 0>; + }; + pwm_channel_1 { + pwm_port_index = <3>; + pwms = <&pwm_cd MESON_PWM_1 30040 0>; + }; + }; + + local_dimming_device { + compatible = "amlogic, ldim_dev"; + status = "okay"; + pinctrl-names = "ldim_pwm", + "ldim_pwm_vs", + "ldim_pwm_combo", + "ldim_pwm_vs_combo", + "ldim_pwm_off", + "ldim_pwm_combo_off"; + pinctrl-0 = <&pwm_c_pins3>; + pinctrl-1 = <&bl_pwm_vs_on_pins>; + pinctrl-2 = <&pwm_c_pins3 &pwm_d_pins2>; + pinctrl-3 = <&bl_pwm_vs_on_pins &pwm_d_pins2>; + pinctrl-4 = <&bl_pwm_off_pins>; + pinctrl-5 = <&bl_pwm_combo_off_pins>; + pinctrl_version = <1>; /* for uboot */ + ldim_pwm_config = <&bl_pwm_conf>; + + /* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/ + ldim_dev-gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH + &gpio GPIOZ_5 GPIO_ACTIVE_HIGH + &gpio GPIOZ_6 GPIO_ACTIVE_HIGH>; + ldim_dev_gpio_names = "GPIOAO_11","GPIOZ_5","GPIOZ_6"; + + ldim_dev_0 { + index = <0>; + type = <0>; /*0=normal, 1=spi, 2=i2c*/ + ldim_dev_name = "ob3350"; + ldim_pwm_port = "PWM_C"; + ldim_pwm_attr = <0 /* pol */ + 200 /*freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 50>;/*default duty(%)*/ + en_gpio_on_off = <0 /*ldim_dev-gpios index*/ + 1 0>; /*on_level, off_level*/ + dim_max_min = <100 20>; /*dim_max, dim_min*/ + }; + ldim_dev_1 { + index = <1>; + type = <0>; /*0=normal, 1=spi, 2=i2c*/ + ldim_dev_name = "global"; + ldim_pwm_port = "PWM_C"; + ldim_pwm_attr = <1 /* pol */ + 180 /*freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 50>;/*default duty(%)*/ + analog_pwm_port = "PWM_D"; + analog_pwm_attr = <1 /*pol(0=negative, 1=positvie)*/ + 18000 /*freq(pwm:Hz)*/ + 100 25 /*duty_max(%), duty_min(%)*/ + 80>; /*default duty(%)*/ + en_gpio_on_off = <0 /*ldim_dev-gpios index*/ + 1 0>; /*on_level, off_level*/ + dim_max_min = <100 20>; /*dim_max, dim_min*/ + }; + + ldim_dev_2 { + index = <2>; + type = <1>; /* 0=normal,1=spi,2=i2c */ + ldim_dev_name = "iw7027"; + ldim_pwm_port = "PWM_VS"; + ldim_pwm_attr = <1 /* pol */ + 2 /*freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 50>;/*default duty(%)*/ + spi_bus_num = <0>; + spi_chip_select = <0>; + spi_max_frequency = <1000000>; /* unit: hz */ + spi_mode = <0>; /* mode: 0, 1, 2, 3 */ + spi_cs_delay = <10 /* hold_high_delay */ + 100>; /* clk_cs_delay (unit: us) */ + en_gpio_on_off = <0 /* ldim_dev-gpios index */ + 1 /* on_level */ + 0>; /* off_level */ + lamp_err_gpio = <0xff>; + /* ldim_dev-gpios index, 0xff=invalid */ + spi_write_check = <0>; /* 0=disable, 1=enable */ + + dim_max_min = <0xfff 0x7f>; /* dim_max, dim_min */ + ldim_region_mapping = <0 1 2 3 4 5 6 7 8 9>; + + cmd_size = <0xff>; + /* init: (type, data...) */ + /* type: 0x00=cmd with delay, + * 0xc0=cmd, + * 0xfd=delay, + * 0xff=ending + */ + /* data: spi data, fill 0x0 for no use */ + /* delay: unit ms */ + init_on = < + 0xc0 2 0x23 0x03 + 0xc0 2 0x24 0xff + 0xc0 2 0x25 0x00 + 0xc0 2 0x26 0x00 + 0xc0 2 0x27 0x60 + 0xc0 2 0x29 0x00 + 0xc0 2 0x2a 0x00 + 0xc0 2 0x2b 0x00 + 0xc0 2 0x2c 0x73 + 0xc0 2 0x2d 0x37 + 0xc0 2 0x31 0x93 + 0xc0 2 0x32 0x0f + 0xc0 2 0x33 0xff + 0xc0 2 0x34 0xc8 + 0xc0 2 0x35 0xbf + 0xff 0>; + init_off = <0xff 0>; + }; + }; +}; /* end of / */ diff --git a/arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi b/arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi new file mode 100644 index 000000000000..1842e68c7d0d --- /dev/null +++ b/arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi @@ -0,0 +1,589 @@ +/* + * arch/arm/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi + * + * Copyright (C) 2016 Amlogic, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +/ { + lcd { + compatible = "amlogic, lcd-tm2"; + status = "okay"; + mode = "tv"; + fr_auto_policy = <0>; /* 0=disable, 1=60/50hz, 2=60/50/48hz */ + key_valid = <0>; + clocks = <&clkc CLKID_VCLK2_ENCL + &clkc CLKID_VCLK2_VENCL + &clkc CLKID_TCON + &clkc CLKID_FCLK_DIV5 + &clkc CLKID_TCON_PLL_COMP>; + clock-names = "encl_top_gate", + "encl_int_gate", + "tcon_gate", + "fclk_div5", + "clk_tcon"; + reg = <0xff660000 0x8100 + 0xff634400 0x300>; + interrupts = <0 3 1 + 0 78 1 + 0 88 1>; + interrupt-names = "vsync","vbyone","tcon"; + pinctrl-names = "vbyone","vbyone_off","tcon","tcon_off"; + pinctrl-0 = <&lcd_vbyone_pins>; + pinctrl-1 = <&lcd_vbyone_off_pins>; + pinctrl-2 = <&lcd_tcon_pins>; + pinctrl-3 = <&lcd_tcon_off_pins>; + pinctrl_version = <2>; /* for uboot */ + + /* power type:(0=cpu_gpio, 2=signal, 3=extern, 0xff=ending) */ + /* power index:(gpios_index, or extern_index, 0xff=invalid) */ + /* power value:(0=output low, 1=output high, 2=input) */ + /* power delay:(unit in ms) */ + + lvds_0{ + model_name = "1080p-vfreq"; + interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2060 2650 /*h_period_min,max*/ + 1100 1480 /*v_period_min,max*/ + 120000000 160000000>; /*pclk_min,max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + lvds_attr = < + 1 /*lvds_repack*/ + 1 /*dual_port*/ + 0 /*pn_swap*/ + 0 /*port_swap*/ + 0>; /*lane_reverse*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 0 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + lvds_1{ + model_name = "1080p-hfreq_hdmi"; + interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2080 2720 /*h_period min, max*/ + 1100 1380 /*v_period min, max*/ + 133940000 156000000>; /*pclk_min, max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 4 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level */ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + lvds_attr = < + 1 /*lvds_repack*/ + 1 /*dual_port*/ + 0 /*pn_swap*/ + 0 /*port_swap*/ + 0>; /*lane_reverse*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 0 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + vbyone_0{ + model_name = "public_2region"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 33 477 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 2 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable */ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + vbyone_1{ + model_name = "public_1region"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min, max*/ + 2200 2790 /*v_period_min, max*/ + 552000000 632000000>; /*pclk_min,max*/ + lcd_timing = < + 33 477 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 1 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable*/ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + p2p_0{ + model_name = "p2p_ceds"; + interface = "p2p"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 5000 2250 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 5100 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 16 29 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + p2p_attr = < + 0x0 /* p2p_teyp: + * 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi, + * 0x10=chpi, 0x11=cspi, 0x12=usit + */ + 12 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + p2p_1{ + model_name = "p2p_ceds"; + interface = "p2p"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 5000 2250 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 5100 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 16 29 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + p2p_attr = < + 0x0 /* p2p_teyp: + * 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi, + * 0x10=chpi, 0x11=cspi, 0x12=usit + */ + 6 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + p2p_2{ + model_name = "p2p_chpi"; + interface = "p2p"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 5100 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 16 29 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + p2p_attr = < + 0x10 /* p2p_teyp: + * 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi, + * 0x10=chpi, 0x11=cspi, 0x12=usit + */ + 6 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + p2p_3{ + model_name = "p2p_chpi"; + interface = "p2p"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 5100 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 16 29 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + p2p_attr = < + 0x10 /* p2p_teyp: + * 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi, + * 0x10=chpi, 0x11=cspi, 0x12=usit + */ + 12 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_0{ + model_name = "mlvds_1080p"; + interface = "minilvds"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2080 2720 /*h_period_min, max*/ + 2200 1125 /*v_period_min, max*/ + 133940000 156000000>; /*pclk_min, max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0x660 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_1{ + model_name = "mlvds_768p"; + interface = "minilvds";/*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1366 768 /*h_active, v_active*/ + 1560 806 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 1460 2000 /*h_period_min, max*/ + 784 1015 /*v_period_min, max*/ + 50000000 85000000>; /*pclk_min, max*/ + lcd_timing = < + 56 64 0 /*hs_width, hs_bp, hs_pol*/ + 3 28 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0x660 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + }; + + lcd_extern{ + compatible = "amlogic, lcd_extern"; + status = "okay"; + key_valid = <0>; + i2c_bus = "i2c_bus_1"; + + extern_0{ + index = <0>; + extern_name = "ext_default"; + status = "disabled"; + type = <0>; /*0=i2c, 1=spi, 2=mipi*/ + i2c_address = <0x1c>; /*7bit i2c_addr*/ + i2c_address2 = <0xff>; + cmd_size = <0xff>; /*dynamic cmd_size*/ + + /* init on/off: + * fixed cmd_size: (type, value...); + * cmd_size include all data. + * dynamic cmd_size: (type, cmd_size, value...); + * cmd_size include value. + */ + /* type: 0x00=cmd with delay(bit[3:0]=1 for address2), + * 0xc0=cmd(bit[3:0]=1 for address2), + * 0xf0=gpio, + * 0xfd=delay, + * 0xff=ending + */ + /* value: i2c or spi cmd, or gpio index & level */ + /* delay: unit ms */ + init_on = < + 0xc0 7 0x20 0x01 0x02 0x00 0x40 0xFF 0x00 + 0xc0 7 0x80 0x02 0x00 0x40 0x62 0x51 0x73 + 0xc0 7 0x61 0x06 0x00 0x00 0x00 0x00 0x00 + 0xc0 7 0xC1 0x05 0x0F 0x00 0x08 0x70 0x00 + 0xc0 7 0x13 0x01 0x00 0x00 0x00 0x00 0x00 + 0xc0 7 0x3D 0x02 0x01 0x00 0x00 0x00 0x00 + 0xc0 7 0xED 0x0D 0x01 0x00 0x00 0x00 0x00 + 0xc0 7 0x23 0x02 0x00 0x00 0x00 0x00 0x00 + 0xfd 1 10 /* delay 10ms */ + 0xff 0>; /*ending*/ + init_off = <0xff 0>; /*ending*/ + }; + extern_1{ + index = <1>; + extern_name = "i2c_T5800Q"; + status = "disabled"; + type = <0>; /* 0=i2c, 1=spi, 2=mipi */ + i2c_address = <0x1c>; /* 7bit i2c address */ + }; + extern_2{ + index = <2>; + extern_name = "i2c_ANX6862_7911"; + status = "okay"; + type = <0>; /* 0=i2c, 1=spi, 2=mipi */ + i2c_address = <0x20>; /* 7bit i2c address */ + i2c_address2 = <0x74>; /* 7bit i2c address */ + cmd_size = <0xff>; + + init_on = < + 0xc0 2 0x01 0x2b + 0xc0 2 0x02 0x05 + 0xc0 2 0x03 0x00 + 0xc0 2 0x04 0x00 + 0xc0 2 0x05 0x0c + 0xc0 2 0x06 0x04 + 0xc0 2 0x07 0x21 + 0xc0 2 0x08 0x0f + 0xc0 2 0x09 0x04 + 0xc0 2 0x0a 0x00 + 0xc0 2 0x0b 0x04 + 0xc0 2 0xff 0x00 + 0xfd 1 100 /* delay 100ms */ + + 0xc1 2 0x01 0xca + 0xc1 2 0x02 0x3b + 0xc1 2 0x03 0x33 + 0xc1 2 0x04 0x05 + 0xc1 2 0x05 0x2c + 0xc1 2 0x06 0xf2 + 0xc1 2 0x07 0x9c + 0xc1 2 0x08 0x1b + 0xc1 2 0x09 0x82 + 0xc1 2 0x0a 0x3d + 0xc1 2 0x0b 0x20 + 0xc1 2 0x0c 0x11 + 0xc1 2 0x0d 0xc4 + 0xc1 2 0x0e 0x1a + 0xc1 2 0x0f 0x31 + 0xc1 2 0x10 0x4c + 0xc1 2 0x11 0x12 + 0xc1 2 0x12 0x90 + 0xc1 2 0x13 0xf7 + 0xc1 2 0x14 0x0c + 0xc1 2 0x15 0x20 + 0xc1 2 0x16 0x13 + 0xff 0>; /*ending*/ + init_off = <0xff 0>; /*ending*/ + }; + }; + +}; /* end of / */ diff --git a/arch/arm/boot/dts/amlogic/tm2_t962x3_ab301.dts b/arch/arm/boot/dts/amlogic/tm2_t962x3_ab301.dts index 9fa15f293e1d..dbb1a8556fcb 100644 --- a/arch/arm/boot/dts/amlogic/tm2_t962x3_ab301.dts +++ b/arch/arm/boot/dts/amlogic/tm2_t962x3_ab301.dts @@ -19,6 +19,7 @@ #include "mesontm2.dtsi" #include "partition_mbox_normal.dtsi" +#include "mesontm2_t962x3_ab301-panel.dtsi" / { model = "Amlogic TM2 T962E2 AB301"; @@ -1894,6 +1895,10 @@ status = "okay"; }; +&pwm_cd { + status = "okay"; +}; + &saradc { status = "okay"; }; diff --git a/arch/arm/boot/dts/amlogic/tm2_t962x3_ab309.dts b/arch/arm/boot/dts/amlogic/tm2_t962x3_ab309.dts index 5847b2b3073d..0648d6cf6c8d 100644 --- a/arch/arm/boot/dts/amlogic/tm2_t962x3_ab309.dts +++ b/arch/arm/boot/dts/amlogic/tm2_t962x3_ab309.dts @@ -19,6 +19,7 @@ #include "mesontm2.dtsi" #include "partition_mbox_normal.dtsi" +#include "mesontm2_t962x3_ab309-panel.dtsi" / { model = "Amlogic TM2 T962X3 AB309"; diff --git a/arch/arm64/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi b/arch/arm64/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi new file mode 100644 index 000000000000..e0c2c99489ba --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi @@ -0,0 +1,1066 @@ +/* + * arch/arm64/boot/dts/amlogic/mesontm2_t962x3_ab301-panel.dtsi + * + * Copyright (C) 2018 Amlogic, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +/ { + lcd { + compatible = "amlogic, lcd-tm2"; + status = "okay"; + mode = "tv"; + fr_auto_policy = <1>; /* 0=disable, 1=60/50hz, 2=60/50/48hz */ + key_valid = <0>; + clocks = <&clkc CLKID_VCLK2_ENCL + &clkc CLKID_VCLK2_VENCL + &clkc CLKID_TCON + &clkc CLKID_FCLK_DIV5 + &clkc CLKID_TCON_PLL_COMP>; + clock-names = "encl_top_gate", + "encl_int_gate", + "tcon_gate", + "fclk_div5", + "clk_tcon"; + reg = <0x0 0xff660000 0x0 0x8100 + 0x0 0xff634400 0x0 0x300>; + interrupts = <0 3 1 + 0 78 1 + 0 88 1>; + interrupt-names = "vsync","vbyone","tcon"; + pinctrl-names = "vbyone","vbyone_off","tcon","tcon_off"; + pinctrl-0 = <&lcd_vbyone_pins>; + pinctrl-1 = <&lcd_vbyone_off_pins>; + pinctrl-2 = <&lcd_tcon_pins>; + pinctrl-3 = <&lcd_tcon_off_pins>; + pinctrl_version = <2>; /* for uboot */ + memory-region = <&lcd_tcon_reserved>; + + /* power type:(0=cpu_gpio, 2=signal, 3=extern, 0xff=ending) */ + /* power index:(gpios_index, or extern_index, 0xff=invalid) */ + /* power value:(0=output low, 1=output high, 2=input) */ + /* power delay:(unit in ms) */ + lcd_cpu-gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH + &gpio GPIOH_2 GPIO_ACTIVE_HIGH + &gpio GPIOH_3 GPIO_ACTIVE_HIGH + &gpio GPIOH_12 GPIO_ACTIVE_HIGH + &gpio GPIOH_8 GPIO_ACTIVE_HIGH + &gpio GPIOH_10 GPIO_ACTIVE_HIGH + &gpio GPIOH_11 GPIO_ACTIVE_HIGH + &gpio GPIOH_14 GPIO_ACTIVE_HIGH>; + lcd_cpu_gpio_names = "GPIOAO_4","GPIOH_2","GPIOH_3","GPIOH_12", + "GPIOH_8","GPIOH_10","GPIOH_11","GPIOH_14"; + + lvds_0{ + model_name = "1080p-vfreq"; + interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2060 2650 /*h_period_min,max*/ + 1100 1480 /*v_period_min,max*/ + 120000000 160000000>; /*pclk_min,max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 15 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + lvds_attr = < + 1 /*lvds_repack*/ + 1 /*dual_port*/ + 0 /*pn_swap*/ + 0 /*port_swap*/ + 0>; /*lane_reverse*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 0 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0>; + }; + + lvds_1{ + model_name = "1080p-hfreq_hdmi"; + interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2080 2720 /*h_period min, max*/ + 1100 1380 /*v_period min, max*/ + 133940000 156000000>; /*pclk_min, max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 4 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level */ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + lvds_attr = < + 1 /*lvds_repack*/ + 1 /*dual_port*/ + 0 /*pn_swap*/ + 0 /*port_swap*/ + 0>; /*lane_reverse*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 0 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0>; + }; + lvds_2{ + model_name = "768p-vfreq"; + interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 1366 768 /*h_active, v_active*/ + 1560 806 /*h_period, v_period*/ + 8 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 1460 2000 /*h_period_min, max */ + 784 1015 /*v_period_min, max */ + 50000000 85000000>; /*pclk_min, max*/ + lcd_timing = < + 56 64 0 /*hs_width, hs_bp, hs_pol*/ + 3 28 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 15 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + lvds_attr = < + 1 /*lvds_repack*/ + 0 /*dual_port*/ + 0 /*pn_swap*/ + 0 /*port_swap*/ + 0>; /*lane_reverse*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 0 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0>; + }; + vbyone_0{ + model_name = "public_2region"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 33 477 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 2 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable */ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = <0 0 1 50 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = <2 0 0 10 /*signal disable*/ + 0 0 0 200 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <2>; + }; + vbyone_1{ + model_name = "public_1region"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min, max*/ + 2200 2790 /*v_period_min, max*/ + 552000000 632000000>; /*pclk_min,max*/ + lcd_timing = < + 33 477 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 1 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable*/ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 50 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 200 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <2>; + }; + vbyone_2{ + model_name = "public_2region_hdmi"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*v_period_min, max*/ + lcd_timing = < + 33 477 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 4 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 2 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable*/ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 50 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 200 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <2>; + }; + vbyone_3{ + model_name = "BOE_HV550QU2"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 560000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 33 477 1 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 2 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable*/ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 0 3 0 10 /*3d_disable*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 3 2 0 /*3d_disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <2>; + }; + vbyone_4{ + model_name = "BOE_HV550QU2_1region"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min,max*/ + 2200 2760 /*v_period_min,max*/ + 560000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 33 477 1 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 1 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable*/ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 0 3 0 10 /*3d_disable*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 3 2 0 /*3d_disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <2>; + }; + p2p_0{ + model_name = "p2p_ceds"; + interface = "p2p"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 5000 2250 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 5100 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 16 29 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + p2p_attr = < + 0x0 /* p2p_teyp: + * 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi, + * 0x10=chpi, 0x11=cspi, 0x12=usit + */ + 12 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 3 2 0 200 /* extern init voltage */ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + p2p_1{ + model_name = "p2p_ceds"; + interface = "p2p"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 5000 2250 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 5100 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 16 29 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + p2p_attr = < + 0x0 /* p2p_teyp: + * 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi, + * 0x10=chpi, 0x11=cspi, 0x12=usit + */ + 6 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + p2p_2{ + model_name = "p2p_chpi"; + interface = "p2p"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 5100 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 16 29 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + p2p_attr = < + 0x10 /* p2p_teyp: + * 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi, + * 0x10=chpi, 0x11=cspi, 0x12=usit + */ + 6 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + p2p_3{ + model_name = "p2p_chpi"; + interface = "p2p"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 5100 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 16 29 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + p2p_attr = < + 0x10 /* p2p_teyp: + * 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi, + * 0x10=chpi, 0x11=cspi, 0x12=usit + */ + 12 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_0{ + model_name = "mlvds_1080p"; + interface = "minilvds"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2080 2720 /*h_period_min, max*/ + 2200 1125 /*v_period_min, max*/ + 133940000 156000000>; /*pclk_min, max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0x660 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_1{ + model_name = "mlvds_768p"; + interface = "minilvds";/*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1366 768 /*h_active, v_active*/ + 1560 806 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 1460 2000 /*h_period_min, max*/ + 784 1015 /*v_period_min, max*/ + 50000000 85000000>; /*pclk_min, max*/ + lcd_timing = < + 56 64 0 /*hs_width, hs_bp, hs_pol*/ + 3 28 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 3 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0x660 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + }; + + lcd_extern{ + compatible = "amlogic, lcd_extern"; + status = "okay"; + key_valid = <0>; + i2c_bus = "i2c_bus_1"; + + extern_0{ + index = <0>; + extern_name = "ext_default"; + status = "disabled"; + type = <0>; /*0=i2c, 1=spi, 2=mipi*/ + i2c_address = <0x1c>; /*7bit i2c_addr*/ + i2c_address2 = <0xff>; + cmd_size = <0xff>; /*dynamic cmd_size*/ + + /* init on/off: + * fixed cmd_size: (type, value...); + * cmd_size include all data. + * dynamic cmd_size: (type, cmd_size, value...); + * cmd_size include value. + */ + /* type: 0x00=cmd with delay(bit[3:0]=1 for address2), + * 0xc0=cmd(bit[3:0]=1 for address2), + * 0xf0=gpio, + * 0xfd=delay, + * 0xff=ending + */ + /* value: i2c or spi cmd, or gpio index & level */ + /* delay: unit ms */ + init_on = < + 0xc0 7 0x20 0x01 0x02 0x00 0x40 0xFF 0x00 + 0xc0 7 0x80 0x02 0x00 0x40 0x62 0x51 0x73 + 0xc0 7 0x61 0x06 0x00 0x00 0x00 0x00 0x00 + 0xc0 7 0xC1 0x05 0x0F 0x00 0x08 0x70 0x00 + 0xc0 7 0x13 0x01 0x00 0x00 0x00 0x00 0x00 + 0xc0 7 0x3D 0x02 0x01 0x00 0x00 0x00 0x00 + 0xc0 7 0xED 0x0D 0x01 0x00 0x00 0x00 0x00 + 0xc0 7 0x23 0x02 0x00 0x00 0x00 0x00 0x00 + 0xfd 1 10 /* delay 10ms */ + 0xff 0>; /*ending*/ + init_off = <0xff 0>; /*ending*/ + }; + extern_1{ + index = <1>; + extern_name = "i2c_T5800Q"; + status = "disabled"; + type = <0>; /* 0=i2c, 1=spi, 2=mipi */ + i2c_address = <0x1c>; /* 7bit i2c address */ + }; + extern_2{ + index = <2>; + extern_name = "i2c_ANX6862_7911"; + status = "okay"; + type = <0>; /* 0=i2c, 1=spi, 2=mipi */ + i2c_address = <0x20>; /* 7bit i2c address */ + i2c_address2 = <0x74>; /* 7bit i2c address */ + cmd_size = <0xff>; + + init_on = < + 0xc0 2 0x01 0x2b + 0xc0 2 0x02 0x05 + 0xc0 2 0x03 0x00 + 0xc0 2 0x04 0x00 + 0xc0 2 0x05 0x0c + 0xc0 2 0x06 0x04 + 0xc0 2 0x07 0x21 + 0xc0 2 0x08 0x0f + 0xc0 2 0x09 0x04 + 0xc0 2 0x0a 0x00 + 0xc0 2 0x0b 0x04 + 0xc0 2 0xff 0x00 + 0xfd 1 100 /* delay 100ms */ + + 0xc1 2 0x01 0xca + 0xc1 2 0x02 0x3b + 0xc1 2 0x03 0x33 + 0xc1 2 0x04 0x05 + 0xc1 2 0x05 0x2c + 0xc1 2 0x06 0xf2 + 0xc1 2 0x07 0x9c + 0xc1 2 0x08 0x1b + 0xc1 2 0x09 0x82 + 0xc1 2 0x0a 0x3d + 0xc1 2 0x0b 0x20 + 0xc1 2 0x0c 0x11 + 0xc1 2 0x0d 0xc4 + 0xc1 2 0x0e 0x1a + 0xc1 2 0x0f 0x31 + 0xc1 2 0x10 0x4c + 0xc1 2 0x11 0x12 + 0xc1 2 0x12 0x90 + 0xc1 2 0x13 0xf7 + 0xc1 2 0x14 0x0c + 0xc1 2 0x15 0x20 + 0xc1 2 0x16 0x13 + 0xff 0>; /*ending*/ + init_off = <0xff 0>; /*ending*/ + }; + }; + + backlight{ + compatible = "amlogic, backlight-tm2"; + status = "okay"; + key_valid = <0>; + pinctrl-names = "pwm_on","pwm_vs_on", + "pwm_combo_0_1_on", + "pwm_combo_0_vs_1_on", + "pwm_combo_0_1_vs_on", + "pwm_off", + "pwm_combo_off"; + pinctrl-0 = <&pwm_c_pins3>; + pinctrl-1 = <&bl_pwm_vs_on_pins>; + pinctrl-2 = <&pwm_c_pins3 &pwm_d_pins2>; + pinctrl-3 = <&bl_pwm_combo_0_vs_on_pins &pwm_d_pins2>; + pinctrl-4 = <&pwm_c_pins3 &bl_pwm_combo_1_vs_on_pins>; + pinctrl-5 = <&bl_pwm_off_pins>; + pinctrl-6 = <&bl_pwm_combo_off_pins>; + pinctrl_version = <2>; /* for uboot */ + interrupts = <0 3 1>; + interrupt-names = "ldim_vsync"; + bl_pwm_config = <&bl_pwm_conf>; + + /* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/ + /* power index:(point gpios_index, 0xff=invalid) */ + /* power value:(0=output low, 1=output high, 2=input) */ + /* power delay:(unit in ms) */ + bl-gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH + &gpio GPIOZ_5 GPIO_ACTIVE_HIGH + &gpio GPIOZ_6 GPIO_ACTIVE_HIGH>; + bl_gpio_names = "GPIOAO_11","GPIOZ_5","GPIOZ_6"; + + backlight_0{ + index = <0>; + bl_name = "backlight_pwm"; + bl_level_default_uboot_kernel = <100 100>; + bl_level_attr = <255 10 /*max, min*/ + 128 128>; /*mid, mid_mapping*/ + bl_ctrl_method = <1>; /*1=pwm,2=pwm_combo,3=ldim*/ + bl_power_attr = <0 /*en_gpio_index*/ + 1 0 /*on_value, off_value*/ + 200 200>; /*on_delay(ms), off_delay(ms)*/ + bl_pwm_port = "PWM_C"; + bl_pwm_attr = <1 /*pwm_method(0=negative, 1=positvie)*/ + 180 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 100 25>; /*duty_max(%), duty_min(%)*/ + bl_pwm_power = <1 0 /*pwm_gpio_index, pwm_gpio_off*/ + 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/ + bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */ + }; + backlight_1{ + index = <1>; + bl_name = "backlight_pwm_vs"; + bl_level_default_uboot_kernel = <100 100>; + bl_level_attr = <255 10 /*max, min*/ + 128 128>; /*mid, mid_mapping*/ + bl_ctrl_method = <1>; /*1=pwm,2=pwm_combo,3=ldim*/ + bl_power_attr = <0 /*en_gpio_index*/ + 1 0 /*on_value, off_value*/ + 200 200>; /* on_delay(ms), off_delay(ms)*/ + bl_pwm_port = "PWM_VS"; + bl_pwm_attr = <1 /*pwm_method(0=negative, 1=positvie)*/ + 2 /*pwm_freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 100 25>; /*duty_max(%), duty_min(%)*/ + bl_pwm_power = <1 0 /*pwm_gpio_index, pwm_gpio_off*/ + 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/ + bl_pwm_en_sequence_reverse = <0>; /* 1 for reverse */ + }; + backlight_2{ + index = <2>; + bl_name = "backlight_pwm_combo"; + bl_level_default_uboot_kernel = <31 100>; + bl_level_attr = <255 10 /*max, min*/ + 128 128>; /*mid, mid_mapping*/ + bl_ctrl_method = <2>; /*1=pwm,2=pwm_combo,3=ldim*/ + bl_power_attr = <0 /*en_gpio_index*/ + 1 0 /*on_value, off_value*/ + 410 110>; /*on_delay(ms), off_delay(ms)*/ + bl_pwm_combo_level_mapping = <255 10 /*pwm_0 range*/ + 0 0>; /*pwm_1 range*/ + bl_pwm_combo_port = "PWM_C","PWM_D"; + bl_pwm_combo_attr = <1 /*pwm0 method*/ + 180 /*pwm0 freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 100 25 /*pwm0 duty_max(%), duty_min(%)*/ + 1 /*pwm1 method*/ + 18000 /*pwm1 freq(pwm:Hz, pwm_vs:multi of vs)*/ + 80 80>; /*pwm1 duty_max(%), duty_min(%)*/ + bl_pwm_combo_power = <1 0 /*pwm0 gpio_index, gpio_off*/ + 2 0 /*pwm1 gpio_index, gpio_off*/ + 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/ + }; + backlight_3{ + index = <3>; + bl_name = "pwm_combo_ldim_test"; + bl_level_default_uboot_kernel = <31 100>; + bl_level_attr = <255 10 /*max, min*/ + 128 128>; /*mid, mid_mapping*/ + bl_ctrl_method = <2>; /*1=pwm,2=pwm_combo,3=ldim*/ + bl_power_attr = <0 /*en_gpio_index*/ + 1 0 /*on_value, off_value*/ + 410 110>; /*on_delay(ms), off_delay(ms)*/ + bl_pwm_combo_level_mapping = <255 10 /*pwm_0 range*/ + 0 0>; /*pwm_1 range*/ + bl_pwm_combo_port = "PWM_C","PWM_D"; + bl_pwm_combo_attr = <1 /*pwm0 method*/ + 180 /*pwm0 freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 100 25 /*pwm0 duty_max(%), duty_min(%)*/ + 1 /*pwm1 method*/ + 18000 /*pwm1 freq(pwm:Hz, pwm_vs:multi of vs)*/ + 80 80>; /*pwm1 duty_max(%), duty_min(%)*/ + bl_pwm_combo_power = <1 0 /*pwm0 gpio_index, gpio_off*/ + 2 0 /*pwm1 gpio_index, gpio_off*/ + 10 10>; /*pwm_on_delay(ms), pwm_off_delay(ms)*/ + bl_ldim_region_row_col = <2 10>; + }; + backlight_4{ + index = <4>; + bl_name = "ldim_global"; + bl_level_default_uboot_kernel = <100 100>; + bl_level_attr = <255 10 /*max, min*/ + 128 128>; /*mid, mid_mapping*/ + bl_ctrl_method = <3>; /*1=pwm,2=pwm_combo,3=ldim*/ + bl_power_attr = <0xff /*en_gpio_index*/ + 1 0 /*on_value, off_value*/ + 200 200>; /*on_delay(ms), off_delay(ms)*/ + bl_ldim_region_row_col = <1 1>; + bl_ldim_mode = <1>; /*0=left/right side + *1=top/bottom side + *2=direct + */ + ldim_dev_index = <1>; + }; + backlight_5{ + index = <5>; + bl_name = "ldim_iw7027"; + bl_level_default_uboot_kernel = <100 100>; + bl_level_attr = <255 10 /*max, min*/ + 128 128>; /*mid, mid_mapping*/ + bl_ctrl_method = <3>; /*1=pwm,2=pwm_combo,3=ldim*/ + bl_power_attr = <0 /*en_gpio_index*/ + 1 0 /*on_value, off_value*/ + 200 200>; /*on_delay(ms), off_delay(ms)*/ + bl_ldim_region_row_col = <1 10>; + bl_ldim_mode = <1>; /*0=left/right side + *1=top/bottom side + *2=direct + */ + ldim_dev_index = <2>; + }; + }; + + bl_pwm_conf:bl_pwm_conf{ + pwm_channel_0 { + pwm_port_index = <2>; + pwms = <&pwm_cd MESON_PWM_0 30040 0>; + }; + pwm_channel_1 { + pwm_port_index = <3>; + pwms = <&pwm_cd MESON_PWM_1 30040 0>; + }; + }; + + local_dimming_device { + compatible = "amlogic, ldim_dev"; + status = "okay"; + pinctrl-names = "ldim_pwm", + "ldim_pwm_vs", + "ldim_pwm_combo", + "ldim_pwm_vs_combo", + "ldim_pwm_off", + "ldim_pwm_combo_off"; + pinctrl-0 = <&pwm_c_pins3>; + pinctrl-1 = <&bl_pwm_vs_on_pins>; + pinctrl-2 = <&pwm_c_pins3 &pwm_d_pins2>; + pinctrl-3 = <&bl_pwm_vs_on_pins &pwm_d_pins2>; + pinctrl-4 = <&bl_pwm_off_pins>; + pinctrl-5 = <&bl_pwm_combo_off_pins>; + pinctrl_version = <1>; /* for uboot */ + ldim_pwm_config = <&bl_pwm_conf>; + + /* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/ + ldim_dev-gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH + &gpio GPIOZ_5 GPIO_ACTIVE_HIGH + &gpio GPIOZ_6 GPIO_ACTIVE_HIGH>; + ldim_dev_gpio_names = "GPIOAO_11","GPIOZ_5","GPIOZ_6"; + + ldim_dev_0 { + index = <0>; + type = <0>; /*0=normal, 1=spi, 2=i2c*/ + ldim_dev_name = "ob3350"; + ldim_pwm_port = "PWM_C"; + ldim_pwm_attr = <0 /* pol */ + 200 /*freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 50>;/*default duty(%)*/ + en_gpio_on_off = <0 /*ldim_dev-gpios index*/ + 1 0>; /*on_level, off_level*/ + dim_max_min = <100 20>; /*dim_max, dim_min*/ + }; + ldim_dev_1 { + index = <1>; + type = <0>; /*0=normal, 1=spi, 2=i2c*/ + ldim_dev_name = "global"; + ldim_pwm_port = "PWM_C"; + ldim_pwm_attr = <1 /* pol */ + 180 /*freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 50>;/*default duty(%)*/ + analog_pwm_port = "PWM_D"; + analog_pwm_attr = <1 /*pol(0=negative, 1=positvie)*/ + 18000 /*freq(pwm:Hz)*/ + 100 25 /*duty_max(%), duty_min(%)*/ + 80>; /*default duty(%)*/ + en_gpio_on_off = <0 /*ldim_dev-gpios index*/ + 1 0>; /*on_level, off_level*/ + dim_max_min = <100 20>; /*dim_max, dim_min*/ + }; + + ldim_dev_2 { + index = <2>; + type = <1>; /* 0=normal,1=spi,2=i2c */ + ldim_dev_name = "iw7027"; + ldim_pwm_port = "PWM_VS"; + ldim_pwm_attr = <1 /* pol */ + 2 /*freq(pwm:Hz, pwm_vs:multiple of vs)*/ + 50>;/*default duty(%)*/ + spi_bus_num = <0>; + spi_chip_select = <0>; + spi_max_frequency = <1000000>; /* unit: hz */ + spi_mode = <0>; /* mode: 0, 1, 2, 3 */ + spi_cs_delay = <10 /* hold_high_delay */ + 100>; /* clk_cs_delay (unit: us) */ + en_gpio_on_off = <0 /* ldim_dev-gpios index */ + 1 /* on_level */ + 0>; /* off_level */ + lamp_err_gpio = <0xff>; + /* ldim_dev-gpios index, 0xff=invalid */ + spi_write_check = <0>; /* 0=disable, 1=enable */ + + dim_max_min = <0xfff 0x7f>; /* dim_max, dim_min */ + ldim_region_mapping = <0 1 2 3 4 5 6 7 8 9>; + + cmd_size = <0xff>; + /* init: (type, data...) */ + /* type: 0x00=cmd with delay, + * 0xc0=cmd, + * 0xfd=delay, + * 0xff=ending + */ + /* data: spi data, fill 0x0 for no use */ + /* delay: unit ms */ + init_on = < + 0xc0 2 0x23 0x03 + 0xc0 2 0x24 0xff + 0xc0 2 0x25 0x00 + 0xc0 2 0x26 0x00 + 0xc0 2 0x27 0x60 + 0xc0 2 0x29 0x00 + 0xc0 2 0x2a 0x00 + 0xc0 2 0x2b 0x00 + 0xc0 2 0x2c 0x73 + 0xc0 2 0x2d 0x37 + 0xc0 2 0x31 0x93 + 0xc0 2 0x32 0x0f + 0xc0 2 0x33 0xff + 0xc0 2 0x34 0xc8 + 0xc0 2 0x35 0xbf + 0xff 0>; + init_off = <0xff 0>; + }; + }; +}; /* end of / */ diff --git a/arch/arm64/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi b/arch/arm64/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi new file mode 100644 index 000000000000..8f0ad5ea1bf0 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi @@ -0,0 +1,589 @@ +/* + * arch/arm64/boot/dts/amlogic/mesontm2_t962x3_ab309-panel.dtsi + * + * Copyright (C) 2018 Amlogic, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +/ { + lcd { + compatible = "amlogic, lcd-tm2"; + status = "okay"; + mode = "tv"; + fr_auto_policy = <0>; /* 0=disable, 1=60/50hz, 2=60/50/48hz */ + key_valid = <0>; + clocks = <&clkc CLKID_VCLK2_ENCL + &clkc CLKID_VCLK2_VENCL + &clkc CLKID_TCON + &clkc CLKID_FCLK_DIV5 + &clkc CLKID_TCON_PLL_COMP>; + clock-names = "encl_top_gate", + "encl_int_gate", + "tcon_gate", + "fclk_div5", + "clk_tcon"; + reg = <0x0 0xff660000 0x0 0x8100 + 0x0 0xff634400 0x0 0x300>; + interrupts = <0 3 1 + 0 78 1 + 0 88 1>; + interrupt-names = "vsync","vbyone","tcon"; + pinctrl-names = "vbyone","vbyone_off","tcon","tcon_off"; + pinctrl-0 = <&lcd_vbyone_pins>; + pinctrl-1 = <&lcd_vbyone_off_pins>; + pinctrl-2 = <&lcd_tcon_pins>; + pinctrl-3 = <&lcd_tcon_off_pins>; + pinctrl_version = <2>; /* for uboot */ + + /* power type:(0=cpu_gpio, 2=signal, 3=extern, 0xff=ending) */ + /* power index:(gpios_index, or extern_index, 0xff=invalid) */ + /* power value:(0=output low, 1=output high, 2=input) */ + /* power delay:(unit in ms) */ + + lvds_0{ + model_name = "1080p-vfreq"; + interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2060 2650 /*h_period_min,max*/ + 1100 1480 /*v_period_min,max*/ + 120000000 160000000>; /*pclk_min,max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + lvds_attr = < + 1 /*lvds_repack*/ + 1 /*dual_port*/ + 0 /*pn_swap*/ + 0 /*port_swap*/ + 0>; /*lane_reverse*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 0 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + lvds_1{ + model_name = "1080p-hfreq_hdmi"; + interface = "lvds"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2080 2720 /*h_period min, max*/ + 1100 1380 /*v_period min, max*/ + 133940000 156000000>; /*pclk_min, max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 4 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level */ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + lvds_attr = < + 1 /*lvds_repack*/ + 1 /*dual_port*/ + 0 /*pn_swap*/ + 0 /*port_swap*/ + 0>; /*lane_reverse*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 0 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + vbyone_0{ + model_name = "public_2region"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 33 477 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 2 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable */ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + vbyone_1{ + model_name = "public_1region"; + interface = "vbyone"; /*lcd_interface(lvds, vbyone)*/ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 10 /*lcd_bits*/ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 4800 /*h_period_min, max*/ + 2200 2790 /*v_period_min, max*/ + 552000000 632000000>; /*pclk_min,max*/ + lcd_timing = < + 33 477 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + vbyone_attr = < + 8 /*lane_count*/ + 1 /*region_num*/ + 4 /*byte_mode*/ + 4>; /*color_fmt*/ + vbyone_intr_enable = < + 1 /*vbyone_intr_enable*/ + 3>; /*vbyone_vsync_intr_enable*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + p2p_0{ + model_name = "p2p_ceds"; + interface = "p2p"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 5000 2250 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 5100 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 16 29 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + p2p_attr = < + 0x0 /* p2p_teyp: + * 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi, + * 0x10=chpi, 0x11=cspi, 0x12=usit + */ + 12 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + p2p_1{ + model_name = "p2p_ceds"; + interface = "p2p"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 5000 2250 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 5100 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 16 29 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + p2p_attr = < + 0x0 /* p2p_teyp: + * 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi, + * 0x10=chpi, 0x11=cspi, 0x12=usit + */ + 6 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + p2p_2{ + model_name = "p2p_chpi"; + interface = "p2p"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 5100 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 16 29 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + p2p_attr = < + 0x10 /* p2p_teyp: + * 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi, + * 0x10=chpi, 0x11=cspi, 0x12=usit + */ + 6 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + p2p_3{ + model_name = "p2p_chpi"; + interface = "p2p"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 3840 2160 /*h_active, v_active*/ + 4400 2250 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 4240 5100 /*h_period_min, max*/ + 2200 2760 /*v_period_min, max*/ + 480000000 624000000>; /*pclk_min, max*/ + lcd_timing = < + 16 29 0 /*hs_width, hs_bp, hs_pol*/ + 6 65 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + p2p_attr = < + 0x10 /* p2p_teyp: + * 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi, + * 0x10=chpi, 0x11=cspi, 0x12=usit + */ + 12 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_0{ + model_name = "mlvds_1080p"; + interface = "minilvds"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2080 2720 /*h_period_min, max*/ + 2200 1125 /*v_period_min, max*/ + 133940000 156000000>; /*pclk_min, max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0x660 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_1{ + model_name = "mlvds_768p"; + interface = "minilvds"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1366 768 /*h_active, v_active*/ + 1560 806 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 1460 2000 /*h_period_min, max*/ + 784 1015 /*v_period_min, max*/ + 50000000 85000000>; /*pclk_min, max*/ + lcd_timing = < + 56 64 0 /*hs_width, hs_bp, hs_pol*/ + 3 28 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x76543210 /* channel_sel0 */ + 0xba98 /* channel_sel1 */ + 0x660 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + }; + + lcd_extern{ + compatible = "amlogic, lcd_extern"; + status = "okay"; + key_valid = <0>; + i2c_bus = "i2c_bus_1"; + + extern_0{ + index = <0>; + extern_name = "ext_default"; + status = "disabled"; + type = <0>; /*0=i2c, 1=spi, 2=mipi*/ + i2c_address = <0x1c>; /*7bit i2c_addr*/ + i2c_address2 = <0xff>; + cmd_size = <0xff>; /*dynamic cmd_size*/ + + /* init on/off: + * fixed cmd_size: (type, value...); + * cmd_size include all data. + * dynamic cmd_size: (type, cmd_size, value...); + * cmd_size include value. + */ + /* type: 0x00=cmd with delay(bit[3:0]=1 for address2), + * 0xc0=cmd(bit[3:0]=1 for address2), + * 0xf0=gpio, + * 0xfd=delay, + * 0xff=ending + */ + /* value: i2c or spi cmd, or gpio index & level */ + /* delay: unit ms */ + init_on = < + 0xc0 7 0x20 0x01 0x02 0x00 0x40 0xFF 0x00 + 0xc0 7 0x80 0x02 0x00 0x40 0x62 0x51 0x73 + 0xc0 7 0x61 0x06 0x00 0x00 0x00 0x00 0x00 + 0xc0 7 0xC1 0x05 0x0F 0x00 0x08 0x70 0x00 + 0xc0 7 0x13 0x01 0x00 0x00 0x00 0x00 0x00 + 0xc0 7 0x3D 0x02 0x01 0x00 0x00 0x00 0x00 + 0xc0 7 0xED 0x0D 0x01 0x00 0x00 0x00 0x00 + 0xc0 7 0x23 0x02 0x00 0x00 0x00 0x00 0x00 + 0xfd 1 10 /* delay 10ms */ + 0xff 0>; /*ending*/ + init_off = <0xff 0>; /*ending*/ + }; + extern_1{ + index = <1>; + extern_name = "i2c_T5800Q"; + status = "disabled"; + type = <0>; /* 0=i2c, 1=spi, 2=mipi */ + i2c_address = <0x1c>; /* 7bit i2c address */ + }; + extern_2{ + index = <2>; + extern_name = "i2c_ANX6862_7911"; + status = "okay"; + type = <0>; /* 0=i2c, 1=spi, 2=mipi */ + i2c_address = <0x20>; /* 7bit i2c address */ + i2c_address2 = <0x74>; /* 7bit i2c address */ + cmd_size = <0xff>; + + init_on = < + 0xc0 2 0x01 0x2b + 0xc0 2 0x02 0x05 + 0xc0 2 0x03 0x00 + 0xc0 2 0x04 0x00 + 0xc0 2 0x05 0x0c + 0xc0 2 0x06 0x04 + 0xc0 2 0x07 0x21 + 0xc0 2 0x08 0x0f + 0xc0 2 0x09 0x04 + 0xc0 2 0x0a 0x00 + 0xc0 2 0x0b 0x04 + 0xc0 2 0xff 0x00 + 0xfd 1 100 /* delay 100ms */ + + 0xc1 2 0x01 0xca + 0xc1 2 0x02 0x3b + 0xc1 2 0x03 0x33 + 0xc1 2 0x04 0x05 + 0xc1 2 0x05 0x2c + 0xc1 2 0x06 0xf2 + 0xc1 2 0x07 0x9c + 0xc1 2 0x08 0x1b + 0xc1 2 0x09 0x82 + 0xc1 2 0x0a 0x3d + 0xc1 2 0x0b 0x20 + 0xc1 2 0x0c 0x11 + 0xc1 2 0x0d 0xc4 + 0xc1 2 0x0e 0x1a + 0xc1 2 0x0f 0x31 + 0xc1 2 0x10 0x4c + 0xc1 2 0x11 0x12 + 0xc1 2 0x12 0x90 + 0xc1 2 0x13 0xf7 + 0xc1 2 0x14 0x0c + 0xc1 2 0x15 0x20 + 0xc1 2 0x16 0x13 + 0xff 0>; /*ending*/ + init_off = <0xff 0>; /*ending*/ + }; + }; + +}; /* end of / */ diff --git a/arch/arm64/boot/dts/amlogic/tm2_t962x3_ab301.dts b/arch/arm64/boot/dts/amlogic/tm2_t962x3_ab301.dts index 08e7ebb2be8a..52aaa1423871 100644 --- a/arch/arm64/boot/dts/amlogic/tm2_t962x3_ab301.dts +++ b/arch/arm64/boot/dts/amlogic/tm2_t962x3_ab301.dts @@ -19,6 +19,7 @@ #include "mesontm2.dtsi" #include "partition_mbox_normal.dtsi" +#include "mesontm2_t962x3_ab301-panel.dtsi" / { model = "Amlogic TM2 T962E2 AB301"; @@ -92,6 +93,14 @@ linux,contiguous-region; }; + lcd_tcon_reserved:linux,lcd_tcon { + compatible = "shared-dma-pool"; + reusable; + size = <0x0 0xc00000>; + alignment = <0x0 0x400000>; + alloc-ranges = <0x0 0x7ec00000 0x0 0xc00000>; + }; + /* codec shared reserved */ codec_mm_reserved:linux,codec_mm_reserved { compatible = "amlogic, codec-mm-reserved"; @@ -1659,6 +1668,15 @@ output-low; }; }; +}; /* end of pinctrl_periphs */ + +&pinctrl_aobus { + spdifout: spdifout { + mux { /* gpiao_10 */ + groups = "spdif_out_ao"; + function = "spdif_out_ao"; + }; + }; }; /* end of pinctrl_periphs */ @@ -1854,6 +1872,10 @@ status = "okay"; }; +&pwm_cd { + status = "okay"; +}; + &saradc { status = "okay"; }; diff --git a/arch/arm64/boot/dts/amlogic/tm2_t962x3_ab309.dts b/arch/arm64/boot/dts/amlogic/tm2_t962x3_ab309.dts index 9a7baefae854..69b23ed7db54 100644 --- a/arch/arm64/boot/dts/amlogic/tm2_t962x3_ab309.dts +++ b/arch/arm64/boot/dts/amlogic/tm2_t962x3_ab309.dts @@ -19,9 +19,10 @@ #include "mesontm2.dtsi" #include "partition_mbox_normal.dtsi" +#include "mesontm2_t962x3_ab309-panel.dtsi" / { - model = "Amlogic TM2 T962E2 AB319"; + model = "Amlogic TM2 T962X3 AB309"; amlogic-dt-id = "tm2_t962x3_ab309"; compatible = "amlogic, tm2_t962x3_ab309"; diff --git a/drivers/amlogic/media/vout/backlight/aml_bl.c b/drivers/amlogic/media/vout/backlight/aml_bl.c index 275c99fe89e0..bec1f9996a15 100644 --- a/drivers/amlogic/media/vout/backlight/aml_bl.c +++ b/drivers/amlogic/media/vout/backlight/aml_bl.c @@ -3376,6 +3376,12 @@ static struct bl_data_s bl_data_sm1 = { .pwm_reg = pwm_reg_txlx, }; +static struct bl_data_s bl_data_tm2 = { + .chip_type = BL_CHIP_TM2, + .chip_name = "tm2", + .pwm_reg = pwm_reg_txlx, +}; + static const struct of_device_id bl_dt_match_table[] = { { .compatible = "amlogic, backlight-gxl", @@ -3413,6 +3419,10 @@ static const struct of_device_id bl_dt_match_table[] = { .compatible = "amlogic, backlight-sm1", .data = &bl_data_sm1, }, + { + .compatible = "amlogic, backlight-tm2", + .data = &bl_data_tm2, + }, {}, }; #endif diff --git a/drivers/amlogic/media/vout/backlight/aml_ldim/ldim_drv.c b/drivers/amlogic/media/vout/backlight/aml_ldim/ldim_drv.c index 5035be5d237c..6cfe4d25df26 100644 --- a/drivers/amlogic/media/vout/backlight/aml_ldim/ldim_drv.c +++ b/drivers/amlogic/media/vout/backlight/aml_ldim/ldim_drv.c @@ -3013,6 +3013,7 @@ int aml_ldim_probe(struct platform_device *pdev) /* ldim_op_func */ switch (bl_drv->data->chip_type) { case BL_CHIP_TL1: + case BL_CHIP_TM2: devp->ldim_op_func = &ldim_op_func_tl1; break; case BL_CHIP_TXLX: diff --git a/drivers/amlogic/media/vout/lcd/lcd_clk_config.c b/drivers/amlogic/media/vout/lcd/lcd_clk_config.c index cd776721a2d7..8f143badc2bf 100644 --- a/drivers/amlogic/media/vout/lcd/lcd_clk_config.c +++ b/drivers/amlogic/media/vout/lcd/lcd_clk_config.c @@ -2871,6 +2871,7 @@ static void lcd_clk_config_chip_init(struct lcd_clk_config_s *cConf) cConf->data = &lcd_clk_data_g12b_path0; break; case LCD_CHIP_TL1: + case LCD_CHIP_TM2: cConf->data = &lcd_clk_data_tl1; break; default: diff --git a/drivers/amlogic/media/vout/lcd/lcd_debug.c b/drivers/amlogic/media/vout/lcd/lcd_debug.c index bab975064fa4..0914100baeaf 100644 --- a/drivers/amlogic/media/vout/lcd/lcd_debug.c +++ b/drivers/amlogic/media/vout/lcd/lcd_debug.c @@ -597,6 +597,35 @@ static int lcd_info_print(char *buf, int offset) return len; } +static void lcd_reg_print_serializer(char *buf, int offset) +{ + struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver(); + unsigned int reg0, reg1; + int n, len = 0; + + switch (lcd_drv->data->chip_type) { + case LCD_CHIP_TL1: + case LCD_CHIP_TM2: + reg0 = HHI_LVDS_TX_PHY_CNTL0_TL1; + reg1 = HHI_LVDS_TX_PHY_CNTL1_TL1; + break; + default: + reg0 = HHI_LVDS_TX_PHY_CNTL0; + reg1 = HHI_LVDS_TX_PHY_CNTL1; + break; + } + + n = lcd_debug_info_len(len + offset); + len += snprintf((buf+len), n, "\nserializer regs:\n"); + n = lcd_debug_info_len(len + offset); + len += snprintf((buf+len), n, + "HHI_LVDS_TX_PHY_CNTL0 [0x%04x] = 0x%08x\n", + reg0, lcd_hiu_read(reg0)); + len += snprintf((buf+len), n, + "HHI_LVDS_TX_PHY_CNTL1 [0x%04x] = 0x%08x\n", + reg1, lcd_hiu_read(reg1)); +} + static int lcd_reg_print_ttl(char *buf, int offset) { unsigned int reg; @@ -4464,6 +4493,7 @@ int lcd_debug_probe(void) switch (lcd_drv->data->chip_type) { case LCD_CHIP_TL1: + case LCD_CHIP_TM2: lcd_debug_info_reg = &lcd_debug_info_reg_tl1; lcd_debug_info_if_lvds.reg_dump_phy = lcd_reg_print_phy_analog_tl1; diff --git a/drivers/amlogic/media/vout/lcd/lcd_phy_config.c b/drivers/amlogic/media/vout/lcd/lcd_phy_config.c new file mode 100644 index 000000000000..93e3042d0d2a --- /dev/null +++ b/drivers/amlogic/media/vout/lcd/lcd_phy_config.c @@ -0,0 +1,566 @@ +/* + * drivers/amlogic/media/vout/lcd/lcd_phy_config.c + * + * Copyright (C) 2017 Amlogic, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "lcd_reg.h" +#include "lcd_phy_config.h" +#include "lcd_common.h" + +static unsigned int lcd_lvds_channel_on_value(struct lcd_config_s *pconf) +{ + unsigned int channel_on = 0; + + if (pconf->lcd_control.lvds_config->dual_port == 0) { + if (pconf->lcd_control.lvds_config->lane_reverse == 0) { + switch (pconf->lcd_basic.lcd_bits) { + case 6: + channel_on = 0xf; + break; + case 8: + channel_on = 0x1f; + break; + case 10: + default: + channel_on = 0x3f; + break; + } + } else { + switch (pconf->lcd_basic.lcd_bits) { + case 6: + channel_on = 0x3c; + break; + case 8: + channel_on = 0x3e; + break; + case 10: + default: + channel_on = 0x3f; + break; + } + } + if (pconf->lcd_control.lvds_config->port_swap == 1) + channel_on = (channel_on << 6); /* use channel B */ + } else { + if (pconf->lcd_control.lvds_config->lane_reverse == 0) { + switch (pconf->lcd_basic.lcd_bits) { + case 6: + channel_on = 0x3cf; + break; + case 8: + channel_on = 0x7df; + break; + case 10: + default: + channel_on = 0xfff; + break; + } + } else { + switch (pconf->lcd_basic.lcd_bits) { + case 6: + channel_on = 0xf3c; + break; + case 8: + channel_on = 0xfbe; + break; + case 10: + default: + channel_on = 0xfff; + break; + } + } + } + return channel_on; +} + +void lcd_lvds_phy_set(struct lcd_config_s *pconf, int status) +{ + unsigned int vswing, preem, clk_vswing, clk_preem, channel_on; + unsigned int data32, size; + struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver(); + struct lvds_config_s *lvds_conf; + + if (lcd_debug_print_flag) + LCDPR("%s: %d\n", __func__, status); + + lvds_conf = pconf->lcd_control.lvds_config; + if (status) { + vswing = lvds_conf->phy_vswing & 0xf; + preem = lvds_conf->phy_preem & 0xf; + clk_vswing = lvds_conf->phy_clk_vswing & 0xf; + clk_preem = lvds_conf->phy_clk_preem & 0xf; + if (lcd_debug_print_flag) + LCDPR("vswing=0x%x, prrem=0x%x\n", vswing, preem); + + switch (lcd_drv->data->chip_type) { + case LCD_CHIP_TL1: + case LCD_CHIP_TM2: + size = sizeof(lvds_vx1_p2p_phy_preem_tl1) / + sizeof(unsigned int); + if (preem >= size) { + LCDERR("%s: invalid preem=0x%x, use default\n", + __func__, preem); + preem = 0; + } + data32 = lvds_vx1_p2p_phy_preem_tl1[preem]; + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, + 0xff2027e0 | vswing); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL15, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL16, 0x80000000); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL8, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL9, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL10, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL11, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL4, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL12, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL6, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL13, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL7, data32); + break; + default: + if (vswing > 7) { + LCDERR("%s: invalid vswing=0x%x, use default\n", + __func__, vswing); + vswing = LVDS_PHY_VSWING_DFT; + } + if (preem > 7) { + LCDERR("%s: invalid preem=0x%x, use default\n", + __func__, preem); + preem = LVDS_PHY_PREEM_DFT; + } + if (clk_vswing > 3) { + LCDERR( + "%s: invalid clk_vswing=0x%x, use default\n", + __func__, clk_vswing); + clk_vswing = LVDS_PHY_CLK_VSWING_DFT; + } + if (clk_preem > 7) { + LCDERR( + "%s: invalid clk_preem=0x%x, use default\n", + __func__, clk_preem); + clk_preem = LVDS_PHY_CLK_PREEM_DFT; + } + channel_on = lcd_lvds_channel_on_value(pconf); + + data32 = LVDS_PHY_CNTL1_G9TV | + (vswing << 26) | (preem << 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, data32); + data32 = LVDS_PHY_CNTL2_G9TV; + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, data32); + data32 = LVDS_PHY_CNTL3_G9TV | + (channel_on << 16) | + (clk_vswing << 8) | + (clk_preem << 5); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, data32); + break; + } + } else { + switch (lcd_drv->data->chip_type) { + case LCD_CHIP_TL1: + case LCD_CHIP_TM2: + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL15, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL16, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL8, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL9, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL10, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL11, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL4, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL12, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL6, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL13, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL7, 0); + break; + default: + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, 0x0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, 0x0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, 0x0); + break; + } + } +} + +void lcd_vbyone_phy_set(struct lcd_config_s *pconf, int status) +{ + unsigned int vswing, preem, ext_pullup; + unsigned int data32, size; + unsigned int rinner_table[] = {0xa, 0xa, 0x6, 0x4}; + struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver(); + struct vbyone_config_s *vbyone_conf; + + if (lcd_debug_print_flag) + LCDPR("%s: %d\n", __func__, status); + + vbyone_conf = pconf->lcd_control.vbyone_config; + if (status) { + ext_pullup = (vbyone_conf->phy_vswing >> 4) & 0x3; + vswing = vbyone_conf->phy_vswing & 0xf; + preem = vbyone_conf->phy_preem & 0xf; + if (lcd_debug_print_flag) { + LCDPR("vswing=0x%x, prrem=0x%x\n", + vbyone_conf->phy_vswing, preem); + } + + switch (lcd_drv->data->chip_type) { + case LCD_CHIP_TL1: + case LCD_CHIP_TM2: + size = sizeof(lvds_vx1_p2p_phy_preem_tl1) / + sizeof(unsigned int); + if (preem >= size) { + LCDERR("%s: invalid preem=0x%x, use default\n", + __func__, preem); + preem = 0x1; + } + data32 = lvds_vx1_p2p_phy_preem_tl1[preem]; + if (ext_pullup) { + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, + 0xff2027e0 | vswing); + } else { + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, + 0xf02027a0 | vswing); + } + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL15, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL16, 0x80000000); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL8, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL9, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL10, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL11, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL4, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL12, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL6, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL13, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL7, data32); + break; + default: + if (vswing > 7) { + LCDERR("%s: invalid vswing=0x%x, use default\n", + __func__, vswing); + vswing = VX1_PHY_VSWING_DFT; + } + if (preem > 7) { + LCDERR("%s: invalid preem=0x%x, use default\n", + __func__, preem); + preem = VX1_PHY_PREEM_DFT; + } + if (ext_pullup) { + data32 = VX1_PHY_CNTL1_G9TV_PULLUP | + (vswing << 3); + } else { + data32 = VX1_PHY_CNTL1_G9TV | (vswing << 3); + } + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, data32); + data32 = VX1_PHY_CNTL2_G9TV | (preem << 20) | + (rinner_table[ext_pullup] << 8); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, data32); + data32 = VX1_PHY_CNTL3_G9TV; + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, data32); + break; + } + } else { + switch (lcd_drv->data->chip_type) { + case LCD_CHIP_TL1: + case LCD_CHIP_TM2: + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL15, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL16, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL8, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL9, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL10, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL11, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL4, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL12, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL6, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL13, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL7, 0); + break; + default: + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, 0x0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, 0x0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, 0x0); + break; + } + } +} + +void lcd_mlvds_phy_set(struct lcd_config_s *pconf, int status) +{ + unsigned int vswing, preem; + unsigned int data32, size, cntl16; + struct mlvds_config_s *mlvds_conf; + + if (lcd_debug_print_flag) + LCDPR("%s: %d\n", __func__, status); + + mlvds_conf = pconf->lcd_control.mlvds_config; + if (status) { + vswing = mlvds_conf->phy_vswing & 0xf; + preem = mlvds_conf->phy_preem & 0xf; + if (lcd_debug_print_flag) + LCDPR("vswing=0x%x, prrem=0x%x\n", vswing, preem); + + size = sizeof(lvds_vx1_p2p_phy_preem_tl1) / + sizeof(unsigned int); + if (preem >= size) { + LCDERR("%s: invalid preem=0x%x, use default\n", + __func__, preem); + preem = 0; + } + data32 = lvds_vx1_p2p_phy_preem_tl1[preem]; + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, + 0xff2027e0 | vswing); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL15, 0); + cntl16 = (mlvds_conf->pi_clk_sel << 12); + cntl16 |= 0x80000000; + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL16, cntl16); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL8, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL9, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL10, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL11, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL4, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL12, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL6, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL13, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL7, data32); + } else { + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL15, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL16, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL8, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL9, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL10, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL11, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL4, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL12, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL6, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL13, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL7, 0); + } +} + +void lcd_p2p_phy_set(struct lcd_config_s *pconf, int status) +{ + unsigned int vswing, preem; + unsigned int data32, size, cntl16; + struct p2p_config_s *p2p_conf; + + if (lcd_debug_print_flag) + LCDPR("%s: %d\n", __func__, status); + + p2p_conf = pconf->lcd_control.p2p_config; + if (status) { + vswing = p2p_conf->phy_vswing & 0xf; + preem = p2p_conf->phy_preem & 0xf; + if (lcd_debug_print_flag) + LCDPR("vswing=0x%x, prrem=0x%x\n", vswing, preem); + + switch (p2p_conf->p2p_type) { + case P2P_CEDS: + case P2P_CMPI: + case P2P_ISP: + case P2P_EPI: + size = sizeof(lvds_vx1_p2p_phy_preem_tl1) / + sizeof(unsigned int); + if (preem >= size) { + LCDERR("%s: invalid preem=0x%x, use default\n", + __func__, preem); + preem = 0x1; + } + data32 = lvds_vx1_p2p_phy_preem_tl1[preem]; + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, + 0xff2027a0 | vswing); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL15, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL16, 0x80000000); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL8, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL9, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL10, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL11, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL4, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL12, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL6, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL13, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL7, data32); + break; + case P2P_CHPI: /* low common mode */ + case P2P_CSPI: + case P2P_USIT: + size = sizeof(p2p_low_common_phy_preem_tl1) / + sizeof(unsigned int); + if (preem >= size) { + LCDERR("%s: invalid preem=0x%x, use default\n", + __func__, preem); + preem = 0x1; + } + data32 = p2p_low_common_phy_preem_tl1[preem]; + cntl16 = 0x80000000; + if (p2p_conf->p2p_type == P2P_CHPI) { + /* weakly pull down */ + data32 &= ~((1 << 19) | (1 << 3)); + } + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, 0xfe60027f); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL15, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL16, cntl16); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL8, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL9, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL10, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL11, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL4, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL12, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL6, data32); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL13, 0x40004); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL7, data32); + break; + default: + LCDERR("%s: invalid p2p_type %d\n", + __func__, p2p_conf->p2p_type); + break; + } + } else { + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL14, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL15, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL16, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL8, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL1, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL9, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL2, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL10, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL3, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL11, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL4, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL12, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL6, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL13, 0); + lcd_hiu_write(HHI_DIF_CSI_PHY_CNTL7, 0); + } +} + +void lcd_mipi_phy_set(struct lcd_config_s *pconf, int status) +{ + unsigned int phy_reg, phy_bit, phy_width; + unsigned int lane_cnt; + struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver(); + + if (status) { + switch (lcd_drv->data->chip_type) { + case LCD_CHIP_G12A: + case LCD_CHIP_G12B: + case LCD_CHIP_SM1: + /* HHI_MIPI_CNTL0 */ + /* DIF_REF_CTL1:31-16bit, DIF_REF_CTL0:15-0bit */ + lcd_hiu_write(HHI_MIPI_CNTL0, + (0xa487 << 16) | (0x8 << 0)); + + /* HHI_MIPI_CNTL1 */ + /* DIF_REF_CTL2:15-0bit; bandgap bit16 */ + lcd_hiu_write(HHI_MIPI_CNTL1, + (0x1 << 16) | (0x002e << 0)); + + /* HHI_MIPI_CNTL2 */ + /* DIF_TX_CTL1:31-16bit, DIF_TX_CTL0:15-0bit */ + lcd_hiu_write(HHI_MIPI_CNTL2, + (0x2680 << 16) | (0x45a << 0)); + break; + default: /* LCD_CHIP_AXG */ + /* HHI_MIPI_CNTL0 */ + /* DIF_REF_CTL1:31-16bit, DIF_REF_CTL0:15-0bit */ + lcd_hiu_setb(HHI_MIPI_CNTL0, 0x1b8, 16, 10); + lcd_hiu_setb(HHI_MIPI_CNTL0, 1, 26, 1); /* bandgap */ + lcd_hiu_setb(HHI_MIPI_CNTL0, 1, 29, 1); /* current */ + lcd_hiu_setb(HHI_MIPI_CNTL0, 1, 31, 1); + lcd_hiu_setb(HHI_MIPI_CNTL0, 0x8, 0, 16); + + /* HHI_MIPI_CNTL1 */ + /* DIF_REF_CTL2:15-0bit */ + lcd_hiu_write(HHI_MIPI_CNTL1, (0x001e << 0)); + + /* HHI_MIPI_CNTL2 */ + /* DIF_TX_CTL1:31-16bit, DIF_TX_CTL0:15-0bit */ + lcd_hiu_write(HHI_MIPI_CNTL2, + (0x26e0 << 16) | (0x459 << 0)); + break; + } + + phy_reg = HHI_MIPI_CNTL2; + phy_bit = MIPI_PHY_LANE_BIT; + phy_width = MIPI_PHY_LANE_WIDTH; + switch (pconf->lcd_control.mipi_config->lane_num) { + case 1: + lane_cnt = DSI_LANE_COUNT_1; + break; + case 2: + lane_cnt = DSI_LANE_COUNT_2; + break; + case 3: + lane_cnt = DSI_LANE_COUNT_3; + break; + case 4: + lane_cnt = DSI_LANE_COUNT_4; + break; + default: + lane_cnt = 0; + break; + } + lcd_hiu_setb(phy_reg, lane_cnt, phy_bit, phy_width); + } else { + switch (lcd_drv->data->chip_type) { + case LCD_CHIP_G12A: + case LCD_CHIP_G12B: + case LCD_CHIP_SM1: + lcd_hiu_write(HHI_MIPI_CNTL0, 0); + lcd_hiu_write(HHI_MIPI_CNTL1, 0); + lcd_hiu_write(HHI_MIPI_CNTL2, 0); + break; + default:/* LCD_CHIP_AXG */ + lcd_hiu_setb(HHI_MIPI_CNTL0, 0, 16, 10); + lcd_hiu_setb(HHI_MIPI_CNTL0, 0, 31, 1); + lcd_hiu_setb(HHI_MIPI_CNTL0, 0, 0, 16); + lcd_hiu_write(HHI_MIPI_CNTL1, 0x6); + lcd_hiu_write(HHI_MIPI_CNTL2, 0x00200000); + break; + } + } +} diff --git a/drivers/amlogic/media/vout/lcd/lcd_tablet/lcd_drv.c b/drivers/amlogic/media/vout/lcd/lcd_tablet/lcd_drv.c index 02659768e24c..57db7a9100f1 100644 --- a/drivers/amlogic/media/vout/lcd/lcd_tablet/lcd_drv.c +++ b/drivers/amlogic/media/vout/lcd/lcd_tablet/lcd_drv.c @@ -376,7 +376,9 @@ static void lcd_venc_set(struct lcd_config_s *pconf) switch (lcd_drv->data->chip_type) { case LCD_CHIP_TL1: - lcd_vcbus_write(ENCL_INBUF_CNTL1, (1 << 14) | (h_active - 1)); + case LCD_CHIP_TM2: + /*[15:14]: 2'b10 or 2'b01*/ + lcd_vcbus_write(ENCL_INBUF_CNTL1, (2 << 14) | (h_active - 1)); lcd_vcbus_write(ENCL_INBUF_CNTL0, 0x200); break; default: @@ -412,6 +414,19 @@ static void lcd_ttl_control_set(struct lcd_config_s *pconf) static void lcd_lvds_clk_util_set(struct lcd_config_s *pconf) { unsigned int phy_div; + unsigned int reg_cntl0, reg_cntl1; + + switch (lcd_drv->data->chip_type) { + case LCD_CHIP_TL1: + case LCD_CHIP_TM2: + reg_cntl0 = HHI_LVDS_TX_PHY_CNTL0_TL1; + reg_cntl1 = HHI_LVDS_TX_PHY_CNTL1_TL1; + break; + default: + reg_cntl0 = HHI_LVDS_TX_PHY_CNTL0; + reg_cntl1 = HHI_LVDS_TX_PHY_CNTL1; + break; + } if (pconf->lcd_control.lvds_config->dual_port) phy_div = 2; @@ -421,7 +436,15 @@ static void lcd_lvds_clk_util_set(struct lcd_config_s *pconf) /* set fifo_clk_sel: div 7 */ lcd_hiu_write(HHI_LVDS_TX_PHY_CNTL0, (1 << 6)); /* set cntl_ser_en: 8-channel to 1 */ - lcd_hiu_setb(HHI_LVDS_TX_PHY_CNTL0, 0xfff, 16, 12); + lcd_hiu_setb(reg_cntl0, 0xfff, 16, 12); + switch (lcd_drv->data->chip_type) { /* pn swap */ + case LCD_CHIP_TL1: + case LCD_CHIP_TM2: + lcd_hiu_setb(reg_cntl0, 1, 2, 1); + break; + default: + break; + } /* decoupling fifo enable, gated clock enable */ lcd_hiu_write(HHI_LVDS_TX_PHY_CNTL1, @@ -482,10 +505,18 @@ static void lcd_lvds_control_set(struct lcd_config_s *pconf) (1 << 12) | /* g_select //0:R, 1:G, 2:B, 3:0 */ (2 << 14)); /* b_select //0:R, 1:G, 2:B, 3:0 */ - lcd_vcbus_setb(LCD_PORT_SWAP, port_swap, 12, 1); - - if (lane_reverse) - lcd_vcbus_setb(LVDS_GEN_CNTL, 0x03, 13, 2); + switch (lcd_drv->data->chip_type) { + case LCD_CHIP_TL1: + case LCD_CHIP_TM2: + lcd_vcbus_write(P2P_CH_SWAP0, 0x76543210); + lcd_vcbus_write(P2P_CH_SWAP1, 0xba98); + break; + default: + lcd_vcbus_setb(LCD_PORT_SWAP, port_swap, 12, 1); + if (lane_reverse) + lcd_vcbus_setb(LVDS_GEN_CNTL, 0x03, 13, 2); + break; + } lcd_vcbus_write(LVDS_GEN_CNTL, (lcd_vcbus_read(LVDS_GEN_CNTL) | @@ -512,6 +543,20 @@ static void lcd_vbyone_clk_util_set(struct lcd_config_s *pconf) { unsigned int lcd_bits; unsigned int div_sel, phy_div; + struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver(); + unsigned int reg_cntl0, reg_cntl1; + + switch (lcd_drv->data->chip_type) { + case LCD_CHIP_TL1: + case LCD_CHIP_TM2: + reg_cntl0 = HHI_LVDS_TX_PHY_CNTL0_TL1; + reg_cntl1 = HHI_LVDS_TX_PHY_CNTL1_TL1; + break; + default: + reg_cntl0 = HHI_LVDS_TX_PHY_CNTL0; + reg_cntl1 = HHI_LVDS_TX_PHY_CNTL1; + break; + } phy_div = pconf->lcd_control.vbyone_config->phy_div; lcd_bits = pconf->lcd_basic.lcd_bits; @@ -533,7 +578,15 @@ static void lcd_vbyone_clk_util_set(struct lcd_config_s *pconf) /* set fifo_clk_sel */ lcd_hiu_write(HHI_LVDS_TX_PHY_CNTL0, (div_sel << 6)); /* set cntl_ser_en: 8-channel to 1 */ - lcd_hiu_setb(HHI_LVDS_TX_PHY_CNTL0, 0xfff, 16, 12); + lcd_hiu_setb(reg_cntl0, 0xfff, 16, 12); + switch (lcd_drv->data->chip_type) { /* pn swap */ + case LCD_CHIP_TL1: + case LCD_CHIP_TM2: + lcd_hiu_setb(reg_cntl0, 1, 2, 1); + break; + default: + break; + } /* decoupling fifo enable, gated clock enable */ lcd_hiu_write(HHI_LVDS_TX_PHY_CNTL1, @@ -726,7 +779,22 @@ static void lcd_vbyone_control_set(struct lcd_config_s *pconf) /* lcd_vcbus_setb(LCD_PORT_SWAP, 1, 8, 1);//reverse lane output order */ /* Mux pads in combo-phy: 0 for dsi; 1 for lvds or vbyone; 2 for edp */ - lcd_hiu_write(HHI_DSI_LVDS_EDP_CNTL0, 0x1); + /*lcd_hiu_write(HHI_DSI_LVDS_EDP_CNTL0, 0x1);*/ + + switch (lcd_drv->data->chip_type) { + case LCD_CHIP_TL1: + case LCD_CHIP_TM2: + lcd_vcbus_write(VBO_INFILTER_TICK_PERIOD_L, 0xff); + lcd_vcbus_write(VBO_INFILTER_TICK_PERIOD_H, 0x0); + lcd_vcbus_setb(VBO_INSGN_CTRL, 0x7, 8, 4); + lcd_vcbus_setb(VBO_INSGN_CTRL, 0x7, 12, 4); + break; + default: + lcd_vcbus_write(VBO_INFILTER_CTRL, 0xff77); + break; + } + lcd_vcbus_setb(VBO_INSGN_CTRL, 0, 2, 2); + lcd_vcbus_setb(VBO_CTRL_L, 1, 0, 1); /*force vencl clk enable, otherwise, it might auto turn off by mipi DSI diff --git a/drivers/amlogic/media/vout/lcd/lcd_tcon.c b/drivers/amlogic/media/vout/lcd/lcd_tcon.c index 76a90b826679..b4fd006ff7b9 100644 --- a/drivers/amlogic/media/vout/lcd/lcd_tcon.c +++ b/drivers/amlogic/media/vout/lcd/lcd_tcon.c @@ -649,7 +649,7 @@ int lcd_tcon_probe(struct aml_lcd_drv_s *lcd_drv) switch (lcd_drv->data->chip_type) { case LCD_CHIP_TL1: - lcd_tcon_data = &tcon_data_tl1; + case LCD_CHIP_TM2: switch (lcd_drv->lcd_config->lcd_basic.lcd_type) { case LCD_MLVDS: case LCD_P2P: diff --git a/drivers/amlogic/media/vout/lcd/lcd_tv/lcd_drv.c b/drivers/amlogic/media/vout/lcd/lcd_tv/lcd_drv.c index 28a231f15634..d06ce74856a9 100644 --- a/drivers/amlogic/media/vout/lcd/lcd_tv/lcd_drv.c +++ b/drivers/amlogic/media/vout/lcd/lcd_tv/lcd_drv.c @@ -379,7 +379,9 @@ static void lcd_venc_set(struct lcd_config_s *pconf) switch (lcd_drv->data->chip_type) { case LCD_CHIP_TL1: - lcd_vcbus_write(ENCL_INBUF_CNTL1, (1 << 14) | (h_active - 1)); + case LCD_CHIP_TM2: + /*[15:14]: 2'b10 or 2'b01*/ + lcd_vcbus_write(ENCL_INBUF_CNTL1, (2 << 14) | (h_active - 1)); lcd_vcbus_write(ENCL_INBUF_CNTL0, 0x200); break; default: @@ -407,6 +409,7 @@ static void lcd_lvds_clk_util_set(struct lcd_config_s *pconf) switch (lcd_drv->data->chip_type) { case LCD_CHIP_TL1: + case LCD_CHIP_TM2: reg_cntl0 = HHI_LVDS_TX_PHY_CNTL0_TL1; reg_cntl1 = HHI_LVDS_TX_PHY_CNTL1_TL1; break; @@ -427,6 +430,7 @@ static void lcd_lvds_clk_util_set(struct lcd_config_s *pconf) lcd_hiu_setb(reg_cntl0, 0xfff, 16, 12); switch (lcd_drv->data->chip_type) { /* pn swap */ case LCD_CHIP_TL1: + case LCD_CHIP_TM2: lcd_hiu_setb(reg_cntl0, 1, 2, 1); break; default: @@ -496,12 +500,9 @@ static void lcd_lvds_control_set(struct lcd_config_s *pconf) switch (lcd_drv->data->chip_type) { case LCD_CHIP_TL1: - ch_swap0 = 0x3210; - ch_swap1 = 0x7654; - ch_swap2 = 0xba98; - lcd_vcbus_write(LVDS_CH_SWAP0, ch_swap0); - lcd_vcbus_write(LVDS_CH_SWAP1, ch_swap1); - lcd_vcbus_write(LVDS_CH_SWAP2, ch_swap2); + case LCD_CHIP_TM2: + lcd_vcbus_write(P2P_CH_SWAP0, 0x76543210); + lcd_vcbus_write(P2P_CH_SWAP1, 0xba98); break; default: lcd_vcbus_setb(LCD_PORT_SWAP, port_swap, 12, 1); @@ -635,6 +636,7 @@ static void lcd_vbyone_clk_util_set(struct lcd_config_s *pconf) switch (lcd_drv->data->chip_type) { case LCD_CHIP_TL1: + case LCD_CHIP_TM2: reg_cntl0 = HHI_LVDS_TX_PHY_CNTL0_TL1; reg_cntl1 = HHI_LVDS_TX_PHY_CNTL1_TL1; break; @@ -667,6 +669,7 @@ static void lcd_vbyone_clk_util_set(struct lcd_config_s *pconf) lcd_hiu_setb(reg_cntl0, 0xfff, 16, 12); switch (lcd_drv->data->chip_type) { /* pn swap */ case LCD_CHIP_TL1: + case LCD_CHIP_TM2: lcd_hiu_setb(reg_cntl0, 1, 2, 1); break; default: @@ -766,6 +769,7 @@ static void lcd_vbyone_hw_filter(int flag) switch (lcd_drv->data->chip_type) { case LCD_CHIP_TL1: + case LCD_CHIP_TM2: if (flag) { lcd_vcbus_write(VBO_INFILTER_TICK_PERIOD_L, 0xffff); lcd_vcbus_write(VBO_INFILTER_TICK_PERIOD_H, 0xf); @@ -1450,6 +1454,7 @@ static void lcd_p2p_control_set(struct lcd_config_s *pconf) switch (lcd_drv->data->chip_type) { case LCD_CHIP_TL1: + case LCD_CHIP_TM2: reg_cntl0 = HHI_LVDS_TX_PHY_CNTL0_TL1; reg_cntl1 = HHI_LVDS_TX_PHY_CNTL1_TL1; break; diff --git a/drivers/amlogic/media/vout/lcd/lcd_vout.c b/drivers/amlogic/media/vout/lcd/lcd_vout.c index f804126f766e..95c87fd6612f 100644 --- a/drivers/amlogic/media/vout/lcd/lcd_vout.c +++ b/drivers/amlogic/media/vout/lcd/lcd_vout.c @@ -1371,6 +1371,12 @@ static struct lcd_data_s lcd_data_sm1 = { .reg_map_table = &lcd_reg_axg[0], }; +static struct lcd_data_s lcd_data_tm2 = { + .chip_type = LCD_CHIP_TM2, + .chip_name = "tm2", + .reg_map_table = &lcd_reg_tl1[0], +}; + static const struct of_device_id lcd_dt_match_table[] = { { .compatible = "amlogic, lcd-gxl", @@ -1408,6 +1414,10 @@ static const struct of_device_id lcd_dt_match_table[] = { .compatible = "amlogic, lcd-sm1", .data = &lcd_data_sm1, }, + { + .compatible = "amlogic, lcd-tm2", + .data = &lcd_data_tm2, + }, {}, }; #endif diff --git a/include/linux/amlogic/media/vout/lcd/aml_bl.h b/include/linux/amlogic/media/vout/lcd/aml_bl.h index 04dc80b0171b..4b33bcb24076 100644 --- a/include/linux/amlogic/media/vout/lcd/aml_bl.h +++ b/include/linux/amlogic/media/vout/lcd/aml_bl.h @@ -51,6 +51,7 @@ enum bl_chip_type_e { BL_CHIP_G12B, BL_CHIP_TL1, BL_CHIP_SM1, + BL_CHIP_TM2, BL_CHIP_MAX, }; diff --git a/include/linux/amlogic/media/vout/lcd/lcd_vout.h b/include/linux/amlogic/media/vout/lcd/lcd_vout.h index 62fbc8b07952..d7a3632ee928 100644 --- a/include/linux/amlogic/media/vout/lcd/lcd_vout.h +++ b/include/linux/amlogic/media/vout/lcd/lcd_vout.h @@ -93,6 +93,7 @@ enum lcd_chip_e { LCD_CHIP_G12B, /* 6 */ LCD_CHIP_TL1, /* 7 */ LCD_CHIP_SM1, /* 8 */ + LCD_CHIP_TM2, /* 9 */ LCD_CHIP_MAX, };