From 459a08874a860653a7bd2d8e9d39b17a40cdd88d Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Mon, 12 Oct 2020 11:33:51 +0800
Subject: [PATCH] clk/rockchip/regmap: pll: limit postdiv2 max value

Change-Id: I0dcb5001960cf0dcaa82f992b7d428f6d08678ff
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 drivers/clk/rockchip/regmap/clk-regmap-pll.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/clk/rockchip/regmap/clk-regmap-pll.c b/drivers/clk/rockchip/regmap/clk-regmap-pll.c
index 1747fff88811..ef95e1169af9 100644
--- a/drivers/clk/rockchip/regmap/clk-regmap-pll.c
+++ b/drivers/clk/rockchip/regmap/clk-regmap-pll.c
@@ -152,6 +152,9 @@ static long clk_pll_round_rate(unsigned long fin, unsigned long fout,
 				break;
 		}
 
+		if (_postdiv2 > 7)
+			return -EINVAL;
+
 		fout *= _postdiv1 * _postdiv2;
 	} else {
 		_postdiv1 = 1;