From 464312fc6cd913c34e0c04212eb68d2ca0959d84 Mon Sep 17 00:00:00 2001
From: Zefa Chen <zefa.chen@rock-chips.com>
Date: Mon, 3 Oct 2022 21:38:56 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3568 separate the node of csi2 and hw

Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
Change-Id: Ia3694d29ee53a1ccd46e2e375eed94ce45dcf1fc
---
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 550877545997..d58fbd005cd5 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -374,6 +374,12 @@
 		};
 	};
 
+	mipi_csi2: mipi-csi2 {
+		compatible = "rockchip,rk3568-mipi-csi2";
+		rockchip,hw = <&mipi_csi2_hw>;
+		status = "disabled";
+	};
+
 	mpp_srv: mpp-srv {
 		compatible = "rockchip,mpp-service";
 		rockchip,taskqueue-count = <6>;
@@ -1574,8 +1580,8 @@
 		status = "disabled";
 	};
 
-	mipi_csi2: mipi-csi2@fdfb0000 {
-		compatible = "rockchip,rk3568-mipi-csi2";
+	mipi_csi2_hw: mipi-csi2-hw@fdfb0000 {
+		compatible = "rockchip,rk3568-mipi-csi2-hw";
 		reg = <0x0 0xfdfb0000 0x0 0x10000>;
 		reg-names = "csihost_regs";
 		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
@@ -1585,7 +1591,7 @@
 		clock-names = "pclk_csi2host";
 		resets = <&cru SRST_P_CSI2HOST1>;
 		reset-names = "srst_csihost_p";
-		status = "disabled";
+		status = "okay";
 	};
 
 	rkcif: rkcif@fdfe0000 {