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dts: rk3368-box.dts fix rk1000 tve probe error and reduce the frequency of EMMC to 100M
This commit is contained in:
@@ -11,7 +11,7 @@
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/ {
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chosen {
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bootargs = "earlyprintk=uart8250-32bit,0xff690000 clk_ignore_unused";
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bootargs = "earlyprintk=uart8250-32bit,0xff690000";
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};
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wireless-wlan {
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@@ -270,16 +270,16 @@
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};
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&emmc {
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clock-frequency = <150000000>;
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clock-freq-min-max = <400000 150000000>;
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clock-frequency = <100000000>;
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clock-freq-min-max = <400000 100000000>;
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supports-highspeed;
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supports-emmc;
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bootpart-no-access;
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//supports-tSD;
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supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
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caps2-mmc-hs200;
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//supports-DDR_MODE; //you should set the two value in your project. only close in RK3288-SDK board.
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//caps2-mmc-hs200;
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ignore-pm-notify;
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keep-power-in-suspend;
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@@ -402,6 +402,12 @@
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pinctrl-0 = <&uart0_xfer &uart0_cts>;
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};
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&tsadc {
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tsadc-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
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//tsadc-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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syr827: syr827@40 {
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@@ -419,7 +425,7 @@
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regulator-max-microvolt = <1500000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-mode = <0x2>;
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regulator-initial-mode = <0x1>;
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regulator-initial-state = <3>;
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regulator-state-mem {
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regulator-state-mode = <0x2>;
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@@ -444,7 +450,7 @@
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regulator-max-microvolt = <1500000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-initial-mode = <0x2>;
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regulator-initial-mode = <0x1>;
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regulator-initial-state = <3>;
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regulator-state-mem {
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regulator-state-mode = <0x2>;
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@@ -607,9 +613,12 @@
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rockchip,mirror = <NO_MIRROR>;
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rockchip,cabc_mode = <0>;
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rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&lcdc_lcdc>;
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pinctrl-1 = <&lcdc_gpio>;
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power_ctr: power_ctr {
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rockchip,debug = <0>;
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lcd_en:lcd_en {
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/*lcd_en:lcd_en {
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rockchip,power_type = <GPIO>;
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gpios = <&gpio0 GPIO_C6 GPIO_ACTIVE_HIGH>;
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rockchip,delay = <10>;
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@@ -621,7 +630,7 @@
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rockchip,delay = <10>;
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};
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/*lcd_rst:lcd_rst {
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lcd_rst:lcd_rst {
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rockchip,power_type = <GPIO>;
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gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
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rockchip,delay = <5>;
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@@ -706,6 +715,51 @@
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&pwm1 {
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status = "okay";
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};
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&clk_core_b_dvfs_table {
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operating-points = <
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/* KHz uV */
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216000 950000
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312000 950000
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408000 950000
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600000 975000
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696000 975000
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816000 1000000
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1008000 1100000
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1200000 1175000
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1416000 1300000
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1488000 1325000
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1512000 1350000
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>;
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status = "okay";
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};
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&clk_core_l_dvfs_table {
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operating-points = <
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/* KHz uV */
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216000 950000
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312000 950000
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408000 950000
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600000 950000
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696000 975000
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816000 1050000
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1008000 1100000
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1200000 1250000
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//1300000 1300000
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>;
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status = "okay";
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};
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&clk_gpu_dvfs_table {
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operating-points = <
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/* KHz uV */
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200000 1200000
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300000 1200000
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400000 1200000
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600000 1200000
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>;
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};
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&clk_ddr_dvfs_table {
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operating-points = <
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/* KHz uV */
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