From 46e88184cc4763feca230901b4f067a42df9e207 Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Fri, 12 Nov 2021 09:28:32 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3588s: init pll_aupll to 786M Signed-off-by: Elaine Zhang Change-Id: I2e552dc3a390c273f46d52a55c641697a66a7719 --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 205b973f090a..3dae9bf2cad2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -603,7 +603,7 @@ #reset-cells = <1>; assigned-clocks = - <&cru PLL_PPLL>, + <&cru PLL_PPLL>, <&cru PLL_AUPLL>, <&cru PLL_NPLL>, <&cru PLL_GPLL>, <&cru ARMCLK_L>, <&cru ARMCLK_B01>, <&cru ARMCLK_B23>, @@ -613,8 +613,8 @@ <&cru ACLK_LOW_TOP_ROOT>, <&cru PCLK_PMU0_ROOT>, <&cru HCLK_PMU_CM0_ROOT>, <&cru ACLK_VOP>; assigned-clock-rates = - <100000000>, - <850000000>, <1188000000>, + <100000000>, <786000000>, + <850000000>, <1188000000>, <816000000>, <1008000000>, <1008000000>, <600000000>, <200000000>,