From 46edc7c8671559b048bb4f101db9f0c9ba60d67f Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Thu, 14 Mar 2024 10:44:41 +0800 Subject: [PATCH] clk: rockchip: rk3576: add CLK_SET_RATE_NO_REPARENT for ebc Change-Id: If6f10948f96156b9a26cb10c7bf8f7edac6038bb Signed-off-by: Elaine Zhang --- drivers/clk/rockchip/clk-rk3576.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3576.c b/drivers/clk/rockchip/clk-rk3576.c index 107571487285..4a945d9bfe34 100644 --- a/drivers/clk/rockchip/clk-rk3576.c +++ b/drivers/clk/rockchip/clk-rk3576.c @@ -1294,13 +1294,13 @@ static struct rockchip_clk_branch rk3576_clk_branches[] __initdata = { MUX(0, "dclk_ebc_frac_src_p", gpll_cpll_vpll_aupll_24m_p, 0, RK3576_CLKSEL_CON(123), 0, 3, MFLAGS), COMPOSITE_FRAC(DCLK_EBC_FRAC_SRC, "dclk_ebc_frac_src", "dclk_ebc_frac_src_p", 0, - RK3576_CLKSEL_CON(122), 0, + RK3576_CLKSEL_CON(122), CLK_FRAC_DIVIDER_NO_LIMIT, RK3576_CLKGATE_CON(50), 9, GFLAGS), GATE(ACLK_EBC, "aclk_ebc", "aclk_vpu_low_root", 0, RK3576_CLKGATE_CON(50), 11, GFLAGS), GATE(HCLK_EBC, "hclk_ebc", "hclk_vpu_root", 0, RK3576_CLKGATE_CON(50), 10, GFLAGS), - COMPOSITE(DCLK_EBC, "dclk_ebc", dclk_ebc_p, 0, + COMPOSITE(DCLK_EBC, "dclk_ebc", dclk_ebc_p, CLK_SET_RATE_NO_REPARENT, RK3576_CLKSEL_CON(123), 12, 3, MFLAGS, 3, 9, DFLAGS, RK3576_CLKGATE_CON(50), 12, GFLAGS),