From 471ad265e4f635c2179693e126591f0d34bb3d0b Mon Sep 17 00:00:00 2001 From: Wu Liangqing Date: Tue, 9 Mar 2021 09:32:24 +0800 Subject: [PATCH] arm64: dts: rockchip: add rk3566-evb-mipitest-v10 board Signed-off-by: Wu Liangqing Change-Id: Ic46f1db90f10c3f78858ff83875c18dc6eb78822 --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../dts/rockchip/rk3566-evb-mipitest-v10.dts | 7 + .../dts/rockchip/rk3566-evb-mipitest-v10.dtsi | 513 ++++++++++++++++++ 3 files changed, 521 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-evb-mipitest-v10.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-evb-mipitest-v10.dtsi diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 27441e600f24..d5f17f05e87d 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -70,6 +70,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-evb-v10-linux.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-evb-v11-linux.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-evb-v14-linux.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-box-demo-v10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb-mipitest-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb1-ddr4-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb1-ddr4-v10-linux.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb1-ddr4-v10-lvds.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3566-evb-mipitest-v10.dts b/arch/arm64/boot/dts/rockchip/rk3566-evb-mipitest-v10.dts new file mode 100644 index 000000000000..3f215884a070 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-evb-mipitest-v10.dts @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd. + */ + +#include "rk3566-evb-mipitest-v10.dtsi" +#include "rk3568-android.dtsi" diff --git a/arch/arm64/boot/dts/rockchip/rk3566-evb-mipitest-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-evb-mipitest-v10.dtsi new file mode 100644 index 000000000000..89e22123658f --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-evb-mipitest-v10.dtsi @@ -0,0 +1,513 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd. + */ + +/dts-v1/; + +#include +#include +#include "rk3566.dtsi" +#include "rk3566-evb.dtsi" + +/ { + model = "Rockchip RK3566 EVB MIPITEST V10 Board"; + compatible = "rockchip,rk3566-evb-mipitest-v10", "rockchip,rk3566"; + + pcie20_3v3: gpio-regulator { + compatible = "regulator-gpio"; + regulator-name = "pcie20_3v3"; + regulator-min-microvolt = <0100000>; + regulator-max-microvolt = <3300000>; + gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; + gpios-states = <0x1>; + states = <0100000 0x0 + 3300000 0x1>; + }; + + rk_headset: rk-headset { + compatible = "rockchip_headset"; + headset_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&hp_det>; + }; + + vcc3v3_vga: vcc3v3-vga { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_vga"; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vcc3v3_sys>; + }; + + vcc_camera: vcc-camera-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&camera_pwr>; + regulator-name = "vcc_camera"; + enable-active-high; + regulator-always-on; + regulator-boot-on; + }; +}; + +&audiopwmout_diff { + status = "disabled"; +}; + +&combphy1_usq { + status = "okay"; +}; + +&combphy2_psq { + status = "okay"; +}; + +&csi2_dphy_hw { + status = "okay"; +}; + +&csi2_dphy1 { + status = "okay"; + + /* + * dphy1 only used for split mode, + * can be used concurrently with dphy2 + * full mode and split mode are mutually exclusive + */ + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + dphy1_in: endpoint@1 { + reg = <1>; + remote-endpoint = <&ov5695_out>; + data-lanes = <1 2>; + }; + }; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + dphy1_out: endpoint@1 { + reg = <1>; + remote-endpoint = <&isp0_in>; + }; + }; + }; +}; + +&csi2_dphy2 { + status = "okay"; + + /* + * dphy2 only used for split mode, + * can be used concurrently with dphy1 + * full mode and split mode are mutually exclusive + */ + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + dphy2_in: endpoint@1 { + reg = <1>; + remote-endpoint = <&ov02k10_out>; + data-lanes = <1 2>; + }; + }; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + dphy2_out: endpoint@1 { + reg = <1>; + remote-endpoint = <&mipi_csi2_input>; + }; + }; + }; +}; + +&dig_acodec { + status = "disabled"; + rockchip,pwm-output-mode; + pinctrl-names = "default"; + pinctrl-0 = <&audiopwm_loutp + &audiopwm_loutn + &audiopwm_routp + &audiopwm_routn + >; +}; + +/* + * mipi_dphy0 needs to be enabled + * when dsi0 is enabled + */ +&dsi0 { + status = "okay"; +}; + +&dsi0_in_vp0 { + status = "disabled"; +}; + +&dsi0_in_vp1 { + status = "okay"; +}; + +&dsi0_panel { + power-supply = <&vcc3v3_lcd0_n>; + reset-gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd0_rst_gpio>; +}; + +/* + * mipi_dphy1 needs to be enabled + * when dsi1 is enabled + */ +&dsi1 { + status = "disabled"; +}; + +&dsi1_in_vp0 { + status = "disabled"; +}; + +&dsi1_in_vp1 { + status = "disabled"; +}; + +&dsi1_panel { + power-supply = <&vcc3v3_lcd1_n>; + reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&lcd1_rst_gpio>; +}; + +&edp { + hpd-gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&edp_phy { + status = "okay"; +}; + +&edp_in_vp0 { + status = "okay"; +}; + +&edp_in_vp1 { + status = "disabled"; +}; + +/* + * power-supply should switche to vcc3v3_lcd1_n + * when mipi panel is connected to dsi1. + */ +>1x { + status = "disabled"; + power-supply = <&vcc3v3_lcd0_n>; +}; + +&hdmi { + status = "disabled"; + rockchip,phy-table = + <92812500 0x8009 0x0000 0x0270>, + <165000000 0x800b 0x0000 0x026d>, + <185625000 0x800b 0x0000 0x01ed>, + <297000000 0x800b 0x0000 0x01ad>, + <594000000 0x8029 0x0000 0x0088>, + <000000000 0x0000 0x0000 0x0000>; +}; + +&i2c2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2m1_xfer>; + + /* split mode: lane0/1 */ + ov5695: ov5695@36 { + status = "okay"; + compatible = "ovti,ov5695"; + reg = <0x36>; + clocks = <&cru CLK_CAM0_OUT>; + clock-names = "xvclk"; + power-domains = <&power RK3568_PD_VI>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_clkout0>; + reset-gpios = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>; + pwdn-gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; + /*power-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;*/ + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "TongJu"; + rockchip,camera-module-lens-name = "CHT842-MD"; + port { + ov5695_out: endpoint { + remote-endpoint = <&dphy1_in>; + data-lanes = <1 2>; + }; + }; + }; + + ov02k10: ov02k10@36 { + status = "okay"; + compatible = "ovti,ov02k10"; + reg = <0x36>; + clocks = <&cru CLK_CAM1_OUT>; + clock-names = "xvclk"; + pinctrl-names = "default"; + pinctrl-0 = <&cam_clkout1>; + reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; + pwdn-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; + power-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "TongJu"; + rockchip,camera-module-lens-name = "CHT842-MD"; + port { + ov02k10_out: endpoint { + remote-endpoint = <&dphy2_in>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&i2s3_2ch { + status = "disabled"; +}; + +&mipi_csi2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&dphy2_out>; + data-lanes = <1 2>; + }; + }; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi_in>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&mipi_dphy0 { + status = "okay"; +}; + +&mipi_dphy1 { + status = "disabled"; +}; + +&pcie2x1 { + reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&pcie20_3v3>; + status = "disabled"; +}; + +&pdm { + status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&pdmm1_clk1 + &pdmm1_sdi1 + &pdmm1_sdi2 + &pdmm1_sdi3>; +}; + +&pdmics { + status = "disabled"; +}; + +&pdm_mic_array { + status = "disabled"; +}; + +&rkcif { + status = "okay"; +}; + +&rkcif_mipi_lvds { + status = "okay"; + + port { + cif_mipi_in: endpoint { + remote-endpoint = <&mipi_csi2_output>; + data-lanes = <1 2>; + }; + }; +}; + +&rkcif_mmu { + status = "okay"; +}; + +&rkisp { + status = "okay"; +}; + +&rkisp_mmu { + status = "okay"; +}; + +&rkisp_vir0 { + status = "okay"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + isp0_in: endpoint@0 { + reg = <0>; + remote-endpoint = <&dphy1_out>; + }; + }; +}; + +&route_dsi0 { + status = "okay"; + connect = <&vp1_out_dsi0>; +}; + +&sdmmc2 { + max-frequency = <150000000>; + supports-sdio; + bus-width = <4>; + disable-wp; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; + sd-uhs-sdr104; + status = "okay"; +}; + +&uart1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn>; +}; + +&u2phy1_host { + status = "disabled"; +}; + +&u2phy1_otg { + status = "disabled"; +}; + +&usb2phy1 { + status = "disabled"; +}; + +&usb_host1_ohci { + status = "disabled"; +}; + +&vcc3v3_lcd0_n { + gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; + enable-active-high; +}; + +&vcc3v3_lcd1_n { + gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; + enable-active-high; +}; + +&wireless_bluetooth { + uart_rts_gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>; + pinctrl-names = "default", "rts_gpio"; + pinctrl-0 = <&uart1m1_rtsn>; + pinctrl-1 = <&uart1_gpios>; + BT,reset_gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; + BT,wake_gpio = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; + BT,wake_host_irq = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; + status = "disabled"; +}; + +&wireless_wlan { + status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_host_wake_irq>; + WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; +}; + +&pinctrl { + cam { + camera_pwr: camera-pwr { + rockchip,pins = + /* camera power en */ + <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + headphone { + hp_det: hp-det { + rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + lcd0 { + lcd0_rst_gpio: lcd0-rst-gpio { + rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + lcd1 { + lcd1_rst_gpio: lcd1-rst-gpio { + rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wireless-wlan { + wifi_host_wake_irq: wifi-host-wake-irq { + rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + wireless-bluetooth { + uart1_gpios: uart1-gpios { + rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +};