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ANDROID: PCI: dwc: Export symbols for ep driver

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Several symbols in DesignWare PCI Core driver are used
to support PCIe controller work at Endpoint Mode.
Export them to support such driver built as module.

Bug: 159736148
Signed-off-by: Jindong Yue <jindong.yue@nxp.com>
Change-Id: I2c77bfbfbec750ecdf21f0cd1bbb20fe339a2f0c
This commit is contained in:
Jindong Yue
2020-12-18 15:46:42 +08:00
committed by Greg Kroah-Hartman
parent 005be5a71b
commit 47b8276da1
2 changed files with 5 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/pci/controller/dwc/pcie-designware-ep.c
View File

@@ -123,6 +123,7 @@ static u8 dw_pcie_ep_find_capability(struct dw_pcie_ep *ep, u8 func_no, u8 cap)
return __dw_pcie_ep_find_next_cap(ep, func_no, next_cap_ptr, cap);
}
EXPORT_SYMBOL_GPL(dw_pcie_ep_reset_bar);
static int dw_pcie_ep_write_header(struct pci_epc *epc, u8 func_no,
struct pci_epf_header *hdr)
@@ -485,6 +486,7 @@ int dw_pcie_ep_raise_legacy_irq(struct dw_pcie_ep *ep, u8 func_no)
return -EINVAL;
}
EXPORT_SYMBOL_GPL(dw_pcie_ep_raise_legacy_irq);
int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no,
u8 interrupt_num)
@@ -536,6 +538,7 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no,
return 0;
}
EXPORT_SYMBOL_GPL(dw_pcie_ep_raise_msi_irq);
int dw_pcie_ep_raise_msix_irq_doorbell(struct dw_pcie_ep *ep, u8 func_no,
u16 interrupt_num)
@@ -604,6 +607,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no,
return 0;
}
EXPORT_SYMBOL_GPL(dw_pcie_ep_raise_msix_irq);
void dw_pcie_ep_exit(struct dw_pcie_ep *ep)
{

1
drivers/pci/controller/dwc/pcie-designware.c
View File

@@ -486,6 +486,7 @@ int dw_pcie_link_up(struct dw_pcie *pci)
return ((val & PCIE_PORT_DEBUG1_LINK_UP) &&
(!(val & PCIE_PORT_DEBUG1_LINK_IN_TRAINING)));
}
EXPORT_SYMBOL_GPL(dw_pcie_link_up);
void dw_pcie_upconfig_setup(struct dw_pcie *pci)
{