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efuse: change PSCI_OS_ACCESS_REG to 0xa600ffb0
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@@ -67,7 +67,7 @@ static struct rockchip_efuse efuse;
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#define SEC_REG_WR_32 (SEC_REG_WR | SEC_REG_32)
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#define SEC_REG_WR_64 (SEC_REG_WR | SEC_REG_64)
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#define PSCI_OS_ACCESS_REG (0xba00ffb0)
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#define PSCI_OS_ACCESS_REG (0xa600ffb0)
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#define EFUSE_BASE 0xffb00000
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/*
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* arg2: rd/wr control, bit[0] 0-rd 1-rt, bit[1] 0-32bit, 1-64bit
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