From 488ffe507eb8aee1329ee7d69bd89a3cbeb0e404 Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Fri, 9 Feb 2018 15:13:26 +0800 Subject: [PATCH] clk: rockchip: px30: fix gpu clk Remove clk_gpu_divnp5. Fix gpu frequency overflowing. Change-Id: I67f47f5fdd7873c22b1349e3aeb80b7157c7844c Signed-off-by: Finley Xiao Signed-off-by: Elaine Zhang --- drivers/clk/rockchip/clk-px30.c | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-) diff --git a/drivers/clk/rockchip/clk-px30.c b/drivers/clk/rockchip/clk-px30.c index 601a77f1af78..6624240ca1df 100644 --- a/drivers/clk/rockchip/clk-px30.c +++ b/drivers/clk/rockchip/clk-px30.c @@ -305,17 +305,10 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = { PX30_CLKGATE_CON(17), 4, GFLAGS), /* PD_GPU */ - COMPOSITE_NODIV(0, "clk_gpu_src", mux_4plls_p, 0, - PX30_CLKSEL_CON(1), 6, 2, MFLAGS, + COMPOSITE(0, "clk_gpu_src", mux_4plls_p, 0, + PX30_CLKSEL_CON(1), 6, 2, MFLAGS, 0, 4, DFLAGS, PX30_CLKGATE_CON(0), 8, GFLAGS), - COMPOSITE_NOMUX(0, "clk_gpu_div", "clk_gpu_src", 0, - PX30_CLKSEL_CON(1), 0, 4, DFLAGS, - PX30_CLKGATE_CON(0), 12, GFLAGS), - COMPOSITE_NOMUX_HALFDIV(0, "clk_gpu_np5", "clk_gpu_src", 0, - PX30_CLKSEL_CON(1), 8, 4, DFLAGS, - PX30_CLKGATE_CON(0), 9, GFLAGS), - COMPOSITE_NODIV(SCLK_GPU, "clk_gpu", mux_gpu_p, CLK_SET_RATE_PARENT, - PX30_CLKSEL_CON(1), 15, 1, MFLAGS, + GATE(ACLK_GPU, "clk_gpu", "clk_gpu_src", 0, PX30_CLKGATE_CON(0), 10, GFLAGS), COMPOSITE_NOMUX(0, "aclk_gpu", "clk_gpu", CLK_IGNORE_UNUSED, PX30_CLKSEL_CON(1), 13, 2, DFLAGS,