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clk: fix gp0_pll typo
PD#164749: fix gp0_pll typo Change-Id: Id50fc1fbc0f0af4a6d2364271317b6b75d963a34 Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
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@@ -27,7 +27,7 @@
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#include "axg.h"
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static const char * const sd_emmc_parent_names[] = { "xtal", "fclk_div2",
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"fclk_div3", "fclk_div5", "fclk_div7", "mpll2", "mpll3", "gp0" };
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"fclk_div3", "fclk_div5", "fclk_div7", "mpll2", "mpll3", "gp0_pll" };
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static struct clk_mux sd_emmc_p0_mux_B = {
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.reg = (void *)HHI_SD_EMMC_CLK_CNTL,
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@@ -57,7 +57,7 @@ static struct clk_gate g12a_ts_clk_gate = {
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static const char * const spicc_parent_names[] = { "xtal",
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"clk81", "fclk_div4", "fclk_div3", "fclk_div2", "fclk_div5",
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"fclk_div7", "gp0"};
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"fclk_div7", "gp0_pll"};
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/* spicc clk */
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static struct clk_mux g12a_spicc0_mux = {
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@@ -27,7 +27,7 @@
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#include "g12a.h"
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static const char * const sd_emmc_parent_names[] = { "xtal", "fclk_div2",
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"fclk_div3", "fclk_div5", "fclk_div7", "mpll2", "mpll3", "gp0" };
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"fclk_div3", "fclk_div5", "fclk_div7", "mpll2", "mpll3", "gp0_pll" };
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static struct clk_mux sd_emmc_p0_mux_A = {
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.reg = (void *)HHI_SD_EMMC_CLK_CNTL,
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@@ -32,7 +32,7 @@
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#define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)
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const char *sd_emmc_parent_names[] = { "xtal", "fclk_div2",
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"fclk_div3", "fclk_div5", "fclk_div7", "mpll2", "mpll3", "gp0" };
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"fclk_div3", "fclk_div5", "fclk_div7", "mpll2", "mpll3", "gp0_pll" };
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static struct clk_mux sd_emmc_p0_mux_A = {
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.reg = (void *)HHI_SD_EMMC_CLK_CNTL,
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