From 48987319f9840fd124172e0e7961871eb778889c Mon Sep 17 00:00:00 2001
From: Liang Chen <cl@rock-chips.com>
Date: Mon, 11 Mar 2024 17:19:16 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3576: add cpu idle-states

Signed-off-by: Liang Chen <cl@rock-chips.com>
Change-Id: Ia3094a7194abd12114db3ee81072ce9e099213f3
---
 arch/arm64/boot/dts/rockchip/rk3576.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
index 1294c910d8e4..8b9d347bfdd2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
@@ -292,6 +292,7 @@
 			operating-points-v2 = <&cluster0_opp_table>;
 			#cooling-cells = <2>;
 			dynamic-power-coefficient = <120>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu_l1: cpu@1 {
@@ -302,6 +303,7 @@
 			capacity-dmips-mhz = <485>;
 			clocks = <&scmi_clk ARMCLK_L>;
 			operating-points-v2 = <&cluster0_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu_l2: cpu@2 {
@@ -312,6 +314,7 @@
 			capacity-dmips-mhz = <485>;
 			clocks = <&scmi_clk ARMCLK_L>;
 			operating-points-v2 = <&cluster0_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu_l3: cpu@3 {
@@ -322,6 +325,7 @@
 			capacity-dmips-mhz = <485>;
 			clocks = <&scmi_clk ARMCLK_L>;
 			operating-points-v2 = <&cluster0_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu_b0: cpu@100 {
@@ -334,6 +338,7 @@
 			operating-points-v2 = <&cluster1_opp_table>;
 			#cooling-cells = <2>;
 			dynamic-power-coefficient = <320>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu_b1: cpu@101 {
@@ -344,6 +349,7 @@
 			capacity-dmips-mhz = <1024>;
 			clocks = <&scmi_clk ARMCLK_B>;
 			operating-points-v2 = <&cluster1_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu_b2: cpu@102 {
@@ -354,6 +360,7 @@
 			capacity-dmips-mhz = <1024>;
 			clocks = <&scmi_clk ARMCLK_B>;
 			operating-points-v2 = <&cluster1_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu_b3: cpu@103 {
@@ -364,6 +371,20 @@
 			capacity-dmips-mhz = <1024>;
 			clocks = <&scmi_clk ARMCLK_B>;
 			operating-points-v2 = <&cluster1_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
+		};
+
+		idle-states {
+			entry-method = "psci";
+
+			CPU_SLEEP: cpu-sleep {
+				compatible = "arm,idle-state";
+				local-timer-stop;
+				arm,psci-suspend-param = <0x0010000>;
+				entry-latency-us = <120>;
+				exit-latency-us = <250>;
+				min-residency-us = <900>;
+			};
 		};
 	};