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ARM: dts: rk3288: combine mipi with cif to work

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Link mipi with cif to work.
Meanwhile,replace isp node with rkisp1 node to use
rkisp driver and remove edp-panel enable pin due to
it conflicts with dvp pwdn pin on rk3288-evb-v11.

Change-Id: If8125d2173c7340d7d702294ab55ee2f0c433663
Signed-off-by: Allon Huang <allon.huang@rock-chips.com>
This commit is contained in:
Allon Huang
2019-06-05 19:51:50 +08:00
committed by Tao Huang
parent 27f3f830a9
commit 49af652f8d
1 changed files with 118 additions and 12 deletions
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130
arch/arm/boot/dts/rk3288-evb-rk808-linux.dts
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@@ -41,7 +41,6 @@
/dts-v1/;
#include "rk3288-evb.dtsi"
#include "rk3288-linux.dtsi"
#include "rk3288-rkisp1.dtsi"
/ {
compatible = "rockchip,rk3288-evb-rk808-linux", "rockchip,rk3288";
@@ -199,10 +198,52 @@
};
};
&cif {
status = "okay";
port {
/* Parallel bus endpoint */
/* cif_para_in: endpoint {
* remote-endpoint = <&cam_para_out1>;
* bus-width = <8>;
* hsync-active = <1>;
* vsync-active = <0>;
* };
*/
/* MIPI CSI-2 endpoint */
cif_mipi_in: endpoint {
remote-endpoint = <&csi_host_output>;
};
};
};
&cpu0 {
cpu0-supply = <&vdd_cpu>;
};
&csi_host {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
csi_host_input: endpoint {
remote-endpoint = <&dphy_txrx1_out>;
data-lanes = <1>;
};
};
port@1 {
reg = <1>;
csi_host_output: endpoint {
remote-endpoint = <&cif_mipi_in>;
};
};
};
};
&dfi {
status = "okay";
};
@@ -219,7 +260,6 @@
&edp_panel {
compatible ="lg,lp079qx1-sp0v", "simple-panel";
backlight = <&backlight>;
enable-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
enable-delay-ms = <120>;
pinctrl-0 = <&lcd_cs>;
power-supply = <&vcc_lcd>;
@@ -503,6 +543,48 @@
rockchip,camera-module-facing = "back";
};
gc2145: gc2145@3c {
status = "okay";
compatible = "galaxycore,gc2145";
reg = <0x3c>;
pinctrl-names = "default";
pinctrl-0 = <&cif_dvp_d2d9>;
/* reset-gpios = <&gpio7 5 GPIO_ACTIVE_LOW>; */
/* pwdn gpio:
* for cam_para_out1: <&gpio2 14 GPIO_ACTIVE_HIGHT>
* for cam_mipi_out1(txrx1): <&gpio7 4 GPIO_ACTIVE_HIGH>
*/
pwdn-gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-OT1055-FG1";
rockchip,camera-module-lens-name = "NC";
clocks = <&cru SCLK_VIP_OUT>;
clock-names = "xvclk";
port {
/* Parallel bus endpoint */
/* cam_para_out1: endpoint {
* remote-endpoint = <&cif_para_in>;
* bus-width = <8>;
* hsync-active = <1>;
* vsync-active = <0>;
* };
*/
/* MIPI CSI-2 endpoint */
cam_mipi_out1: endpoint {
remote-endpoint = <&mipi_sensor_input>;
data-lanes = <1>;
clock-lanes = <0>;
clock-noncontinuous;
};
};
};
ov13850: ov13850@10 {
compatible = "ovti,ov13850";
status = "okay";
@@ -527,16 +609,6 @@
};
};
&isp {
status = "okay";
port {
isp_mipi_in: endpoint {
remote-endpoint = <&dphy_rx0_out>;
};
};
};
&isp_mmu {
status = "okay";
};
@@ -567,10 +639,44 @@
};
};
&mipi_phy_tx1rx1 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mipi_sensor_input: endpoint {
remote-endpoint = <&cam_mipi_out1>;
data-lanes = <1>;
};
};
port@1 {
reg = <1>;
dphy_txrx1_out: endpoint {
remote-endpoint = <&csi_host_input>;
};
};
};
};
&rga {
status = "okay";
};
&rkisp1 {
status = "okay";
port {
isp_mipi_in: endpoint {
remote-endpoint = <&dphy_rx0_out>;
};
};
};
&rockchip_suspend {
rockchip,pwm-regulator-config = <
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