From 4a3fcb9e1bce4d31302efe96a357238cc09ab785 Mon Sep 17 00:00:00 2001 From: Liang Chen Date: Fri, 19 Jul 2019 10:51:18 +0800 Subject: [PATCH] clk: rockchip: rk3328: set ddr clk with sip call We need use sip call to change ddr frequency. Change-Id: I6ad4516306f0cb7c3e0a7124c21ee9fedfd9d055 Signed-off-by: Liang Chen Signed-off-by: Elaine Zhang --- drivers/clk/rockchip/clk-rk3328.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3328.c b/drivers/clk/rockchip/clk-rk3328.c index 8de60c46d542..8ec63aaae4f7 100644 --- a/drivers/clk/rockchip/clk-rk3328.c +++ b/drivers/clk/rockchip/clk-rk3328.c @@ -317,14 +317,15 @@ static struct rockchip_clk_branch rk3328_clk_branches[] __initdata = { RK3328_CLKGATE_CON(14), 1, GFLAGS), /* PD_DDR */ - COMPOSITE(0, "clk_ddr", mux_ddrphy_p, CLK_IS_CRITICAL, - RK3328_CLKSEL_CON(3), 8, 2, MFLAGS, 0, 3, DFLAGS | CLK_DIVIDER_POWER_OF_TWO, - RK3328_CLKGATE_CON(0), 4, GFLAGS), - GATE(0, "clk_ddrmsch", "clk_ddr", CLK_IS_CRITICAL, + COMPOSITE_DDRCLK(SCLK_DDRCLK, "sclk_ddrc", mux_ddrphy_p, 0, + RK3328_CLKSEL_CON(3), 8, 2, 0, 3, + ROCKCHIP_DDRCLK_SIP_V2), + + GATE(0, "clk_ddrmsch", "sclk_ddrc", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(18), 6, GFLAGS), - GATE(0, "clk_ddrupctl", "clk_ddr", CLK_IS_CRITICAL, + GATE(0, "clk_ddrupctl", "sclk_ddrc", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(18), 5, GFLAGS), - GATE(0, "aclk_ddrupctl", "clk_ddr", CLK_IGNORE_UNUSED, + GATE(0, "aclk_ddrupctl", "sclk_ddrc", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(18), 4, GFLAGS), GATE(0, "clk_ddrmon", "xin24m", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(0), 6, GFLAGS),