diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.txt
index 59fa795c431c..48ffd50efa9d 100644
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.txt
+++ b/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.txt
@@ -17,6 +17,8 @@ Optional properties:
  - assigned-clock-parents : parent of clk_xxx_osc or clk_xxx_div.
 		 Refer to clk/clock-bindings.txt for generic clock
 		 consumer properties.
+ - rockchip,dis-u3otg0-port: when set, disable the u3 root port of otg0 host.
+ - rockchip,dis-u3otg1-port: when set, disable the u3 root port of otg1 host.
 
 Example: