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amvecm: add viu2 vsync support for gamma [1/1]

Browse Source 
PD#SWPL-14450

Problem:
gamma can't support viu2 vsync

Solution:
add viu2 vsync support for gamma

Verify:
u202

Change-Id: I5f490b254f58a130451ff69a456c218e6e4dcc94
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
This commit is contained in:
Evoke Zhang
2019-09-26 16:31:21 +08:00
committed by Jianxin Pan
parent 2b9c1c05ba
commit 4bf1e907ee
12 changed files with 121 additions and 27 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/boot/dts/amlogic/g12a_s905d2_u200.dts
View File

@@ -542,6 +542,9 @@
cm_en = <0>;/*1:enabel ;0:disable*/
/*0: 709/601 1: bt2020*/
tx_op_color_primary = <0>;
interrupts = <0 56 1>;
interrupt-names = "vsync2";
};
amdolby_vision {

3
arch/arm/boot/dts/amlogic/g12b_a311d_w400.dts
View File

@@ -498,6 +498,9 @@
gamma_en = <0>;/*1:enabel ;0:disable*/
wb_en = <0>;/*1:enabel ;0:disable*/
cm_en = <0>;/*1:enabel ;0:disable*/
interrupts = <0 56 1>;
interrupt-names = "vsync2";
};
amdolby_vision {
compatible = "amlogic, dolby_vision_g12a";

3
arch/arm/boot/dts/amlogic/sm1_s905d3_ac202.dts
View File

@@ -564,6 +564,9 @@
cm_en = <0>;/*1:enabel ;0:disable*/
/*0: 709/601 1: bt2020*/
tx_op_color_primary = <0>;
interrupts = <0 56 1>;
interrupt-names = "vsync2";
};
amdolby_vision {

3
arch/arm/boot/dts/amlogic/sm1_s905d3_ac202_1g.dts
View File

@@ -564,6 +564,9 @@
cm_en = <0>;/*1:enabel ;0:disable*/
/*0: 709/601 1: bt2020*/
tx_op_color_primary = <0>;
interrupts = <0 56 1>;
interrupt-names = "vsync2";
};
amdolby_vision {

3
arch/arm64/boot/dts/amlogic/g12a_s905d2_u200.dts
View File

@@ -541,6 +541,9 @@
cm_en = <0>;/*1:enabel ;0:disable*/
/*0: 709/601 1: bt2020*/
tx_op_color_primary = <0>;
interrupts = <0 56 1>;
interrupt-names = "vsync2";
};
amdolby_vision {

3
arch/arm64/boot/dts/amlogic/g12b_a311d_w400.dts
View File

@@ -499,6 +499,9 @@
gamma_en = <0>;/*1:enabel ;0:disable*/
wb_en = <0>;/*1:enabel ;0:disable*/
cm_en = <0>;/*1:enabel ;0:disable*/
interrupts = <0 56 1>;
interrupt-names = "vsync2";
};
amdolby_vision {
compatible = "amlogic, dolby_vision_g12a";

3
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts
View File

@@ -560,6 +560,9 @@
cm_en = <0>;/*1:enabel ;0:disable*/
/*0: 709/601 1: bt2020*/
tx_op_color_primary = <0>;
interrupts = <0 56 1>;
interrupt-names = "vsync2";
};
amdolby_vision {

3
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac202.dts
View File

@@ -562,6 +562,9 @@
cm_en = <0>;/*1:enabel ;0:disable*/
/*0: 709/601 1: bt2020*/
tx_op_color_primary = <0>;
interrupts = <0 56 1>;
interrupt-names = "vsync2";
};
amdolby_vision {

3
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac202_1g.dts
View File

@@ -562,6 +562,9 @@
cm_en = <0>;/*1:enabel ;0:disable*/
/*0: 709/601 1: bt2020*/
tx_op_color_primary = <0>;
interrupts = <0 56 1>;
interrupt-names = "vsync2";
};
amdolby_vision {

72
drivers/amlogic/media/enhancement/amvecm/amve.c
View File

@@ -271,18 +271,36 @@ void ve_on_vs(struct vframe_s *vf)
/* *********************************************************************** */
/* *** IOCTL-oriented functions ****************************************** */
/* *********************************************************************** */
void vpp_enable_lcd_gamma_table(void)
int vpp_get_encl_viu_mux(void)
{
VSYNC_WR_MPEG_REG_BITS(L_GAMMA_CNTL_PORT, 1, GAMMA_EN, 1);
unsigned int temp;
temp = READ_VPP_REG(VPU_VIU_VENC_MUX_CTRL);
if ((temp & 0x3) == 0)
return 1;
if (((temp >> 2) & 0x3) == 0)
return 2;
return 0;
}
void vpp_disable_lcd_gamma_table(void)
void vpp_enable_lcd_gamma_table(int viu_sel)
{
VSYNC_WR_MPEG_REG_BITS(L_GAMMA_CNTL_PORT, 0, GAMMA_EN, 1);
if (viu_sel == 1) /* viu1 vsync rdma */
VSYNC_WR_MPEG_REG_BITS(L_GAMMA_CNTL_PORT, 1, GAMMA_EN, 1);
else
WRITE_VPP_REG_BITS(L_GAMMA_CNTL_PORT, 1, GAMMA_EN, 1);
}
void vpp_set_lcd_gamma_table(u16 *data, u32 rgb_mask)
void vpp_disable_lcd_gamma_table(int viu_sel)
{
if (viu_sel == 1) /* viu1 vsync rdma */
VSYNC_WR_MPEG_REG_BITS(L_GAMMA_CNTL_PORT, 0, GAMMA_EN, 1);
else
WRITE_VPP_REG_BITS(L_GAMMA_CNTL_PORT, 0, GAMMA_EN, 1);
}
void vpp_set_lcd_gamma_table(u16 *data, u32 rgb_mask, int viu_sel)
{
int i;
int cnt = 0;
@@ -323,9 +341,15 @@ void vpp_set_lcd_gamma_table(u16 *data, u32 rgb_mask)
(0x1 << rgb_mask) |
(0x23 << HADR));
if (gamma_loadprotect_en)
VSYNC_WR_MPEG_REG_BITS(L_GAMMA_CNTL_PORT,
gamma_en, GAMMA_EN, 1);
if (gamma_loadprotect_en) {
if (viu_sel == 1) { /* viu1 vsync rdma */
VSYNC_WR_MPEG_REG_BITS(L_GAMMA_CNTL_PORT,
gamma_en, GAMMA_EN, 1);
} else { /* viu2 directly write, rdma todo */
WRITE_VPP_REG_BITS(L_GAMMA_CNTL_PORT,
gamma_en, GAMMA_EN, 1);
}
}
spin_unlock_irqrestore(&vpp_lcd_gamma_lock, flags);
}
@@ -780,29 +804,36 @@ void ve_lc_latch_process(void)
void ve_lcd_gamma_process(void)
{
int viu_sel;
viu_sel = vpp_get_encl_viu_mux();
if (vecm_latch_flag & FLAG_GAMMA_TABLE_EN) {
vecm_latch_flag &= ~FLAG_GAMMA_TABLE_EN;
vpp_enable_lcd_gamma_table();
vpp_enable_lcd_gamma_table(viu_sel);
pr_amve_dbg("\n[amve..] set vpp_enable_lcd_gamma_table OK!!!\n");
}
if (vecm_latch_flag & FLAG_GAMMA_TABLE_DIS) {
vecm_latch_flag &= ~FLAG_GAMMA_TABLE_DIS;
vpp_disable_lcd_gamma_table();
vpp_disable_lcd_gamma_table(viu_sel);
pr_amve_dbg("\n[amve..] set vpp_disable_lcd_gamma_table OK!!!\n");
}
if (vecm_latch_flag & FLAG_GAMMA_TABLE_R) {
vecm_latch_flag &= ~FLAG_GAMMA_TABLE_R;
vpp_set_lcd_gamma_table(video_gamma_table_r.data, H_SEL_R);
vpp_set_lcd_gamma_table(video_gamma_table_r.data, H_SEL_R,
viu_sel);
pr_amve_dbg("\n[amve..] set vpp_set_lcd_gamma_table OK!!!\n");
}
if (vecm_latch_flag & FLAG_GAMMA_TABLE_G) {
vecm_latch_flag &= ~FLAG_GAMMA_TABLE_G;
vpp_set_lcd_gamma_table(video_gamma_table_g.data, H_SEL_G);
vpp_set_lcd_gamma_table(video_gamma_table_g.data, H_SEL_G,
viu_sel);
pr_amve_dbg("\n[amve..] set vpp_set_lcd_gamma_table OK!!!\n");
}
if (vecm_latch_flag & FLAG_GAMMA_TABLE_B) {
vecm_latch_flag &= ~FLAG_GAMMA_TABLE_B;
vpp_set_lcd_gamma_table(video_gamma_table_b.data, H_SEL_B);
vpp_set_lcd_gamma_table(video_gamma_table_b.data, H_SEL_B,
viu_sel);
pr_amve_dbg("\n[amve..] set vpp_set_lcd_gamma_table OK!!!\n");
}
if (vecm_latch_flag & FLAG_RGB_OGO) {
@@ -811,23 +842,23 @@ void ve_lcd_gamma_process(void)
if (video_rgb_ogo.en) {
vpp_set_lcd_gamma_table(
video_gamma_table_r_adj.data,
H_SEL_R);
H_SEL_R, viu_sel);
vpp_set_lcd_gamma_table(
video_gamma_table_g_adj.data,
H_SEL_G);
H_SEL_G, viu_sel);
vpp_set_lcd_gamma_table(
video_gamma_table_b_adj.data,
H_SEL_B);
H_SEL_B, viu_sel);
} else {
vpp_set_lcd_gamma_table(
video_gamma_table_r.data,
H_SEL_R);
H_SEL_R, viu_sel);
vpp_set_lcd_gamma_table(
video_gamma_table_g.data,
H_SEL_G);
H_SEL_G, viu_sel);
vpp_set_lcd_gamma_table(
video_gamma_table_b.data,
H_SEL_B);
H_SEL_B, viu_sel);
}
pr_amve_dbg("\n[amve..] set vpp_set_lcd_gamma_table OK!!!\n");
} else {
@@ -836,6 +867,7 @@ void ve_lcd_gamma_process(void)
}
}
}
void lvds_freq_process(void)
{
/* #if ((MESON_CPU_TYPE==MESON_CPU_TYPE_MESON6TV)|| */

7
drivers/amlogic/media/enhancement/amvecm/amve.h
View File

@@ -93,9 +93,10 @@ void ve_set_regmap(struct ve_regmap_s *p);
extern void ve_enable_dnlp(void);
extern void ve_disable_dnlp(void);
extern void vpp_enable_lcd_gamma_table(void);
extern void vpp_disable_lcd_gamma_table(void);
extern void vpp_set_lcd_gamma_table(u16 *data, u32 rgb_mask);
int vpp_get_encl_viu_mux(void);
void vpp_enable_lcd_gamma_table(int viu_sel);
void vpp_disable_lcd_gamma_table(int viu_sel);
void vpp_set_lcd_gamma_table(u16 *data, u32 rgb_mask, int viu_sel);
extern void amve_write_gamma_table(u16 *data, u32 rgb_mask);
extern void vpp_set_rgb_ogo(struct tcon_rgb_ogo_s *p);
extern void vpp_phase_lock_on_vs(unsigned int cycle,

42
drivers/amlogic/media/enhancement/amvecm/amvecm.c
View File

@@ -103,6 +103,7 @@ struct work_struct aml_lcd_vlock_param_work;
#endif
static struct amvecm_dev_s amvecm_dev;
static struct resource *res_viu2_vsync_irq;
spinlock_t vpp_lcd_gamma_lock;
@@ -1109,7 +1110,8 @@ void amvecm_video_latch(void)
cm_latch_process();
/*amvecm_size_patch();*/
ve_dnlp_latch_process();
ve_lcd_gamma_process();
if (vpp_get_encl_viu_mux() == 1)
ve_lcd_gamma_process();
lvds_freq_process();
/* #if (MESON_CPU_TYPE >= MESON_CPU_TYPE_MESONG9TV) */
if (0) {
@@ -1239,6 +1241,13 @@ void refresh_on_vs(struct vframe_s *vf)
}
EXPORT_SYMBOL(refresh_on_vs);
static irqreturn_t amvecm_viu2_vsync_isr(int irq, void *dev_id)
{
if (vpp_get_encl_viu_mux() == 2)
ve_lcd_gamma_process();
return IRQ_HANDLED;
}
static int amvecm_open(struct inode *inode, struct file *file)
{
struct amvecm_dev_s *devp;
@@ -7060,6 +7069,9 @@ static void aml_vecm_dt_parse(struct platform_device *pdev)
else
amcm_disable();
/* WRITE_VPP_REG_BITS(VPP_MISC, cm_en, 28, 1); */
res_viu2_vsync_irq =
platform_get_resource_byname(pdev, IORESOURCE_IRQ, "vsync2");
}
#ifdef CONFIG_AMLOGIC_LCD
@@ -7070,9 +7082,9 @@ static int aml_lcd_gamma_notifier(struct notifier_block *nb,
return NOTIFY_DONE;
#if 0
vpp_set_lcd_gamma_table(video_gamma_table_r.data, H_SEL_R);
vpp_set_lcd_gamma_table(video_gamma_table_g.data, H_SEL_G);
vpp_set_lcd_gamma_table(video_gamma_table_b.data, H_SEL_B);
amve_write_gamma_table(video_gamma_table_r.data, H_SEL_R);
amve_write_gamma_table(video_gamma_table_g.data, H_SEL_G);
amve_write_gamma_table(video_gamma_table_b.data, H_SEL_B);
#else
vecm_latch_flag |= FLAG_GAMMA_TABLE_R;
vecm_latch_flag |= FLAG_GAMMA_TABLE_G;
@@ -7091,6 +7103,21 @@ static struct notifier_block vlock_notifier_nb = {
.notifier_call = vlock_notify_callback,
};
static int aml_vecm_viu2_vsync_irq_init(void)
{
if (res_viu2_vsync_irq) {
if (request_irq(res_viu2_vsync_irq->start,
amvecm_viu2_vsync_isr, IRQF_SHARED,
"amvecm_vsync2", (void *)"amvecm_vsync2")) {
pr_err("can't request amvecm_vsync2_irq\n");
} else {
pr_info("request amvecm_vsync2_irq successful\n");
}
}
return 0;
}
static int aml_vecm_probe(struct platform_device *pdev)
{
int ret = 0;
@@ -7165,6 +7192,8 @@ static int aml_vecm_probe(struct platform_device *pdev)
hdr_init(&amvecm_dev.hdr_d);
aml_vecm_dt_parse(pdev);
aml_vecm_viu2_vsync_irq_init();
probe_ok = 1;
pr_info("%s: ok\n", __func__);
return 0;
@@ -7194,6 +7223,11 @@ static int __exit aml_vecm_remove(struct platform_device *pdev)
{
struct amvecm_dev_s *devp = &amvecm_dev;
if (res_viu2_vsync_irq) {
free_irq(res_viu2_vsync_irq->start,
(void *)"amvecm_vsync2");
}
hdr_exit();
device_destroy(devp->clsp, devp->devno);
cdev_del(&devp->cdev);