diff --git a/arch/arm64/boot/dts/rockchip/overlays/odroidm2/Makefile b/arch/arm64/boot/dts/rockchip/overlays/odroidm2/Makefile
index dfae294af46d..4f03fc700da9 100644
--- a/arch/arm64/boot/dts/rockchip/overlays/odroidm2/Makefile
+++ b/arch/arm64/boot/dts/rockchip/overlays/odroidm2/Makefile
@@ -23,6 +23,7 @@ dtbo-y += \
 	spdif_p29.dtbo \
 	spdif_p32.dtbo \
 	spi0.dtbo \
+	spi1.dtbo \
 	ttyfiq0_115200.dtbo \
 	uart0.dtbo \
 	uart1-with-ctsrts.dtbo \
diff --git a/arch/arm64/boot/dts/rockchip/overlays/odroidm2/spi1.dts b/arch/arm64/boot/dts/rockchip/overlays/odroidm2/spi1.dts
new file mode 100644
index 000000000000..00dd2fe494e8
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/odroidm2/spi1.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&spi3>;
+
+		__overlay__ {
+			status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			spidev: spidev@0 {
+				status = "okay";
+				compatible = "rockchip,spidev";
+				reg = <0>;
+				/* spi default max clock 100Mhz */
+				spi-max-frequency = <100000000>;
+			};
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dtsi
index 019263a12035..4c0b67a0c926 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-odroid-m2.dtsi
@@ -23,6 +23,8 @@
 		serial7 = &uart2;
 		serial8 = &uart0;
 		serial9 = &uart3;
+		spi1 = &spi3;
+		spi3 = &spi1;
 		i2c0 = &i2c5;
 		i2c1 = &i2c6;
 		i2c2 = &i2c1;
@@ -1004,6 +1006,13 @@
 	status = "disabled";
 };
 
+&spi3 {
+	pinctrl-0 = <&spi3m3_pins>;
+	num-cs = <1>;
+	cs-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_LOW>;
+	status = "disabled";
+};
+
 &uart1 {
 	dma-names = "tx", "rx";
 	status = "disabled";