From 4c4ec5018215f5ed7bb95f34234acbb26d768a7b Mon Sep 17 00:00:00 2001 From: Chaoyi Chen Date: Tue, 8 Apr 2025 10:03:50 +0800 Subject: [PATCH] drm/rockchip: vop: Set wb_axi_yrgb/uv id Change-Id: I7104c7264945d7d7839e650ab55416b701510efd Signed-off-by: Chaoyi Chen --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 8 ++++++++ drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 2 ++ drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 6 ++++-- 3 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index e578d9237257..dce2d9aed117 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -2148,6 +2148,8 @@ err_disable_hclk: static void vop_initial(struct drm_crtc *crtc) { struct vop *vop = to_vop(crtc); + const struct vop_data *vop_data = vop->data; + struct vop_wb *wb = &vop->wb; int i; vop_power_enable(crtc); @@ -2176,6 +2178,12 @@ static void vop_initial(struct drm_crtc *crtc) VOP_GRF_SET(vop, grf, grf_vopl_sel, 1); VOP_CTRL_SET(vop, enable, 1); } + + if (vop_data->wb) { + VOP_CTRL_SET2(vop, wb, axi_yrgb_id, vop_data->wb->axi_yrgb_id); + VOP_CTRL_SET2(vop, wb, axi_uv_id, vop_data->wb->axi_uv_id); + vop_wb_cfg_done(vop); + } } static void vop_crtc_atomic_disable_for_psr(struct drm_crtc *crtc, diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h index 449c75963fc0..2c7148002009 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h @@ -1434,6 +1434,8 @@ struct vop_wb_data { struct vop_rect max_output; const struct vop_wb_regs *regs; uint32_t fifo_depth; + uint16_t axi_yrgb_id; + uint16_t axi_uv_id; }; struct vop_data { diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 2272f3994117..b882d8f020ab 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -2006,8 +2006,8 @@ static const struct vop_wb_regs rv1126b_vop_wb_regs = { .post_empty_stop_en = VOP_REG(RV1126B_WB_CTRL, 0x1, 11), .one_frame_mode = VOP_REG(RV1126B_WB_CTRL, 0x1, 12), .xgt2_en = VOP_REG(RV1126B_WB_CTRL, 0x1, 18), - .axi_yrgb_id = VOP_REG(RV1126B_WB_CTRL, 0xff, 20), - .axi_uv_id = VOP_REG(RV1126B_WB_CTRL, 0x1f, 24), + .axi_yrgb_id = VOP_REG(RV1126B_WB_CTRL, 0xf, 20), + .axi_uv_id = VOP_REG(RV1126B_WB_CTRL, 0xf, 24), .fifo_throd = VOP_REG(RV1126B_WB_XSCAL_FACTOR, 0x3ff, 0), .scale_x_factor = VOP_REG(RV1126B_WB_XSCAL_FACTOR, 0x3fff, 16), @@ -2040,6 +2040,8 @@ static const struct vop_wb_data rv1126b_vop_wb_data = { .max_output = { 1920, 1080 }, .fifo_depth = 1920 * 4 / 16, .regs = &rv1126b_vop_wb_regs, + .axi_yrgb_id = 0xd, + .axi_uv_id = 0xe, }; static const struct vop_data rv1126b_vop = {